1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 4 * All rights reserved. 5 * 6 * File: device_main.c 7 * 8 * Purpose: driver entry for initial, open, close, tx and rx. 9 * 10 * Author: Lyndon Chen 11 * 12 * Date: Jan 8, 2003 13 * 14 * Functions: 15 * 16 * vt6655_probe - module initial (insmod) driver entry 17 * vt6655_remove - module remove entry 18 * device_free_info - device structure resource free function 19 * device_print_info - print out resource 20 * device_rx_srv - rx service function 21 * device_alloc_rx_buf - rx buffer pre-allocated function 22 * device_free_rx_buf - free rx buffer function 23 * device_free_tx_buf - free tx buffer function 24 * device_init_rd0_ring- initial rd dma0 ring 25 * device_init_rd1_ring- initial rd dma1 ring 26 * device_init_td0_ring- initial tx dma0 ring buffer 27 * device_init_td1_ring- initial tx dma1 ring buffer 28 * device_init_registers- initial MAC & BBP & RF internal registers. 29 * device_init_rings- initial tx/rx ring buffer 30 * device_free_rings- free all allocated ring buffer 31 * device_tx_srv- tx interrupt service function 32 * 33 * Revision History: 34 */ 35 #undef __NO_VERSION__ 36 37 #include <linux/file.h> 38 #include "device.h" 39 #include "card.h" 40 #include "channel.h" 41 #include "baseband.h" 42 #include "mac.h" 43 #include "power.h" 44 #include "rxtx.h" 45 #include "dpc.h" 46 #include "rf.h" 47 #include <linux/delay.h> 48 #include <linux/kthread.h> 49 #include <linux/slab.h> 50 51 /*--------------------- Static Definitions -------------------------*/ 52 /* 53 * Define module options 54 */ 55 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>"); 56 MODULE_LICENSE("GPL"); 57 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver"); 58 59 #define DEVICE_PARAM(N, D) 60 61 #define RX_DESC_MIN0 16 62 #define RX_DESC_MAX0 128 63 #define RX_DESC_DEF0 32 64 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0"); 65 66 #define RX_DESC_MIN1 16 67 #define RX_DESC_MAX1 128 68 #define RX_DESC_DEF1 32 69 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1"); 70 71 #define TX_DESC_MIN0 16 72 #define TX_DESC_MAX0 128 73 #define TX_DESC_DEF0 32 74 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0"); 75 76 #define TX_DESC_MIN1 16 77 #define TX_DESC_MAX1 128 78 #define TX_DESC_DEF1 64 79 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1"); 80 81 #define INT_WORKS_DEF 20 82 #define INT_WORKS_MIN 10 83 #define INT_WORKS_MAX 64 84 85 DEVICE_PARAM(int_works, "Number of packets per interrupt services"); 86 87 #define RTS_THRESH_DEF 2347 88 89 #define FRAG_THRESH_DEF 2346 90 91 #define SHORT_RETRY_MIN 0 92 #define SHORT_RETRY_MAX 31 93 #define SHORT_RETRY_DEF 8 94 95 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits"); 96 97 #define LONG_RETRY_MIN 0 98 #define LONG_RETRY_MAX 15 99 #define LONG_RETRY_DEF 4 100 101 DEVICE_PARAM(LongRetryLimit, "long frame retry limits"); 102 103 /* BasebandType[] baseband type selected 104 * 0: indicate 802.11a type 105 * 1: indicate 802.11b type 106 * 2: indicate 802.11g type 107 */ 108 #define BBP_TYPE_MIN 0 109 #define BBP_TYPE_MAX 2 110 #define BBP_TYPE_DEF 2 111 112 DEVICE_PARAM(BasebandType, "baseband type"); 113 114 /* 115 * Static vars definitions 116 */ 117 static const struct pci_device_id vt6655_pci_id_table[] = { 118 { PCI_VDEVICE(VIA, 0x3253) }, 119 { 0, } 120 }; 121 122 /*--------------------- Static Functions --------------------------*/ 123 124 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent); 125 static void device_free_info(struct vnt_private *priv); 126 static void device_print_info(struct vnt_private *priv); 127 128 static int device_init_rd0_ring(struct vnt_private *priv); 129 static int device_init_rd1_ring(struct vnt_private *priv); 130 static int device_init_td0_ring(struct vnt_private *priv); 131 static int device_init_td1_ring(struct vnt_private *priv); 132 133 static int device_rx_srv(struct vnt_private *priv, unsigned int idx); 134 static int device_tx_srv(struct vnt_private *priv, unsigned int idx); 135 static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *); 136 static void device_free_rx_buf(struct vnt_private *priv, struct vnt_rx_desc *rd); 137 static void device_init_registers(struct vnt_private *priv); 138 static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *); 139 static void device_free_td0_ring(struct vnt_private *priv); 140 static void device_free_td1_ring(struct vnt_private *priv); 141 static void device_free_rd0_ring(struct vnt_private *priv); 142 static void device_free_rd1_ring(struct vnt_private *priv); 143 static void device_free_rings(struct vnt_private *priv); 144 145 /*--------------------- Export Variables --------------------------*/ 146 147 /*--------------------- Export Functions --------------------------*/ 148 149 static void vt6655_remove(struct pci_dev *pcid) 150 { 151 struct vnt_private *priv = pci_get_drvdata(pcid); 152 153 if (!priv) 154 return; 155 device_free_info(priv); 156 } 157 158 static void device_get_options(struct vnt_private *priv) 159 { 160 struct vnt_options *opts = &priv->opts; 161 162 opts->rx_descs0 = RX_DESC_DEF0; 163 opts->rx_descs1 = RX_DESC_DEF1; 164 opts->tx_descs[0] = TX_DESC_DEF0; 165 opts->tx_descs[1] = TX_DESC_DEF1; 166 opts->int_works = INT_WORKS_DEF; 167 168 opts->short_retry = SHORT_RETRY_DEF; 169 opts->long_retry = LONG_RETRY_DEF; 170 opts->bbp_type = BBP_TYPE_DEF; 171 } 172 173 static void 174 device_set_options(struct vnt_private *priv) 175 { 176 priv->byShortRetryLimit = priv->opts.short_retry; 177 priv->byLongRetryLimit = priv->opts.long_retry; 178 priv->byBBType = priv->opts.bbp_type; 179 priv->byPacketType = priv->byBBType; 180 priv->byAutoFBCtrl = AUTO_FB_0; 181 priv->bUpdateBBVGA = true; 182 priv->byPreambleType = 0; 183 184 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit); 185 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit); 186 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType); 187 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble); 188 pr_debug(" byBBType= %d\n", (int)priv->byBBType); 189 } 190 191 /* 192 * Initialisation of MAC & BBP registers 193 */ 194 195 static void device_init_registers(struct vnt_private *priv) 196 { 197 unsigned long flags; 198 unsigned int ii; 199 unsigned char byValue; 200 unsigned char byCCKPwrdBm = 0; 201 unsigned char byOFDMPwrdBm = 0; 202 203 MACbShutdown(priv); 204 BBvSoftwareReset(priv); 205 206 /* Do MACbSoftwareReset in MACvInitialize */ 207 MACbSoftwareReset(priv); 208 209 priv->bAES = false; 210 211 /* Only used in 11g type, sync with ERP IE */ 212 priv->bProtectMode = false; 213 214 priv->bNonERPPresent = false; 215 priv->bBarkerPreambleMd = false; 216 priv->wCurrentRate = RATE_1M; 217 priv->byTopOFDMBasicRate = RATE_24M; 218 priv->byTopCCKBasicRate = RATE_1M; 219 220 /* init MAC */ 221 MACvInitialize(priv); 222 223 /* Get Local ID */ 224 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID); 225 226 spin_lock_irqsave(&priv->lock, flags); 227 228 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM); 229 230 spin_unlock_irqrestore(&priv->lock, flags); 231 232 /* Get Channel range */ 233 priv->byMinChannel = 1; 234 priv->byMaxChannel = CB_MAX_CHANNEL; 235 236 /* Get Antena */ 237 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA); 238 if (byValue & EEP_ANTINV) 239 priv->bTxRxAntInv = true; 240 else 241 priv->bTxRxAntInv = false; 242 243 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); 244 /* if not set default is All */ 245 if (byValue == 0) 246 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); 247 248 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) { 249 priv->byAntennaCount = 2; 250 priv->byTxAntennaMode = ANT_B; 251 priv->dwTxAntennaSel = 1; 252 priv->dwRxAntennaSel = 1; 253 254 if (priv->bTxRxAntInv) 255 priv->byRxAntennaMode = ANT_A; 256 else 257 priv->byRxAntennaMode = ANT_B; 258 } else { 259 priv->byAntennaCount = 1; 260 priv->dwTxAntennaSel = 0; 261 priv->dwRxAntennaSel = 0; 262 263 if (byValue & EEP_ANTENNA_AUX) { 264 priv->byTxAntennaMode = ANT_A; 265 266 if (priv->bTxRxAntInv) 267 priv->byRxAntennaMode = ANT_B; 268 else 269 priv->byRxAntennaMode = ANT_A; 270 } else { 271 priv->byTxAntennaMode = ANT_B; 272 273 if (priv->bTxRxAntInv) 274 priv->byRxAntennaMode = ANT_A; 275 else 276 priv->byRxAntennaMode = ANT_B; 277 } 278 } 279 280 /* Set initial antenna mode */ 281 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode); 282 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode); 283 284 /* zonetype initial */ 285 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE]; 286 287 if (!priv->bZoneRegExist) 288 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE]; 289 290 pr_debug("priv->byZoneType = %x\n", priv->byZoneType); 291 292 /* Init RF module */ 293 RFbInit(priv); 294 295 /* Get Desire Power Value */ 296 priv->byCurPwr = 0xFF; 297 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK); 298 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_OFDMG); 299 300 /* Load power Table */ 301 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) { 302 priv->abyCCKPwrTbl[ii + 1] = 303 SROMbyReadEmbedded(priv->PortOffset, 304 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL)); 305 if (priv->abyCCKPwrTbl[ii + 1] == 0) 306 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr; 307 308 priv->abyOFDMPwrTbl[ii + 1] = 309 SROMbyReadEmbedded(priv->PortOffset, 310 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL)); 311 if (priv->abyOFDMPwrTbl[ii + 1] == 0) 312 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG; 313 314 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm; 315 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm; 316 } 317 318 /* recover 12,13 ,14channel for EUROPE by 11 channel */ 319 for (ii = 11; ii < 14; ii++) { 320 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10]; 321 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10]; 322 } 323 324 /* Load OFDM A Power Table */ 325 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) { 326 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] = 327 SROMbyReadEmbedded(priv->PortOffset, 328 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL)); 329 330 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] = 331 SROMbyReadEmbedded(priv->PortOffset, 332 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm)); 333 } 334 335 if (priv->byLocalID > REV_ID_VT3253_B1) { 336 MACvSelectPage1(priv->PortOffset); 337 338 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1, 339 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN)); 340 341 MACvSelectPage0(priv->PortOffset); 342 } 343 344 /* use relative tx timeout and 802.11i D4 */ 345 MACvWordRegBitsOn(priv->PortOffset, 346 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT)); 347 348 /* set performance parameter by registry */ 349 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit); 350 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit); 351 352 /* reset TSF counter */ 353 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 354 /* enable TSF counter */ 355 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 356 357 /* initialize BBP registers */ 358 BBbVT3253Init(priv); 359 360 if (priv->bUpdateBBVGA) { 361 priv->byBBVGACurrent = priv->abyBBVGA[0]; 362 priv->byBBVGANew = priv->byBBVGACurrent; 363 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]); 364 } 365 366 BBvSetRxAntennaMode(priv, priv->byRxAntennaMode); 367 BBvSetTxAntennaMode(priv, priv->byTxAntennaMode); 368 369 /* Set BB and packet type at the same time. */ 370 /* Set Short Slot Time, xIFS, and RSPINF. */ 371 priv->wCurrentRate = RATE_54M; 372 373 priv->bRadioOff = false; 374 375 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset, 376 EEP_OFS_RADIOCTL); 377 priv->bHWRadioOff = false; 378 379 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) { 380 /* Get GPIO */ 381 MACvGPIOIn(priv->PortOffset, &priv->byGPIO); 382 383 if (((priv->byGPIO & GPIO0_DATA) && 384 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) || 385 (!(priv->byGPIO & GPIO0_DATA) && 386 (priv->byRadioCtl & EEP_RADIOCTL_INV))) 387 priv->bHWRadioOff = true; 388 } 389 390 if (priv->bHWRadioOff || priv->bRadioControlOff) 391 CARDbRadioPowerOff(priv); 392 393 /* get Permanent network address */ 394 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 395 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr); 396 397 /* reset Tx pointer */ 398 CARDvSafeResetRx(priv); 399 /* reset Rx pointer */ 400 CARDvSafeResetTx(priv); 401 402 if (priv->byLocalID <= REV_ID_VT3253_A1) 403 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR); 404 405 /* Turn On Rx DMA */ 406 MACvReceive0(priv->PortOffset); 407 MACvReceive1(priv->PortOffset); 408 409 /* start the adapter */ 410 MACvStart(priv->PortOffset); 411 } 412 413 static void device_print_info(struct vnt_private *priv) 414 { 415 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n", 416 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr, 417 (unsigned long)priv->PortOffset, priv->pcid->irq); 418 } 419 420 static void device_free_info(struct vnt_private *priv) 421 { 422 if (!priv) 423 return; 424 425 if (priv->mac_hw) 426 ieee80211_unregister_hw(priv->hw); 427 428 if (priv->PortOffset) 429 iounmap(priv->PortOffset); 430 431 if (priv->pcid) 432 pci_release_regions(priv->pcid); 433 434 if (priv->hw) 435 ieee80211_free_hw(priv->hw); 436 } 437 438 static bool device_init_rings(struct vnt_private *priv) 439 { 440 void *vir_pool; 441 442 /*allocate all RD/TD rings a single pool*/ 443 vir_pool = dma_alloc_coherent(&priv->pcid->dev, 444 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 445 &priv->pool_dma, GFP_ATOMIC); 446 if (!vir_pool) { 447 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n"); 448 return false; 449 } 450 451 priv->aRD0Ring = vir_pool; 452 priv->aRD1Ring = vir_pool + 453 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc); 454 455 priv->rd0_pool_dma = priv->pool_dma; 456 priv->rd1_pool_dma = priv->rd0_pool_dma + 457 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc); 458 459 priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev, 460 priv->opts.tx_descs[0] * PKT_BUF_SZ + priv->opts.tx_descs[1] * PKT_BUF_SZ + CB_BEACON_BUF_SIZE + CB_MAX_BUF_SIZE, 461 &priv->tx_bufs_dma0, GFP_ATOMIC); 462 if (!priv->tx0_bufs) { 463 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n"); 464 465 dma_free_coherent(&priv->pcid->dev, 466 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + 467 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + 468 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + 469 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 470 vir_pool, priv->pool_dma); 471 return false; 472 } 473 474 priv->td0_pool_dma = priv->rd1_pool_dma + 475 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc); 476 477 priv->td1_pool_dma = priv->td0_pool_dma + 478 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc); 479 480 /* vir_pool: pvoid type */ 481 priv->apTD0Rings = vir_pool 482 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) 483 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc); 484 485 priv->apTD1Rings = vir_pool 486 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) 487 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) 488 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc); 489 490 priv->tx1_bufs = priv->tx0_bufs + 491 priv->opts.tx_descs[0] * PKT_BUF_SZ; 492 493 priv->tx_beacon_bufs = priv->tx1_bufs + 494 priv->opts.tx_descs[1] * PKT_BUF_SZ; 495 496 priv->pbyTmpBuff = priv->tx_beacon_bufs + 497 CB_BEACON_BUF_SIZE; 498 499 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 + 500 priv->opts.tx_descs[0] * PKT_BUF_SZ; 501 502 priv->tx_beacon_dma = priv->tx_bufs_dma1 + 503 priv->opts.tx_descs[1] * PKT_BUF_SZ; 504 505 return true; 506 } 507 508 static void device_free_rings(struct vnt_private *priv) 509 { 510 dma_free_coherent(&priv->pcid->dev, 511 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) + 512 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) + 513 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) + 514 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc), 515 priv->aRD0Ring, priv->pool_dma); 516 517 if (priv->tx0_bufs) 518 dma_free_coherent(&priv->pcid->dev, 519 priv->opts.tx_descs[0] * PKT_BUF_SZ + 520 priv->opts.tx_descs[1] * PKT_BUF_SZ + 521 CB_BEACON_BUF_SIZE + 522 CB_MAX_BUF_SIZE, 523 priv->tx0_bufs, priv->tx_bufs_dma0); 524 } 525 526 static int device_init_rd0_ring(struct vnt_private *priv) 527 { 528 int i; 529 dma_addr_t curr = priv->rd0_pool_dma; 530 struct vnt_rx_desc *desc; 531 int ret; 532 533 /* Init the RD0 ring entries */ 534 for (i = 0; i < priv->opts.rx_descs0; 535 i ++, curr += sizeof(struct vnt_rx_desc)) { 536 desc = &priv->aRD0Ring[i]; 537 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL); 538 if (!desc->rd_info) { 539 ret = -ENOMEM; 540 goto err_free_desc; 541 } 542 543 if (!device_alloc_rx_buf(priv, desc)) { 544 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n"); 545 ret = -ENOMEM; 546 goto err_free_rd; 547 } 548 549 desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0]; 550 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc)); 551 } 552 553 if (i > 0) 554 priv->aRD0Ring[i-1].next_desc = cpu_to_le32(priv->rd0_pool_dma); 555 priv->pCurrRD[0] = &priv->aRD0Ring[0]; 556 557 return 0; 558 559 err_free_rd: 560 kfree(desc->rd_info); 561 562 err_free_desc: 563 while (--i) { 564 desc = &priv->aRD0Ring[i]; 565 device_free_rx_buf(priv, desc); 566 kfree(desc->rd_info); 567 } 568 569 return ret; 570 } 571 572 static int device_init_rd1_ring(struct vnt_private *priv) 573 { 574 int i; 575 dma_addr_t curr = priv->rd1_pool_dma; 576 struct vnt_rx_desc *desc; 577 int ret; 578 579 /* Init the RD1 ring entries */ 580 for (i = 0; i < priv->opts.rx_descs1; 581 i ++, curr += sizeof(struct vnt_rx_desc)) { 582 desc = &priv->aRD1Ring[i]; 583 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL); 584 if (!desc->rd_info) { 585 ret = -ENOMEM; 586 goto err_free_desc; 587 } 588 589 if (!device_alloc_rx_buf(priv, desc)) { 590 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n"); 591 ret = -ENOMEM; 592 goto err_free_rd; 593 } 594 595 desc->next = &priv->aRD1Ring[(i+1) % priv->opts.rx_descs1]; 596 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc)); 597 } 598 599 if (i > 0) 600 priv->aRD1Ring[i-1].next_desc = cpu_to_le32(priv->rd1_pool_dma); 601 priv->pCurrRD[1] = &priv->aRD1Ring[0]; 602 603 return 0; 604 605 err_free_rd: 606 kfree(desc->rd_info); 607 608 err_free_desc: 609 while (--i) { 610 desc = &priv->aRD1Ring[i]; 611 device_free_rx_buf(priv, desc); 612 kfree(desc->rd_info); 613 } 614 615 return ret; 616 } 617 618 static void device_free_rd0_ring(struct vnt_private *priv) 619 { 620 int i; 621 622 for (i = 0; i < priv->opts.rx_descs0; i++) { 623 struct vnt_rx_desc *desc = &priv->aRD0Ring[i]; 624 625 device_free_rx_buf(priv, desc); 626 kfree(desc->rd_info); 627 } 628 } 629 630 static void device_free_rd1_ring(struct vnt_private *priv) 631 { 632 int i; 633 634 for (i = 0; i < priv->opts.rx_descs1; i++) { 635 struct vnt_rx_desc *desc = &priv->aRD1Ring[i]; 636 637 device_free_rx_buf(priv, desc); 638 kfree(desc->rd_info); 639 } 640 } 641 642 static int device_init_td0_ring(struct vnt_private *priv) 643 { 644 int i; 645 dma_addr_t curr; 646 struct vnt_tx_desc *desc; 647 int ret; 648 649 curr = priv->td0_pool_dma; 650 for (i = 0; i < priv->opts.tx_descs[0]; 651 i++, curr += sizeof(struct vnt_tx_desc)) { 652 desc = &priv->apTD0Rings[i]; 653 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL); 654 if (!desc->td_info) { 655 ret = -ENOMEM; 656 goto err_free_desc; 657 } 658 659 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ; 660 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ; 661 662 desc->next = &(priv->apTD0Rings[(i+1) % priv->opts.tx_descs[0]]); 663 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc)); 664 } 665 666 if (i > 0) 667 priv->apTD0Rings[i-1].next_desc = cpu_to_le32(priv->td0_pool_dma); 668 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0]; 669 670 return 0; 671 672 err_free_desc: 673 while (--i) { 674 desc = &priv->apTD0Rings[i]; 675 kfree(desc->td_info); 676 } 677 678 return ret; 679 } 680 681 static int device_init_td1_ring(struct vnt_private *priv) 682 { 683 int i; 684 dma_addr_t curr; 685 struct vnt_tx_desc *desc; 686 int ret; 687 688 /* Init the TD ring entries */ 689 curr = priv->td1_pool_dma; 690 for (i = 0; i < priv->opts.tx_descs[1]; 691 i++, curr += sizeof(struct vnt_tx_desc)) { 692 desc = &priv->apTD1Rings[i]; 693 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL); 694 if (!desc->td_info) { 695 ret = -ENOMEM; 696 goto err_free_desc; 697 } 698 699 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ; 700 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ; 701 702 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]); 703 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc)); 704 } 705 706 if (i > 0) 707 priv->apTD1Rings[i-1].next_desc = cpu_to_le32(priv->td1_pool_dma); 708 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0]; 709 710 return 0; 711 712 err_free_desc: 713 while (--i) { 714 desc = &priv->apTD1Rings[i]; 715 kfree(desc->td_info); 716 } 717 718 return ret; 719 } 720 721 static void device_free_td0_ring(struct vnt_private *priv) 722 { 723 int i; 724 725 for (i = 0; i < priv->opts.tx_descs[0]; i++) { 726 struct vnt_tx_desc *desc = &priv->apTD0Rings[i]; 727 struct vnt_td_info *td_info = desc->td_info; 728 729 dev_kfree_skb(td_info->skb); 730 kfree(desc->td_info); 731 } 732 } 733 734 static void device_free_td1_ring(struct vnt_private *priv) 735 { 736 int i; 737 738 for (i = 0; i < priv->opts.tx_descs[1]; i++) { 739 struct vnt_tx_desc *desc = &priv->apTD1Rings[i]; 740 struct vnt_td_info *td_info = desc->td_info; 741 742 dev_kfree_skb(td_info->skb); 743 kfree(desc->td_info); 744 } 745 } 746 747 /*-----------------------------------------------------------------*/ 748 749 static int device_rx_srv(struct vnt_private *priv, unsigned int idx) 750 { 751 struct vnt_rx_desc *rd; 752 int works = 0; 753 754 for (rd = priv->pCurrRD[idx]; 755 rd->rd0.owner == OWNED_BY_HOST; 756 rd = rd->next) { 757 if (works++ > 15) 758 break; 759 760 if (!rd->rd_info->skb) 761 break; 762 763 if (vnt_receive_frame(priv, rd)) { 764 if (!device_alloc_rx_buf(priv, rd)) { 765 dev_err(&priv->pcid->dev, 766 "can not allocate rx buf\n"); 767 break; 768 } 769 } 770 rd->rd0.owner = OWNED_BY_NIC; 771 } 772 773 priv->pCurrRD[idx] = rd; 774 775 return works; 776 } 777 778 static bool device_alloc_rx_buf(struct vnt_private *priv, 779 struct vnt_rx_desc *rd) 780 { 781 struct vnt_rd_info *rd_info = rd->rd_info; 782 783 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz); 784 if (!rd_info->skb) 785 return false; 786 787 rd_info->skb_dma = 788 dma_map_single(&priv->pcid->dev, 789 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)), 790 priv->rx_buf_sz, DMA_FROM_DEVICE); 791 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) { 792 dev_kfree_skb(rd_info->skb); 793 rd_info->skb = NULL; 794 return false; 795 } 796 797 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */ 798 799 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); 800 rd->rd0.owner = OWNED_BY_NIC; 801 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz); 802 rd->buff_addr = cpu_to_le32(rd_info->skb_dma); 803 804 return true; 805 } 806 807 static void device_free_rx_buf(struct vnt_private *priv, 808 struct vnt_rx_desc *rd) 809 { 810 struct vnt_rd_info *rd_info = rd->rd_info; 811 812 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma, 813 priv->rx_buf_sz, DMA_FROM_DEVICE); 814 dev_kfree_skb(rd_info->skb); 815 } 816 817 static const u8 fallback_rate0[5][5] = { 818 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M}, 819 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M}, 820 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M}, 821 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M}, 822 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M} 823 }; 824 825 static const u8 fallback_rate1[5][5] = { 826 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M}, 827 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M}, 828 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M}, 829 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M}, 830 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M} 831 }; 832 833 static int vnt_int_report_rate(struct vnt_private *priv, 834 struct vnt_td_info *context, u8 tsr0, u8 tsr1) 835 { 836 struct vnt_tx_fifo_head *fifo_head; 837 struct ieee80211_tx_info *info; 838 struct ieee80211_rate *rate; 839 u16 fb_option; 840 u8 tx_retry = (tsr0 & TSR0_NCR); 841 s8 idx; 842 843 if (!context) 844 return -ENOMEM; 845 846 if (!context->skb) 847 return -EINVAL; 848 849 fifo_head = (struct vnt_tx_fifo_head *)context->buf; 850 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) & 851 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1)); 852 853 info = IEEE80211_SKB_CB(context->skb); 854 idx = info->control.rates[0].idx; 855 856 if (fb_option && !(tsr1 & TSR1_TERR)) { 857 u8 tx_rate; 858 u8 retry = tx_retry; 859 860 rate = ieee80211_get_tx_rate(priv->hw, info); 861 tx_rate = rate->hw_value - RATE_18M; 862 863 if (retry > 4) 864 retry = 4; 865 866 if (fb_option & FIFOCTL_AUTO_FB_0) 867 tx_rate = fallback_rate0[tx_rate][retry]; 868 else if (fb_option & FIFOCTL_AUTO_FB_1) 869 tx_rate = fallback_rate1[tx_rate][retry]; 870 871 if (info->band == NL80211_BAND_5GHZ) 872 idx = tx_rate - RATE_6M; 873 else 874 idx = tx_rate; 875 } 876 877 ieee80211_tx_info_clear_status(info); 878 879 info->status.rates[0].count = tx_retry; 880 881 if (!(tsr1 & TSR1_TERR)) { 882 info->status.rates[0].idx = idx; 883 884 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 885 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 886 else 887 info->flags |= IEEE80211_TX_STAT_ACK; 888 } 889 890 return 0; 891 } 892 893 static int device_tx_srv(struct vnt_private *priv, unsigned int idx) 894 { 895 struct vnt_tx_desc *desc; 896 int works = 0; 897 unsigned char byTsr0; 898 unsigned char byTsr1; 899 900 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) { 901 if (desc->td0.owner == OWNED_BY_NIC) 902 break; 903 if (works++ > 15) 904 break; 905 906 byTsr0 = desc->td0.tsr0; 907 byTsr1 = desc->td0.tsr1; 908 909 /* Only the status of first TD in the chain is correct */ 910 if (desc->td1.tcr & TCR_STP) { 911 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) { 912 if (!(byTsr1 & TSR1_TERR)) { 913 if (byTsr0 != 0) { 914 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n", 915 (int)idx, byTsr1, 916 byTsr0); 917 } 918 } else { 919 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n", 920 (int)idx, byTsr1, byTsr0); 921 } 922 } 923 924 if (byTsr1 & TSR1_TERR) { 925 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) { 926 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n", 927 (int)idx, byTsr1, byTsr0); 928 } 929 } 930 931 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1); 932 933 device_free_tx_buf(priv, desc); 934 priv->iTDUsed[idx]--; 935 } 936 } 937 938 priv->apTailTD[idx] = desc; 939 940 return works; 941 } 942 943 static void device_error(struct vnt_private *priv, unsigned short status) 944 { 945 if (status & ISR_FETALERR) { 946 dev_err(&priv->pcid->dev, "Hardware fatal error\n"); 947 948 MACbShutdown(priv); 949 return; 950 } 951 } 952 953 static void device_free_tx_buf(struct vnt_private *priv, 954 struct vnt_tx_desc *desc) 955 { 956 struct vnt_td_info *td_info = desc->td_info; 957 struct sk_buff *skb = td_info->skb; 958 959 if (skb) 960 ieee80211_tx_status_irqsafe(priv->hw, skb); 961 962 td_info->skb = NULL; 963 td_info->flags = 0; 964 } 965 966 static void vnt_check_bb_vga(struct vnt_private *priv) 967 { 968 long dbm; 969 int i; 970 971 if (!priv->bUpdateBBVGA) 972 return; 973 974 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) 975 return; 976 977 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI)) 978 return; 979 980 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm); 981 982 for (i = 0; i < BB_VGA_LEVEL; i++) { 983 if (dbm < priv->ldBmThreshold[i]) { 984 priv->byBBVGANew = priv->abyBBVGA[i]; 985 break; 986 } 987 } 988 989 if (priv->byBBVGANew == priv->byBBVGACurrent) { 990 priv->uBBVGADiffCount = 1; 991 return; 992 } 993 994 priv->uBBVGADiffCount++; 995 996 if (priv->uBBVGADiffCount == 1) { 997 /* first VGA diff gain */ 998 BBvSetVGAGainOffset(priv, priv->byBBVGANew); 999 1000 dev_dbg(&priv->pcid->dev, 1001 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", 1002 (int)dbm, priv->byBBVGANew, 1003 priv->byBBVGACurrent, 1004 (int)priv->uBBVGADiffCount); 1005 } 1006 1007 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) { 1008 dev_dbg(&priv->pcid->dev, 1009 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", 1010 (int)dbm, priv->byBBVGANew, 1011 priv->byBBVGACurrent, 1012 (int)priv->uBBVGADiffCount); 1013 1014 BBvSetVGAGainOffset(priv, priv->byBBVGANew); 1015 } 1016 } 1017 1018 static void vnt_interrupt_process(struct vnt_private *priv) 1019 { 1020 struct ieee80211_low_level_stats *low_stats = &priv->low_stats; 1021 int max_count = 0; 1022 u32 mib_counter; 1023 u32 isr; 1024 unsigned long flags; 1025 1026 MACvReadISR(priv->PortOffset, &isr); 1027 1028 if (isr == 0) 1029 return; 1030 1031 if (isr == 0xffffffff) { 1032 pr_debug("isr = 0xffff\n"); 1033 return; 1034 } 1035 1036 spin_lock_irqsave(&priv->lock, flags); 1037 1038 /* Read low level stats */ 1039 MACvReadMIBCounter(priv->PortOffset, &mib_counter); 1040 1041 low_stats->dot11RTSSuccessCount += mib_counter & 0xff; 1042 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff; 1043 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff; 1044 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff; 1045 1046 /* 1047 * TBD.... 1048 * Must do this after doing rx/tx, cause ISR bit is slow 1049 * than RD/TD write back 1050 * update ISR counter 1051 */ 1052 while (isr && priv->vif) { 1053 MACvWriteISR(priv->PortOffset, isr); 1054 1055 if (isr & ISR_FETALERR) { 1056 pr_debug(" ISR_FETALERR\n"); 1057 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0); 1058 VNSvOutPortW(priv->PortOffset + 1059 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI); 1060 device_error(priv, isr); 1061 } 1062 1063 if (isr & ISR_TBTT) { 1064 if (priv->op_mode != NL80211_IFTYPE_ADHOC) 1065 vnt_check_bb_vga(priv); 1066 1067 priv->bBeaconSent = false; 1068 if (priv->bEnablePSMode) 1069 PSbIsNextTBTTWakeUp((void *)priv); 1070 1071 if ((priv->op_mode == NL80211_IFTYPE_AP || 1072 priv->op_mode == NL80211_IFTYPE_ADHOC) && 1073 priv->vif->bss_conf.enable_beacon) { 1074 MACvOneShotTimer1MicroSec(priv, 1075 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10); 1076 } 1077 1078 /* TODO: adhoc PS mode */ 1079 } 1080 1081 if (isr & ISR_BNTX) { 1082 if (priv->op_mode == NL80211_IFTYPE_ADHOC) { 1083 priv->bIsBeaconBufReadySet = false; 1084 priv->cbBeaconBufReadySetCnt = 0; 1085 } 1086 1087 priv->bBeaconSent = true; 1088 } 1089 1090 if (isr & ISR_RXDMA0) 1091 max_count += device_rx_srv(priv, TYPE_RXDMA0); 1092 1093 if (isr & ISR_RXDMA1) 1094 max_count += device_rx_srv(priv, TYPE_RXDMA1); 1095 1096 if (isr & ISR_TXDMA0) 1097 max_count += device_tx_srv(priv, TYPE_TXDMA0); 1098 1099 if (isr & ISR_AC0DMA) 1100 max_count += device_tx_srv(priv, TYPE_AC0DMA); 1101 1102 if (isr & ISR_SOFTTIMER1) { 1103 if (priv->vif->bss_conf.enable_beacon) 1104 vnt_beacon_make(priv, priv->vif); 1105 } 1106 1107 /* If both buffers available wake the queue */ 1108 if (AVAIL_TD(priv, TYPE_TXDMA0) && 1109 AVAIL_TD(priv, TYPE_AC0DMA) && 1110 ieee80211_queue_stopped(priv->hw, 0)) 1111 ieee80211_wake_queues(priv->hw); 1112 1113 MACvReadISR(priv->PortOffset, &isr); 1114 1115 MACvReceive0(priv->PortOffset); 1116 MACvReceive1(priv->PortOffset); 1117 1118 if (max_count > priv->opts.int_works) 1119 break; 1120 } 1121 1122 spin_unlock_irqrestore(&priv->lock, flags); 1123 } 1124 1125 static void vnt_interrupt_work(struct work_struct *work) 1126 { 1127 struct vnt_private *priv = 1128 container_of(work, struct vnt_private, interrupt_work); 1129 1130 if (priv->vif) 1131 vnt_interrupt_process(priv); 1132 1133 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1134 } 1135 1136 static irqreturn_t vnt_interrupt(int irq, void *arg) 1137 { 1138 struct vnt_private *priv = arg; 1139 1140 schedule_work(&priv->interrupt_work); 1141 1142 MACvIntDisable(priv->PortOffset); 1143 1144 return IRQ_HANDLED; 1145 } 1146 1147 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb) 1148 { 1149 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1150 struct vnt_tx_desc *head_td; 1151 u32 dma_idx; 1152 unsigned long flags; 1153 1154 spin_lock_irqsave(&priv->lock, flags); 1155 1156 if (ieee80211_is_data(hdr->frame_control)) 1157 dma_idx = TYPE_AC0DMA; 1158 else 1159 dma_idx = TYPE_TXDMA0; 1160 1161 if (AVAIL_TD(priv, dma_idx) < 1) { 1162 spin_unlock_irqrestore(&priv->lock, flags); 1163 ieee80211_stop_queues(priv->hw); 1164 return -ENOMEM; 1165 } 1166 1167 head_td = priv->apCurrTD[dma_idx]; 1168 1169 head_td->td1.tcr = 0; 1170 1171 head_td->td_info->skb = skb; 1172 1173 if (dma_idx == TYPE_AC0DMA) 1174 head_td->td_info->flags = TD_FLAGS_NETIF_SKB; 1175 1176 priv->apCurrTD[dma_idx] = head_td->next; 1177 1178 spin_unlock_irqrestore(&priv->lock, flags); 1179 1180 vnt_generate_fifo_header(priv, dma_idx, head_td, skb); 1181 1182 spin_lock_irqsave(&priv->lock, flags); 1183 1184 priv->bPWBitOn = false; 1185 1186 /* Set TSR1 & ReqCount in TxDescHead */ 1187 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU); 1188 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count); 1189 1190 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma); 1191 1192 /* Poll Transmit the adapter */ 1193 wmb(); 1194 head_td->td0.owner = OWNED_BY_NIC; 1195 wmb(); /* second memory barrier */ 1196 1197 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB) 1198 MACvTransmitAC0(priv->PortOffset); 1199 else 1200 MACvTransmit0(priv->PortOffset); 1201 1202 priv->iTDUsed[dma_idx]++; 1203 1204 spin_unlock_irqrestore(&priv->lock, flags); 1205 1206 return 0; 1207 } 1208 1209 static void vnt_tx_80211(struct ieee80211_hw *hw, 1210 struct ieee80211_tx_control *control, 1211 struct sk_buff *skb) 1212 { 1213 struct vnt_private *priv = hw->priv; 1214 1215 if (vnt_tx_packet(priv, skb)) 1216 ieee80211_free_txskb(hw, skb); 1217 } 1218 1219 static int vnt_start(struct ieee80211_hw *hw) 1220 { 1221 struct vnt_private *priv = hw->priv; 1222 int ret; 1223 1224 priv->rx_buf_sz = PKT_BUF_SZ; 1225 if (!device_init_rings(priv)) 1226 return -ENOMEM; 1227 1228 ret = request_irq(priv->pcid->irq, vnt_interrupt, 1229 IRQF_SHARED, "vt6655", priv); 1230 if (ret) { 1231 dev_dbg(&priv->pcid->dev, "failed to start irq\n"); 1232 goto err_free_rings; 1233 } 1234 1235 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n"); 1236 ret = device_init_rd0_ring(priv); 1237 if (ret) 1238 goto err_free_irq; 1239 ret = device_init_rd1_ring(priv); 1240 if (ret) 1241 goto err_free_rd0_ring; 1242 ret = device_init_td0_ring(priv); 1243 if (ret) 1244 goto err_free_rd1_ring; 1245 ret = device_init_td1_ring(priv); 1246 if (ret) 1247 goto err_free_td0_ring; 1248 1249 device_init_registers(priv); 1250 1251 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n"); 1252 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1253 1254 ieee80211_wake_queues(hw); 1255 1256 return 0; 1257 1258 err_free_td0_ring: 1259 device_free_td0_ring(priv); 1260 err_free_rd1_ring: 1261 device_free_rd1_ring(priv); 1262 err_free_rd0_ring: 1263 device_free_rd0_ring(priv); 1264 err_free_irq: 1265 free_irq(priv->pcid->irq, priv); 1266 err_free_rings: 1267 device_free_rings(priv); 1268 return ret; 1269 } 1270 1271 static void vnt_stop(struct ieee80211_hw *hw) 1272 { 1273 struct vnt_private *priv = hw->priv; 1274 1275 ieee80211_stop_queues(hw); 1276 1277 cancel_work_sync(&priv->interrupt_work); 1278 1279 MACbShutdown(priv); 1280 MACbSoftwareReset(priv); 1281 CARDbRadioPowerOff(priv); 1282 1283 device_free_td0_ring(priv); 1284 device_free_td1_ring(priv); 1285 device_free_rd0_ring(priv); 1286 device_free_rd1_ring(priv); 1287 device_free_rings(priv); 1288 1289 free_irq(priv->pcid->irq, priv); 1290 } 1291 1292 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1293 { 1294 struct vnt_private *priv = hw->priv; 1295 1296 priv->vif = vif; 1297 1298 switch (vif->type) { 1299 case NL80211_IFTYPE_STATION: 1300 break; 1301 case NL80211_IFTYPE_ADHOC: 1302 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1303 1304 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1305 1306 break; 1307 case NL80211_IFTYPE_AP: 1308 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1309 1310 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1311 1312 break; 1313 default: 1314 return -EOPNOTSUPP; 1315 } 1316 1317 priv->op_mode = vif->type; 1318 1319 return 0; 1320 } 1321 1322 static void vnt_remove_interface(struct ieee80211_hw *hw, 1323 struct ieee80211_vif *vif) 1324 { 1325 struct vnt_private *priv = hw->priv; 1326 1327 switch (vif->type) { 1328 case NL80211_IFTYPE_STATION: 1329 break; 1330 case NL80211_IFTYPE_ADHOC: 1331 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1332 MACvRegBitsOff(priv->PortOffset, 1333 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1334 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1335 break; 1336 case NL80211_IFTYPE_AP: 1337 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1338 MACvRegBitsOff(priv->PortOffset, 1339 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1340 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1341 break; 1342 default: 1343 break; 1344 } 1345 1346 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED; 1347 } 1348 1349 static int vnt_config(struct ieee80211_hw *hw, u32 changed) 1350 { 1351 struct vnt_private *priv = hw->priv; 1352 struct ieee80211_conf *conf = &hw->conf; 1353 u8 bb_type; 1354 1355 if (changed & IEEE80211_CONF_CHANGE_PS) { 1356 if (conf->flags & IEEE80211_CONF_PS) 1357 PSvEnablePowerSaving(priv, conf->listen_interval); 1358 else 1359 PSvDisablePowerSaving(priv); 1360 } 1361 1362 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || 1363 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) { 1364 set_channel(priv, conf->chandef.chan); 1365 1366 if (conf->chandef.chan->band == NL80211_BAND_5GHZ) 1367 bb_type = BB_TYPE_11A; 1368 else 1369 bb_type = BB_TYPE_11G; 1370 1371 if (priv->byBBType != bb_type) { 1372 priv->byBBType = bb_type; 1373 1374 CARDbSetPhyParameter(priv, priv->byBBType); 1375 } 1376 } 1377 1378 if (changed & IEEE80211_CONF_CHANGE_POWER) { 1379 if (priv->byBBType == BB_TYPE_11B) 1380 priv->wCurrentRate = RATE_1M; 1381 else 1382 priv->wCurrentRate = RATE_54M; 1383 1384 RFbSetPower(priv, priv->wCurrentRate, 1385 conf->chandef.chan->hw_value); 1386 } 1387 1388 return 0; 1389 } 1390 1391 static void vnt_bss_info_changed(struct ieee80211_hw *hw, 1392 struct ieee80211_vif *vif, 1393 struct ieee80211_bss_conf *conf, u32 changed) 1394 { 1395 struct vnt_private *priv = hw->priv; 1396 1397 priv->current_aid = conf->aid; 1398 1399 if (changed & BSS_CHANGED_BSSID && conf->bssid) { 1400 unsigned long flags; 1401 1402 spin_lock_irqsave(&priv->lock, flags); 1403 1404 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid); 1405 1406 spin_unlock_irqrestore(&priv->lock, flags); 1407 } 1408 1409 if (changed & BSS_CHANGED_BASIC_RATES) { 1410 priv->basic_rates = conf->basic_rates; 1411 1412 CARDvUpdateBasicTopRate(priv); 1413 1414 dev_dbg(&priv->pcid->dev, 1415 "basic rates %x\n", conf->basic_rates); 1416 } 1417 1418 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1419 if (conf->use_short_preamble) { 1420 MACvEnableBarkerPreambleMd(priv->PortOffset); 1421 priv->byPreambleType = true; 1422 } else { 1423 MACvDisableBarkerPreambleMd(priv->PortOffset); 1424 priv->byPreambleType = false; 1425 } 1426 } 1427 1428 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1429 if (conf->use_cts_prot) 1430 MACvEnableProtectMD(priv->PortOffset); 1431 else 1432 MACvDisableProtectMD(priv->PortOffset); 1433 } 1434 1435 if (changed & BSS_CHANGED_ERP_SLOT) { 1436 if (conf->use_short_slot) 1437 priv->bShortSlotTime = true; 1438 else 1439 priv->bShortSlotTime = false; 1440 1441 CARDbSetPhyParameter(priv, priv->byBBType); 1442 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]); 1443 } 1444 1445 if (changed & BSS_CHANGED_TXPOWER) 1446 RFbSetPower(priv, priv->wCurrentRate, 1447 conf->chandef.chan->hw_value); 1448 1449 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1450 dev_dbg(&priv->pcid->dev, 1451 "Beacon enable %d\n", conf->enable_beacon); 1452 1453 if (conf->enable_beacon) { 1454 vnt_beacon_enable(priv, vif, conf); 1455 1456 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR, 1457 TCR_AUTOBCNTX); 1458 } else { 1459 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, 1460 TCR_AUTOBCNTX); 1461 } 1462 } 1463 1464 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) && 1465 priv->op_mode != NL80211_IFTYPE_AP) { 1466 if (conf->assoc && conf->beacon_rate) { 1467 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value, 1468 conf->sync_tsf); 1469 1470 CARDbSetBeaconPeriod(priv, conf->beacon_int); 1471 1472 CARDvSetFirstNextTBTT(priv, conf->beacon_int); 1473 } else { 1474 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1475 TFTCTL_TSFCNTRST); 1476 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1477 TFTCTL_TSFCNTREN); 1478 } 1479 } 1480 } 1481 1482 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw, 1483 struct netdev_hw_addr_list *mc_list) 1484 { 1485 struct vnt_private *priv = hw->priv; 1486 struct netdev_hw_addr *ha; 1487 u64 mc_filter = 0; 1488 u32 bit_nr = 0; 1489 1490 netdev_hw_addr_list_for_each(ha, mc_list) { 1491 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; 1492 1493 mc_filter |= 1ULL << (bit_nr & 0x3f); 1494 } 1495 1496 priv->mc_list_count = mc_list->count; 1497 1498 return mc_filter; 1499 } 1500 1501 static void vnt_configure(struct ieee80211_hw *hw, 1502 unsigned int changed_flags, 1503 unsigned int *total_flags, u64 multicast) 1504 { 1505 struct vnt_private *priv = hw->priv; 1506 u8 rx_mode = 0; 1507 1508 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC; 1509 1510 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode); 1511 1512 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode); 1513 1514 if (changed_flags & FIF_ALLMULTI) { 1515 if (*total_flags & FIF_ALLMULTI) { 1516 unsigned long flags; 1517 1518 spin_lock_irqsave(&priv->lock, flags); 1519 1520 if (priv->mc_list_count > 2) { 1521 MACvSelectPage1(priv->PortOffset); 1522 1523 VNSvOutPortD(priv->PortOffset + 1524 MAC_REG_MAR0, 0xffffffff); 1525 VNSvOutPortD(priv->PortOffset + 1526 MAC_REG_MAR0 + 4, 0xffffffff); 1527 1528 MACvSelectPage0(priv->PortOffset); 1529 } else { 1530 MACvSelectPage1(priv->PortOffset); 1531 1532 VNSvOutPortD(priv->PortOffset + 1533 MAC_REG_MAR0, (u32)multicast); 1534 VNSvOutPortD(priv->PortOffset + 1535 MAC_REG_MAR0 + 4, 1536 (u32)(multicast >> 32)); 1537 1538 MACvSelectPage0(priv->PortOffset); 1539 } 1540 1541 spin_unlock_irqrestore(&priv->lock, flags); 1542 1543 rx_mode |= RCR_MULTICAST | RCR_BROADCAST; 1544 } else { 1545 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST); 1546 } 1547 } 1548 1549 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) { 1550 rx_mode |= RCR_MULTICAST | RCR_BROADCAST; 1551 1552 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) 1553 rx_mode &= ~RCR_BSSID; 1554 else 1555 rx_mode |= RCR_BSSID; 1556 } 1557 1558 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode); 1559 1560 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode); 1561 } 1562 1563 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 1564 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 1565 struct ieee80211_key_conf *key) 1566 { 1567 struct vnt_private *priv = hw->priv; 1568 1569 switch (cmd) { 1570 case SET_KEY: 1571 if (vnt_set_keys(hw, sta, vif, key)) 1572 return -EOPNOTSUPP; 1573 break; 1574 case DISABLE_KEY: 1575 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) 1576 clear_bit(key->hw_key_idx, &priv->key_entry_inuse); 1577 default: 1578 break; 1579 } 1580 1581 return 0; 1582 } 1583 1584 static int vnt_get_stats(struct ieee80211_hw *hw, 1585 struct ieee80211_low_level_stats *stats) 1586 { 1587 struct vnt_private *priv = hw->priv; 1588 1589 memcpy(stats, &priv->low_stats, sizeof(*stats)); 1590 1591 return 0; 1592 } 1593 1594 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1595 { 1596 struct vnt_private *priv = hw->priv; 1597 u64 tsf; 1598 1599 CARDbGetCurrentTSF(priv, &tsf); 1600 1601 return tsf; 1602 } 1603 1604 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1605 u64 tsf) 1606 { 1607 struct vnt_private *priv = hw->priv; 1608 1609 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int); 1610 } 1611 1612 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1613 { 1614 struct vnt_private *priv = hw->priv; 1615 1616 /* reset TSF counter */ 1617 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1618 } 1619 1620 static const struct ieee80211_ops vnt_mac_ops = { 1621 .tx = vnt_tx_80211, 1622 .start = vnt_start, 1623 .stop = vnt_stop, 1624 .add_interface = vnt_add_interface, 1625 .remove_interface = vnt_remove_interface, 1626 .config = vnt_config, 1627 .bss_info_changed = vnt_bss_info_changed, 1628 .prepare_multicast = vnt_prepare_multicast, 1629 .configure_filter = vnt_configure, 1630 .set_key = vnt_set_key, 1631 .get_stats = vnt_get_stats, 1632 .get_tsf = vnt_get_tsf, 1633 .set_tsf = vnt_set_tsf, 1634 .reset_tsf = vnt_reset_tsf, 1635 }; 1636 1637 static int vnt_init(struct vnt_private *priv) 1638 { 1639 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr); 1640 1641 vnt_init_bands(priv); 1642 1643 if (ieee80211_register_hw(priv->hw)) 1644 return -ENODEV; 1645 1646 priv->mac_hw = true; 1647 1648 CARDbRadioPowerOff(priv); 1649 1650 return 0; 1651 } 1652 1653 static int 1654 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) 1655 { 1656 struct vnt_private *priv; 1657 struct ieee80211_hw *hw; 1658 struct wiphy *wiphy; 1659 int rc; 1660 1661 dev_notice(&pcid->dev, 1662 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION); 1663 1664 dev_notice(&pcid->dev, 1665 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n"); 1666 1667 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops); 1668 if (!hw) { 1669 dev_err(&pcid->dev, "could not register ieee80211_hw\n"); 1670 return -ENOMEM; 1671 } 1672 1673 priv = hw->priv; 1674 priv->pcid = pcid; 1675 1676 spin_lock_init(&priv->lock); 1677 1678 priv->hw = hw; 1679 1680 SET_IEEE80211_DEV(priv->hw, &pcid->dev); 1681 1682 if (pci_enable_device(pcid)) { 1683 device_free_info(priv); 1684 return -ENODEV; 1685 } 1686 1687 dev_dbg(&pcid->dev, 1688 "Before get pci_info memaddr is %x\n", priv->memaddr); 1689 1690 pci_set_master(pcid); 1691 1692 priv->memaddr = pci_resource_start(pcid, 0); 1693 priv->ioaddr = pci_resource_start(pcid, 1); 1694 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, 1695 256); 1696 if (!priv->PortOffset) { 1697 dev_err(&pcid->dev, ": Failed to IO remapping ..\n"); 1698 device_free_info(priv); 1699 return -ENODEV; 1700 } 1701 1702 rc = pci_request_regions(pcid, DEVICE_NAME); 1703 if (rc) { 1704 dev_err(&pcid->dev, ": Failed to find PCI device\n"); 1705 device_free_info(priv); 1706 return -ENODEV; 1707 } 1708 1709 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) { 1710 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n"); 1711 device_free_info(priv); 1712 return -ENODEV; 1713 } 1714 1715 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work); 1716 1717 /* do reset */ 1718 if (!MACbSoftwareReset(priv)) { 1719 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n"); 1720 device_free_info(priv); 1721 return -ENODEV; 1722 } 1723 /* initial to reload eeprom */ 1724 MACvInitialize(priv); 1725 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 1726 1727 /* Get RFType */ 1728 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE); 1729 priv->byRFType &= RF_MASK; 1730 1731 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType); 1732 1733 device_get_options(priv); 1734 device_set_options(priv); 1735 1736 wiphy = priv->hw->wiphy; 1737 1738 wiphy->frag_threshold = FRAG_THRESH_DEF; 1739 wiphy->rts_threshold = RTS_THRESH_DEF; 1740 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1741 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP); 1742 1743 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY); 1744 ieee80211_hw_set(priv->hw, SIGNAL_DBM); 1745 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS); 1746 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS); 1747 ieee80211_hw_set(priv->hw, SUPPORTS_PS); 1748 1749 priv->hw->max_signal = 100; 1750 1751 if (vnt_init(priv)) 1752 return -ENODEV; 1753 1754 device_print_info(priv); 1755 pci_set_drvdata(pcid, priv); 1756 1757 return 0; 1758 } 1759 1760 /*------------------------------------------------------------------*/ 1761 1762 #ifdef CONFIG_PM 1763 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state) 1764 { 1765 struct vnt_private *priv = pci_get_drvdata(pcid); 1766 unsigned long flags; 1767 1768 spin_lock_irqsave(&priv->lock, flags); 1769 1770 pci_save_state(pcid); 1771 1772 MACbShutdown(priv); 1773 1774 pci_disable_device(pcid); 1775 1776 spin_unlock_irqrestore(&priv->lock, flags); 1777 1778 pci_set_power_state(pcid, pci_choose_state(pcid, state)); 1779 1780 return 0; 1781 } 1782 1783 static int vt6655_resume(struct pci_dev *pcid) 1784 { 1785 pci_set_power_state(pcid, PCI_D0); 1786 pci_enable_wake(pcid, PCI_D0, 0); 1787 pci_restore_state(pcid); 1788 1789 return 0; 1790 } 1791 #endif 1792 1793 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table); 1794 1795 static struct pci_driver device_driver = { 1796 .name = DEVICE_NAME, 1797 .id_table = vt6655_pci_id_table, 1798 .probe = vt6655_probe, 1799 .remove = vt6655_remove, 1800 #ifdef CONFIG_PM 1801 .suspend = vt6655_suspend, 1802 .resume = vt6655_resume, 1803 #endif 1804 }; 1805 1806 module_pci_driver(device_driver); 1807