1 /* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * File: device.h 20 * 21 * Purpose: MAC Data structure 22 * 23 * Author: Tevin Chen 24 * 25 * Date: Mar 17, 1997 26 * 27 */ 28 29 #ifndef __DEVICE_H__ 30 #define __DEVICE_H__ 31 32 #include <linux/module.h> 33 #include <linux/types.h> 34 #include <linux/mm.h> 35 #include <linux/errno.h> 36 #include <linux/ioport.h> 37 #include <linux/pci.h> 38 #include <linux/kernel.h> 39 #include <linux/netdevice.h> 40 #include <linux/etherdevice.h> 41 #include <linux/skbuff.h> 42 #include <linux/delay.h> 43 #include <linux/timer.h> 44 #include <linux/slab.h> 45 #include <linux/interrupt.h> 46 #include <linux/string.h> 47 #include <linux/wait.h> 48 #include <linux/if_arp.h> 49 #include <linux/sched.h> 50 #include <linux/io.h> 51 #include <linux/if.h> 52 #include <linux/crc32.h> 53 #include <linux/uaccess.h> 54 #include <linux/proc_fs.h> 55 #include <linux/inetdevice.h> 56 #include <linux/reboot.h> 57 #include <linux/ethtool.h> 58 /* Include Wireless Extension definition and check version - Jean II */ 59 #include <net/mac80211.h> 60 #include <linux/wireless.h> 61 #include <net/iw_handler.h> /* New driver API */ 62 63 #ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 64 #define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT 65 #endif 66 67 /* device specific */ 68 69 #include "device_cfg.h" 70 #include "card.h" 71 #include "srom.h" 72 #include "desc.h" 73 #include "key.h" 74 #include "mac.h" 75 76 /*--------------------- Export Definitions -------------------------*/ 77 78 #define RATE_1M 0 79 #define RATE_2M 1 80 #define RATE_5M 2 81 #define RATE_11M 3 82 #define RATE_6M 4 83 #define RATE_9M 5 84 #define RATE_12M 6 85 #define RATE_18M 7 86 #define RATE_24M 8 87 #define RATE_36M 9 88 #define RATE_48M 10 89 #define RATE_54M 11 90 #define RATE_AUTO 12 91 #define MAX_RATE 12 92 93 #define MAC_MAX_CONTEXT_REG (256+128) 94 95 #define MAX_MULTICAST_ADDRESS_NUM 32 96 #define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN) 97 98 #define DUPLICATE_RX_CACHE_LENGTH 5 99 100 #define NUM_KEY_ENTRY 11 101 102 #define TX_WEP_NONE 0 103 #define TX_WEP_OTF 1 104 #define TX_WEP_SW 2 105 #define TX_WEP_SWOTP 3 106 #define TX_WEP_OTPSW 4 107 #define TX_WEP_SW232 5 108 109 #define KEYSEL_WEP40 0 110 #define KEYSEL_WEP104 1 111 #define KEYSEL_TKIP 2 112 #define KEYSEL_CCMP 3 113 114 #define AUTO_FB_NONE 0 115 #define AUTO_FB_0 1 116 #define AUTO_FB_1 2 117 118 #define FB_RATE0 0 119 #define FB_RATE1 1 120 121 /* Antenna Mode */ 122 #define ANT_A 0 123 #define ANT_B 1 124 #define ANT_DIVERSITY 2 125 #define ANT_RXD_TXA 3 126 #define ANT_RXD_TXB 4 127 #define ANT_UNKNOWN 0xFF 128 129 #define MAXCHECKHANGCNT 4 130 131 #define BB_VGA_LEVEL 4 132 #define BB_VGA_CHANGE_THRESHOLD 16 133 134 #ifndef RUN_AT 135 #define RUN_AT(x) (jiffies+(x)) 136 #endif 137 138 #define MAKE_BEACON_RESERVED 10 /* (us) */ 139 140 /* DMA related */ 141 #define RESERV_AC0DMA 4 142 143 /* BUILD OBJ mode */ 144 145 #define AVAIL_TD(p, q) ((p)->sOpts.nTxDescs[(q)] - ((p)->iTDUsed[(q)])) 146 147 #define NUM 64 148 149 /* 0:11A 1:11B 2:11G */ 150 #define BB_TYPE_11A 0 151 #define BB_TYPE_11B 1 152 #define BB_TYPE_11G 2 153 154 /* 0:11a, 1:11b, 2:11gb (only CCK in BasicRate), 3:11ga (OFDM in BasicRate) */ 155 #define PK_TYPE_11A 0 156 #define PK_TYPE_11B 1 157 #define PK_TYPE_11GB 2 158 #define PK_TYPE_11GA 3 159 160 typedef struct __chip_info_tbl { 161 CHIP_TYPE chip_id; 162 char *name; 163 int io_size; 164 int nTxQueue; 165 u32 flags; 166 } CHIP_INFO, *PCHIP_INFO; 167 168 typedef enum { 169 OWNED_BY_HOST = 0, 170 OWNED_BY_NIC = 1 171 } DEVICE_OWNER_TYPE, *PDEVICE_OWNER_TYPE; 172 173 /* flags for options */ 174 #define DEVICE_FLAGS_IP_ALIGN 0x00000001UL 175 #define DEVICE_FLAGS_PREAMBLE_TYPE 0x00000002UL 176 #define DEVICE_FLAGS_OP_MODE 0x00000004UL 177 #define DEVICE_FLAGS_PS_MODE 0x00000008UL 178 #define DEVICE_FLAGS_80211h_MODE 0x00000010UL 179 #define DEVICE_FLAGS_DiversityANT 0x00000020UL 180 181 /* flags for driver status */ 182 #define DEVICE_FLAGS_OPENED 0x00010000UL 183 #define DEVICE_FLAGS_WOL_ENABLED 0x00080000UL 184 /* flags for capabilities */ 185 #define DEVICE_FLAGS_TX_ALIGN 0x01000000UL 186 #define DEVICE_FLAGS_HAVE_CAM 0x02000000UL 187 #define DEVICE_FLAGS_FLOW_CTRL 0x04000000UL 188 189 /* flags for MII status */ 190 #define DEVICE_LINK_FAIL 0x00000001UL 191 #define DEVICE_SPEED_10 0x00000002UL 192 #define DEVICE_SPEED_100 0x00000004UL 193 #define DEVICE_SPEED_1000 0x00000008UL 194 #define DEVICE_DUPLEX_FULL 0x00000010UL 195 #define DEVICE_AUTONEG_ENABLE 0x00000020UL 196 #define DEVICE_FORCED_BY_EEPROM 0x00000040UL 197 /* for device_set_media_duplex */ 198 #define DEVICE_LINK_CHANGE 0x00000001UL 199 200 typedef struct __device_opt { 201 int nRxDescs0; /* Number of RX descriptors0 */ 202 int nRxDescs1; /* Number of RX descriptors1 */ 203 int nTxDescs[2]; /* Number of TX descriptors 0, 1 */ 204 int int_works; /* interrupt limits */ 205 int short_retry; 206 int long_retry; 207 int bbp_type; 208 u32 flags; 209 } OPTIONS, *POPTIONS; 210 211 struct vnt_private { 212 struct pci_dev *pcid; 213 /* mac80211 */ 214 struct ieee80211_hw *hw; 215 struct ieee80211_vif *vif; 216 unsigned long key_entry_inuse; 217 u32 basic_rates; 218 u16 current_aid; 219 int mc_list_count; 220 u8 mac_hw; 221 222 /* dma addr, rx/tx pool */ 223 dma_addr_t pool_dma; 224 dma_addr_t rd0_pool_dma; 225 dma_addr_t rd1_pool_dma; 226 227 dma_addr_t td0_pool_dma; 228 dma_addr_t td1_pool_dma; 229 230 dma_addr_t tx_bufs_dma0; 231 dma_addr_t tx_bufs_dma1; 232 dma_addr_t tx_beacon_dma; 233 234 unsigned char *tx0_bufs; 235 unsigned char *tx1_bufs; 236 unsigned char *tx_beacon_bufs; 237 238 CHIP_TYPE chip_id; 239 240 void __iomem *PortOffset; 241 u32 memaddr; 242 u32 ioaddr; 243 u32 io_size; 244 245 unsigned char byRevId; 246 unsigned char byRxMode; 247 unsigned short SubSystemID; 248 unsigned short SubVendorID; 249 250 spinlock_t lock; 251 252 int nTxQueues; 253 volatile int iTDUsed[TYPE_MAXTD]; 254 255 struct vnt_tx_desc *apCurrTD[TYPE_MAXTD]; 256 struct vnt_tx_desc *apTailTD[TYPE_MAXTD]; 257 258 struct vnt_tx_desc *apTD0Rings; 259 struct vnt_tx_desc *apTD1Rings; 260 261 volatile PSRxDesc aRD0Ring; 262 volatile PSRxDesc aRD1Ring; 263 volatile PSRxDesc pCurrRD[TYPE_MAXRD]; 264 265 OPTIONS sOpts; 266 267 u32 flags; 268 269 u32 rx_buf_sz; 270 u8 rx_rate; 271 int multicast_limit; 272 273 u32 rx_bytes; 274 275 /* Version control */ 276 unsigned char byLocalID; 277 unsigned char byRFType; 278 279 unsigned char byMaxPwrLevel; 280 unsigned char byZoneType; 281 bool bZoneRegExist; 282 unsigned char byOriginalZonetype; 283 284 unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2) 285 bool bLinkPass; /* link status: OK or fail */ 286 287 unsigned int uCurrRSSI; 288 unsigned char byCurrSQ; 289 290 unsigned long dwTxAntennaSel; 291 unsigned long dwRxAntennaSel; 292 unsigned char byAntennaCount; 293 unsigned char byRxAntennaMode; 294 unsigned char byTxAntennaMode; 295 bool bTxRxAntInv; 296 297 unsigned char *pbyTmpBuff; 298 unsigned int uSIFS; /* Current SIFS */ 299 unsigned int uDIFS; /* Current DIFS */ 300 unsigned int uEIFS; /* Current EIFS */ 301 unsigned int uSlot; /* Current SlotTime */ 302 unsigned int uCwMin; /* Current CwMin */ 303 unsigned int uCwMax; /* CwMax is fixed on 1023. */ 304 /* PHY parameter */ 305 unsigned char bySIFS; 306 unsigned char byDIFS; 307 unsigned char byEIFS; 308 unsigned char bySlot; 309 unsigned char byCWMaxMin; 310 311 u8 byBBType; /* 0:11A, 1:11B, 2:11G */ 312 u8 byPacketType; /* 313 * 0:11a,1:11b,2:11gb (only CCK 314 * in BasicRate), 3:11ga (OFDM in 315 * Basic Rate) 316 */ 317 unsigned short wBasicRate; 318 unsigned char byACKRate; 319 unsigned char byTopOFDMBasicRate; 320 unsigned char byTopCCKBasicRate; 321 322 unsigned char byMinChannel; 323 unsigned char byMaxChannel; 324 325 unsigned char byPreambleType; 326 unsigned char byShortPreamble; 327 328 unsigned short wCurrentRate; 329 unsigned char byShortRetryLimit; 330 unsigned char byLongRetryLimit; 331 enum nl80211_iftype op_mode; 332 bool bBSSIDFilter; 333 unsigned short wMaxTransmitMSDULifetime; 334 335 bool bEncryptionEnable; 336 bool bLongHeader; 337 bool bShortSlotTime; 338 bool bProtectMode; 339 bool bNonERPPresent; 340 bool bBarkerPreambleMd; 341 342 bool bRadioControlOff; 343 bool bRadioOff; 344 bool bEnablePSMode; 345 unsigned short wListenInterval; 346 bool bPWBitOn; 347 348 /* GPIO Radio Control */ 349 unsigned char byRadioCtl; 350 unsigned char byGPIO; 351 bool bHWRadioOff; 352 bool bPrvActive4RadioOFF; 353 bool bGPIOBlockRead; 354 355 /* Beacon related */ 356 unsigned short wSeqCounter; 357 unsigned short wBCNBufLen; 358 bool bBeaconBufReady; 359 bool bBeaconSent; 360 bool bIsBeaconBufReadySet; 361 unsigned int cbBeaconBufReadySetCnt; 362 bool bFixRate; 363 u16 byCurrentCh; 364 365 bool bAES; 366 367 unsigned char byAutoFBCtrl; 368 369 /* For Update BaseBand VGA Gain Offset */ 370 bool bUpdateBBVGA; 371 unsigned int uBBVGADiffCount; 372 unsigned char byBBVGANew; 373 unsigned char byBBVGACurrent; 374 unsigned char abyBBVGA[BB_VGA_LEVEL]; 375 long ldBmThreshold[BB_VGA_LEVEL]; 376 377 unsigned char byBBPreEDRSSI; 378 unsigned char byBBPreEDIndex; 379 380 unsigned long dwDiagRefCount; 381 382 /* For FOE Tuning */ 383 unsigned char byFOETuning; 384 385 /* For RF Power table */ 386 unsigned char byCCKPwr; 387 unsigned char byOFDMPwrG; 388 unsigned char byCurPwr; 389 char byCurPwrdBm; 390 unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G+1]; 391 unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL+1]; 392 char abyCCKDefaultPwr[CB_MAX_CHANNEL_24G+1]; 393 char abyOFDMDefaultPwr[CB_MAX_CHANNEL+1]; 394 char abyRegPwr[CB_MAX_CHANNEL+1]; 395 char abyLocalPwr[CB_MAX_CHANNEL+1]; 396 397 /* BaseBand Loopback Use */ 398 unsigned char byBBCR4d; 399 unsigned char byBBCRc9; 400 unsigned char byBBCR88; 401 unsigned char byBBCR09; 402 403 unsigned char abyEEPROM[EEP_MAX_CONTEXT_SIZE]; /* unsigned long alignment */ 404 405 unsigned short wBeaconInterval; 406 u16 wake_up_count; 407 408 struct work_struct interrupt_work; 409 410 struct ieee80211_low_level_stats low_stats; 411 }; 412 413 static inline PDEVICE_RD_INFO alloc_rd_info(void) 414 { 415 return kzalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC); 416 } 417 418 static inline struct vnt_td_info *alloc_td_info(void) 419 { 420 return kzalloc(sizeof(struct vnt_td_info), GFP_ATOMIC); 421 } 422 #endif 423