1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 4 * All rights reserved. 5 * 6 * Purpose: Implement functions to access baseband 7 * 8 * Author: Kyle Hsu 9 * 10 * Date: Aug.22, 2002 11 * 12 * Functions: 13 * bb_get_frame_time - Calculate data frame transmitting time 14 * bb_read_embedded - Embedded read baseband register via MAC 15 * bb_write_embedded - Embedded write baseband register via MAC 16 * bb_vt3253_init - VIA VT3253 baseband chip init code 17 * 18 * Revision History: 19 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. 20 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support. 21 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and 22 * BBvCalculateParameter(). 23 * cancel the setting of MAC_REG_SOFTPWRCTL on 24 * BBbVT3253Init(). 25 * Add the comments. 26 * 09-01-2003 Bryan YC Fan: RF & BB tables updated. 27 * Modified BBvLoopbackOn & BBvLoopbackOff(). 28 * 29 * 30 */ 31 32 #include "tmacro.h" 33 #include "mac.h" 34 #include "baseband.h" 35 #include "srom.h" 36 #include "rf.h" 37 38 /*--------------------- Static Classes ----------------------------*/ 39 40 /*--------------------- Static Variables --------------------------*/ 41 42 /*--------------------- Static Functions --------------------------*/ 43 44 /*--------------------- Export Variables --------------------------*/ 45 46 /*--------------------- Static Definitions -------------------------*/ 47 48 /*--------------------- Static Classes ----------------------------*/ 49 50 /*--------------------- Static Variables --------------------------*/ 51 52 #define CB_VT3253_INIT_FOR_RFMD 446 53 static const unsigned char by_vt3253_init_tab_rfmd[CB_VT3253_INIT_FOR_RFMD][2] = { 54 {0x00, 0x30}, 55 {0x01, 0x00}, 56 {0x02, 0x00}, 57 {0x03, 0x00}, 58 {0x04, 0x00}, 59 {0x05, 0x00}, 60 {0x06, 0x00}, 61 {0x07, 0x00}, 62 {0x08, 0x70}, 63 {0x09, 0x45}, 64 {0x0a, 0x2a}, 65 {0x0b, 0x76}, 66 {0x0c, 0x00}, 67 {0x0d, 0x01}, 68 {0x0e, 0x80}, 69 {0x0f, 0x00}, 70 {0x10, 0x00}, 71 {0x11, 0x00}, 72 {0x12, 0x00}, 73 {0x13, 0x00}, 74 {0x14, 0x00}, 75 {0x15, 0x00}, 76 {0x16, 0x00}, 77 {0x17, 0x00}, 78 {0x18, 0x00}, 79 {0x19, 0x00}, 80 {0x1a, 0x00}, 81 {0x1b, 0x9d}, 82 {0x1c, 0x05}, 83 {0x1d, 0x00}, 84 {0x1e, 0x00}, 85 {0x1f, 0x00}, 86 {0x20, 0x00}, 87 {0x21, 0x00}, 88 {0x22, 0x00}, 89 {0x23, 0x00}, 90 {0x24, 0x00}, 91 {0x25, 0x4a}, 92 {0x26, 0x00}, 93 {0x27, 0x00}, 94 {0x28, 0x00}, 95 {0x29, 0x00}, 96 {0x2a, 0x00}, 97 {0x2b, 0x00}, 98 {0x2c, 0x00}, 99 {0x2d, 0xa8}, 100 {0x2e, 0x1a}, 101 {0x2f, 0x0c}, 102 {0x30, 0x26}, 103 {0x31, 0x5b}, 104 {0x32, 0x00}, 105 {0x33, 0x00}, 106 {0x34, 0x00}, 107 {0x35, 0x00}, 108 {0x36, 0xaa}, 109 {0x37, 0xaa}, 110 {0x38, 0xff}, 111 {0x39, 0xff}, 112 {0x3a, 0x00}, 113 {0x3b, 0x00}, 114 {0x3c, 0x00}, 115 {0x3d, 0x0d}, 116 {0x3e, 0x51}, 117 {0x3f, 0x04}, 118 {0x40, 0x00}, 119 {0x41, 0x08}, 120 {0x42, 0x00}, 121 {0x43, 0x08}, 122 {0x44, 0x06}, 123 {0x45, 0x14}, 124 {0x46, 0x05}, 125 {0x47, 0x08}, 126 {0x48, 0x00}, 127 {0x49, 0x00}, 128 {0x4a, 0x00}, 129 {0x4b, 0x00}, 130 {0x4c, 0x09}, 131 {0x4d, 0x80}, 132 {0x4e, 0x00}, 133 {0x4f, 0xc5}, 134 {0x50, 0x14}, 135 {0x51, 0x19}, 136 {0x52, 0x00}, 137 {0x53, 0x00}, 138 {0x54, 0x00}, 139 {0x55, 0x00}, 140 {0x56, 0x00}, 141 {0x57, 0x00}, 142 {0x58, 0x00}, 143 {0x59, 0xb0}, 144 {0x5a, 0x00}, 145 {0x5b, 0x00}, 146 {0x5c, 0x00}, 147 {0x5d, 0x00}, 148 {0x5e, 0x00}, 149 {0x5f, 0x00}, 150 {0x60, 0x44}, 151 {0x61, 0x04}, 152 {0x62, 0x00}, 153 {0x63, 0x00}, 154 {0x64, 0x00}, 155 {0x65, 0x00}, 156 {0x66, 0x04}, 157 {0x67, 0xb7}, 158 {0x68, 0x00}, 159 {0x69, 0x00}, 160 {0x6a, 0x00}, 161 {0x6b, 0x00}, 162 {0x6c, 0x00}, 163 {0x6d, 0x03}, 164 {0x6e, 0x01}, 165 {0x6f, 0x00}, 166 {0x70, 0x00}, 167 {0x71, 0x00}, 168 {0x72, 0x00}, 169 {0x73, 0x00}, 170 {0x74, 0x00}, 171 {0x75, 0x00}, 172 {0x76, 0x00}, 173 {0x77, 0x00}, 174 {0x78, 0x00}, 175 {0x79, 0x00}, 176 {0x7a, 0x00}, 177 {0x7b, 0x00}, 178 {0x7c, 0x00}, 179 {0x7d, 0x00}, 180 {0x7e, 0x00}, 181 {0x7f, 0x00}, 182 {0x80, 0x0b}, 183 {0x81, 0x00}, 184 {0x82, 0x3c}, 185 {0x83, 0x00}, 186 {0x84, 0x00}, 187 {0x85, 0x00}, 188 {0x86, 0x00}, 189 {0x87, 0x00}, 190 {0x88, 0x08}, 191 {0x89, 0x00}, 192 {0x8a, 0x08}, 193 {0x8b, 0xa6}, 194 {0x8c, 0x84}, 195 {0x8d, 0x47}, 196 {0x8e, 0xbb}, 197 {0x8f, 0x02}, 198 {0x90, 0x21}, 199 {0x91, 0x0c}, 200 {0x92, 0x04}, 201 {0x93, 0x22}, 202 {0x94, 0x00}, 203 {0x95, 0x00}, 204 {0x96, 0x00}, 205 {0x97, 0xeb}, 206 {0x98, 0x00}, 207 {0x99, 0x00}, 208 {0x9a, 0x00}, 209 {0x9b, 0x00}, 210 {0x9c, 0x00}, 211 {0x9d, 0x00}, 212 {0x9e, 0x00}, 213 {0x9f, 0x00}, 214 {0xa0, 0x00}, 215 {0xa1, 0x00}, 216 {0xa2, 0x00}, 217 {0xa3, 0x00}, 218 {0xa4, 0x00}, 219 {0xa5, 0x00}, 220 {0xa6, 0x10}, 221 {0xa7, 0x04}, 222 {0xa8, 0x10}, 223 {0xa9, 0x00}, 224 {0xaa, 0x8f}, 225 {0xab, 0x00}, 226 {0xac, 0x00}, 227 {0xad, 0x00}, 228 {0xae, 0x00}, 229 {0xaf, 0x80}, 230 {0xb0, 0x38}, 231 {0xb1, 0x00}, 232 {0xb2, 0x00}, 233 {0xb3, 0x00}, 234 {0xb4, 0xee}, 235 {0xb5, 0xff}, 236 {0xb6, 0x10}, 237 {0xb7, 0x00}, 238 {0xb8, 0x00}, 239 {0xb9, 0x00}, 240 {0xba, 0x00}, 241 {0xbb, 0x03}, 242 {0xbc, 0x00}, 243 {0xbd, 0x00}, 244 {0xbe, 0x00}, 245 {0xbf, 0x00}, 246 {0xc0, 0x10}, 247 {0xc1, 0x10}, 248 {0xc2, 0x18}, 249 {0xc3, 0x20}, 250 {0xc4, 0x10}, 251 {0xc5, 0x00}, 252 {0xc6, 0x22}, 253 {0xc7, 0x14}, 254 {0xc8, 0x0f}, 255 {0xc9, 0x08}, 256 {0xca, 0xa4}, 257 {0xcb, 0xa7}, 258 {0xcc, 0x3c}, 259 {0xcd, 0x10}, 260 {0xce, 0x20}, 261 {0xcf, 0x00}, 262 {0xd0, 0x00}, 263 {0xd1, 0x10}, 264 {0xd2, 0x00}, 265 {0xd3, 0x00}, 266 {0xd4, 0x10}, 267 {0xd5, 0x33}, 268 {0xd6, 0x70}, 269 {0xd7, 0x01}, 270 {0xd8, 0x00}, 271 {0xd9, 0x00}, 272 {0xda, 0x00}, 273 {0xdb, 0x00}, 274 {0xdc, 0x00}, 275 {0xdd, 0x00}, 276 {0xde, 0x00}, 277 {0xdf, 0x00}, 278 {0xe0, 0x00}, 279 {0xe1, 0x00}, 280 {0xe2, 0xcc}, 281 {0xe3, 0x04}, 282 {0xe4, 0x08}, 283 {0xe5, 0x10}, 284 {0xe6, 0x00}, 285 {0xe7, 0x0e}, 286 {0xe8, 0x88}, 287 {0xe9, 0xd4}, 288 {0xea, 0x05}, 289 {0xeb, 0xf0}, 290 {0xec, 0x79}, 291 {0xed, 0x0f}, 292 {0xee, 0x04}, 293 {0xef, 0x04}, 294 {0xf0, 0x00}, 295 {0xf1, 0x00}, 296 {0xf2, 0x00}, 297 {0xf3, 0x00}, 298 {0xf4, 0x00}, 299 {0xf5, 0x00}, 300 {0xf6, 0x00}, 301 {0xf7, 0x00}, 302 {0xf8, 0x00}, 303 {0xf9, 0x00}, 304 {0xF0, 0x00}, 305 {0xF1, 0xF8}, 306 {0xF0, 0x80}, 307 {0xF0, 0x00}, 308 {0xF1, 0xF4}, 309 {0xF0, 0x81}, 310 {0xF0, 0x01}, 311 {0xF1, 0xF0}, 312 {0xF0, 0x82}, 313 {0xF0, 0x02}, 314 {0xF1, 0xEC}, 315 {0xF0, 0x83}, 316 {0xF0, 0x03}, 317 {0xF1, 0xE8}, 318 {0xF0, 0x84}, 319 {0xF0, 0x04}, 320 {0xF1, 0xE4}, 321 {0xF0, 0x85}, 322 {0xF0, 0x05}, 323 {0xF1, 0xE0}, 324 {0xF0, 0x86}, 325 {0xF0, 0x06}, 326 {0xF1, 0xDC}, 327 {0xF0, 0x87}, 328 {0xF0, 0x07}, 329 {0xF1, 0xD8}, 330 {0xF0, 0x88}, 331 {0xF0, 0x08}, 332 {0xF1, 0xD4}, 333 {0xF0, 0x89}, 334 {0xF0, 0x09}, 335 {0xF1, 0xD0}, 336 {0xF0, 0x8A}, 337 {0xF0, 0x0A}, 338 {0xF1, 0xCC}, 339 {0xF0, 0x8B}, 340 {0xF0, 0x0B}, 341 {0xF1, 0xC8}, 342 {0xF0, 0x8C}, 343 {0xF0, 0x0C}, 344 {0xF1, 0xC4}, 345 {0xF0, 0x8D}, 346 {0xF0, 0x0D}, 347 {0xF1, 0xC0}, 348 {0xF0, 0x8E}, 349 {0xF0, 0x0E}, 350 {0xF1, 0xBC}, 351 {0xF0, 0x8F}, 352 {0xF0, 0x0F}, 353 {0xF1, 0xB8}, 354 {0xF0, 0x90}, 355 {0xF0, 0x10}, 356 {0xF1, 0xB4}, 357 {0xF0, 0x91}, 358 {0xF0, 0x11}, 359 {0xF1, 0xB0}, 360 {0xF0, 0x92}, 361 {0xF0, 0x12}, 362 {0xF1, 0xAC}, 363 {0xF0, 0x93}, 364 {0xF0, 0x13}, 365 {0xF1, 0xA8}, 366 {0xF0, 0x94}, 367 {0xF0, 0x14}, 368 {0xF1, 0xA4}, 369 {0xF0, 0x95}, 370 {0xF0, 0x15}, 371 {0xF1, 0xA0}, 372 {0xF0, 0x96}, 373 {0xF0, 0x16}, 374 {0xF1, 0x9C}, 375 {0xF0, 0x97}, 376 {0xF0, 0x17}, 377 {0xF1, 0x98}, 378 {0xF0, 0x98}, 379 {0xF0, 0x18}, 380 {0xF1, 0x94}, 381 {0xF0, 0x99}, 382 {0xF0, 0x19}, 383 {0xF1, 0x90}, 384 {0xF0, 0x9A}, 385 {0xF0, 0x1A}, 386 {0xF1, 0x8C}, 387 {0xF0, 0x9B}, 388 {0xF0, 0x1B}, 389 {0xF1, 0x88}, 390 {0xF0, 0x9C}, 391 {0xF0, 0x1C}, 392 {0xF1, 0x84}, 393 {0xF0, 0x9D}, 394 {0xF0, 0x1D}, 395 {0xF1, 0x80}, 396 {0xF0, 0x9E}, 397 {0xF0, 0x1E}, 398 {0xF1, 0x7C}, 399 {0xF0, 0x9F}, 400 {0xF0, 0x1F}, 401 {0xF1, 0x78}, 402 {0xF0, 0xA0}, 403 {0xF0, 0x20}, 404 {0xF1, 0x74}, 405 {0xF0, 0xA1}, 406 {0xF0, 0x21}, 407 {0xF1, 0x70}, 408 {0xF0, 0xA2}, 409 {0xF0, 0x22}, 410 {0xF1, 0x6C}, 411 {0xF0, 0xA3}, 412 {0xF0, 0x23}, 413 {0xF1, 0x68}, 414 {0xF0, 0xA4}, 415 {0xF0, 0x24}, 416 {0xF1, 0x64}, 417 {0xF0, 0xA5}, 418 {0xF0, 0x25}, 419 {0xF1, 0x60}, 420 {0xF0, 0xA6}, 421 {0xF0, 0x26}, 422 {0xF1, 0x5C}, 423 {0xF0, 0xA7}, 424 {0xF0, 0x27}, 425 {0xF1, 0x58}, 426 {0xF0, 0xA8}, 427 {0xF0, 0x28}, 428 {0xF1, 0x54}, 429 {0xF0, 0xA9}, 430 {0xF0, 0x29}, 431 {0xF1, 0x50}, 432 {0xF0, 0xAA}, 433 {0xF0, 0x2A}, 434 {0xF1, 0x4C}, 435 {0xF0, 0xAB}, 436 {0xF0, 0x2B}, 437 {0xF1, 0x48}, 438 {0xF0, 0xAC}, 439 {0xF0, 0x2C}, 440 {0xF1, 0x44}, 441 {0xF0, 0xAD}, 442 {0xF0, 0x2D}, 443 {0xF1, 0x40}, 444 {0xF0, 0xAE}, 445 {0xF0, 0x2E}, 446 {0xF1, 0x3C}, 447 {0xF0, 0xAF}, 448 {0xF0, 0x2F}, 449 {0xF1, 0x38}, 450 {0xF0, 0xB0}, 451 {0xF0, 0x30}, 452 {0xF1, 0x34}, 453 {0xF0, 0xB1}, 454 {0xF0, 0x31}, 455 {0xF1, 0x30}, 456 {0xF0, 0xB2}, 457 {0xF0, 0x32}, 458 {0xF1, 0x2C}, 459 {0xF0, 0xB3}, 460 {0xF0, 0x33}, 461 {0xF1, 0x28}, 462 {0xF0, 0xB4}, 463 {0xF0, 0x34}, 464 {0xF1, 0x24}, 465 {0xF0, 0xB5}, 466 {0xF0, 0x35}, 467 {0xF1, 0x20}, 468 {0xF0, 0xB6}, 469 {0xF0, 0x36}, 470 {0xF1, 0x1C}, 471 {0xF0, 0xB7}, 472 {0xF0, 0x37}, 473 {0xF1, 0x18}, 474 {0xF0, 0xB8}, 475 {0xF0, 0x38}, 476 {0xF1, 0x14}, 477 {0xF0, 0xB9}, 478 {0xF0, 0x39}, 479 {0xF1, 0x10}, 480 {0xF0, 0xBA}, 481 {0xF0, 0x3A}, 482 {0xF1, 0x0C}, 483 {0xF0, 0xBB}, 484 {0xF0, 0x3B}, 485 {0xF1, 0x08}, 486 {0xF0, 0x00}, 487 {0xF0, 0x3C}, 488 {0xF1, 0x04}, 489 {0xF0, 0xBD}, 490 {0xF0, 0x3D}, 491 {0xF1, 0x00}, 492 {0xF0, 0xBE}, 493 {0xF0, 0x3E}, 494 {0xF1, 0x00}, 495 {0xF0, 0xBF}, 496 {0xF0, 0x3F}, 497 {0xF1, 0x00}, 498 {0xF0, 0xC0}, 499 {0xF0, 0x00}, 500 }; 501 502 #define CB_VT3253B0_INIT_FOR_RFMD 256 503 static const unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = { 504 {0x00, 0x31}, 505 {0x01, 0x00}, 506 {0x02, 0x00}, 507 {0x03, 0x00}, 508 {0x04, 0x00}, 509 {0x05, 0x81}, 510 {0x06, 0x00}, 511 {0x07, 0x00}, 512 {0x08, 0x38}, 513 {0x09, 0x45}, 514 {0x0a, 0x2a}, 515 {0x0b, 0x76}, 516 {0x0c, 0x00}, 517 {0x0d, 0x00}, 518 {0x0e, 0x80}, 519 {0x0f, 0x00}, 520 {0x10, 0x00}, 521 {0x11, 0x00}, 522 {0x12, 0x00}, 523 {0x13, 0x00}, 524 {0x14, 0x00}, 525 {0x15, 0x00}, 526 {0x16, 0x00}, 527 {0x17, 0x00}, 528 {0x18, 0x00}, 529 {0x19, 0x00}, 530 {0x1a, 0x00}, 531 {0x1b, 0x8e}, 532 {0x1c, 0x06}, 533 {0x1d, 0x00}, 534 {0x1e, 0x00}, 535 {0x1f, 0x00}, 536 {0x20, 0x00}, 537 {0x21, 0x00}, 538 {0x22, 0x00}, 539 {0x23, 0x00}, 540 {0x24, 0x00}, 541 {0x25, 0x4a}, 542 {0x26, 0x00}, 543 {0x27, 0x00}, 544 {0x28, 0x00}, 545 {0x29, 0x00}, 546 {0x2a, 0x00}, 547 {0x2b, 0x00}, 548 {0x2c, 0x00}, 549 {0x2d, 0x34}, 550 {0x2e, 0x18}, 551 {0x2f, 0x0c}, 552 {0x30, 0x26}, 553 {0x31, 0x5b}, 554 {0x32, 0x00}, 555 {0x33, 0x00}, 556 {0x34, 0x00}, 557 {0x35, 0x00}, 558 {0x36, 0xaa}, 559 {0x37, 0xaa}, 560 {0x38, 0xff}, 561 {0x39, 0xff}, 562 {0x3a, 0xf8}, 563 {0x3b, 0x00}, 564 {0x3c, 0x00}, 565 {0x3d, 0x09}, 566 {0x3e, 0x0d}, 567 {0x3f, 0x04}, 568 {0x40, 0x00}, 569 {0x41, 0x08}, 570 {0x42, 0x00}, 571 {0x43, 0x08}, 572 {0x44, 0x08}, 573 {0x45, 0x14}, 574 {0x46, 0x05}, 575 {0x47, 0x08}, 576 {0x48, 0x00}, 577 {0x49, 0x00}, 578 {0x4a, 0x00}, 579 {0x4b, 0x00}, 580 {0x4c, 0x09}, 581 {0x4d, 0x80}, 582 {0x4e, 0x00}, 583 {0x4f, 0xc5}, 584 {0x50, 0x14}, 585 {0x51, 0x19}, 586 {0x52, 0x00}, 587 {0x53, 0x00}, 588 {0x54, 0x00}, 589 {0x55, 0x00}, 590 {0x56, 0x00}, 591 {0x57, 0x00}, 592 {0x58, 0x00}, 593 {0x59, 0xb0}, 594 {0x5a, 0x00}, 595 {0x5b, 0x00}, 596 {0x5c, 0x00}, 597 {0x5d, 0x00}, 598 {0x5e, 0x00}, 599 {0x5f, 0x00}, 600 {0x60, 0x39}, 601 {0x61, 0x83}, 602 {0x62, 0x00}, 603 {0x63, 0x00}, 604 {0x64, 0x00}, 605 {0x65, 0x00}, 606 {0x66, 0xc0}, 607 {0x67, 0x49}, 608 {0x68, 0x00}, 609 {0x69, 0x00}, 610 {0x6a, 0x00}, 611 {0x6b, 0x00}, 612 {0x6c, 0x00}, 613 {0x6d, 0x03}, 614 {0x6e, 0x01}, 615 {0x6f, 0x00}, 616 {0x70, 0x00}, 617 {0x71, 0x00}, 618 {0x72, 0x00}, 619 {0x73, 0x00}, 620 {0x74, 0x00}, 621 {0x75, 0x00}, 622 {0x76, 0x00}, 623 {0x77, 0x00}, 624 {0x78, 0x00}, 625 {0x79, 0x00}, 626 {0x7a, 0x00}, 627 {0x7b, 0x00}, 628 {0x7c, 0x00}, 629 {0x7d, 0x00}, 630 {0x7e, 0x00}, 631 {0x7f, 0x00}, 632 {0x80, 0x89}, 633 {0x81, 0x00}, 634 {0x82, 0x0e}, 635 {0x83, 0x00}, 636 {0x84, 0x00}, 637 {0x85, 0x00}, 638 {0x86, 0x00}, 639 {0x87, 0x00}, 640 {0x88, 0x08}, 641 {0x89, 0x00}, 642 {0x8a, 0x0e}, 643 {0x8b, 0xa7}, 644 {0x8c, 0x88}, 645 {0x8d, 0x47}, 646 {0x8e, 0xaa}, 647 {0x8f, 0x02}, 648 {0x90, 0x23}, 649 {0x91, 0x0c}, 650 {0x92, 0x06}, 651 {0x93, 0x08}, 652 {0x94, 0x00}, 653 {0x95, 0x00}, 654 {0x96, 0x00}, 655 {0x97, 0xeb}, 656 {0x98, 0x00}, 657 {0x99, 0x00}, 658 {0x9a, 0x00}, 659 {0x9b, 0x00}, 660 {0x9c, 0x00}, 661 {0x9d, 0x00}, 662 {0x9e, 0x00}, 663 {0x9f, 0x00}, 664 {0xa0, 0x00}, 665 {0xa1, 0x00}, 666 {0xa2, 0x00}, 667 {0xa3, 0xcd}, 668 {0xa4, 0x07}, 669 {0xa5, 0x33}, 670 {0xa6, 0x18}, 671 {0xa7, 0x00}, 672 {0xa8, 0x18}, 673 {0xa9, 0x00}, 674 {0xaa, 0x28}, 675 {0xab, 0x00}, 676 {0xac, 0x00}, 677 {0xad, 0x00}, 678 {0xae, 0x00}, 679 {0xaf, 0x18}, 680 {0xb0, 0x38}, 681 {0xb1, 0x30}, 682 {0xb2, 0x00}, 683 {0xb3, 0x00}, 684 {0xb4, 0x00}, 685 {0xb5, 0x00}, 686 {0xb6, 0x84}, 687 {0xb7, 0xfd}, 688 {0xb8, 0x00}, 689 {0xb9, 0x00}, 690 {0xba, 0x00}, 691 {0xbb, 0x03}, 692 {0xbc, 0x00}, 693 {0xbd, 0x00}, 694 {0xbe, 0x00}, 695 {0xbf, 0x00}, 696 {0xc0, 0x10}, 697 {0xc1, 0x20}, 698 {0xc2, 0x18}, 699 {0xc3, 0x20}, 700 {0xc4, 0x10}, 701 {0xc5, 0x2c}, 702 {0xc6, 0x1e}, 703 {0xc7, 0x10}, 704 {0xc8, 0x12}, 705 {0xc9, 0x01}, 706 {0xca, 0x6f}, 707 {0xcb, 0xa7}, 708 {0xcc, 0x3c}, 709 {0xcd, 0x10}, 710 {0xce, 0x00}, 711 {0xcf, 0x22}, 712 {0xd0, 0x00}, 713 {0xd1, 0x10}, 714 {0xd2, 0x00}, 715 {0xd3, 0x00}, 716 {0xd4, 0x10}, 717 {0xd5, 0x33}, 718 {0xd6, 0x80}, 719 {0xd7, 0x21}, 720 {0xd8, 0x00}, 721 {0xd9, 0x00}, 722 {0xda, 0x00}, 723 {0xdb, 0x00}, 724 {0xdc, 0x00}, 725 {0xdd, 0x00}, 726 {0xde, 0x00}, 727 {0xdf, 0x00}, 728 {0xe0, 0x00}, 729 {0xe1, 0xB3}, 730 {0xe2, 0x00}, 731 {0xe3, 0x00}, 732 {0xe4, 0x00}, 733 {0xe5, 0x10}, 734 {0xe6, 0x00}, 735 {0xe7, 0x18}, 736 {0xe8, 0x08}, 737 {0xe9, 0xd4}, 738 {0xea, 0x00}, 739 {0xeb, 0xff}, 740 {0xec, 0x79}, 741 {0xed, 0x10}, 742 {0xee, 0x30}, 743 {0xef, 0x02}, 744 {0xf0, 0x00}, 745 {0xf1, 0x09}, 746 {0xf2, 0x00}, 747 {0xf3, 0x00}, 748 {0xf4, 0x00}, 749 {0xf5, 0x00}, 750 {0xf6, 0x00}, 751 {0xf7, 0x00}, 752 {0xf8, 0x00}, 753 {0xf9, 0x00}, 754 {0xfa, 0x00}, 755 {0xfb, 0x00}, 756 {0xfc, 0x00}, 757 {0xfd, 0x00}, 758 {0xfe, 0x00}, 759 {0xff, 0x00}, 760 }; 761 762 #define CB_VT3253B0_AGC_FOR_RFMD2959 195 763 /* For RFMD2959 */ 764 static 765 unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { 766 {0xF0, 0x00}, 767 {0xF1, 0x3E}, 768 {0xF0, 0x80}, 769 {0xF0, 0x00}, 770 {0xF1, 0x3E}, 771 {0xF0, 0x81}, 772 {0xF0, 0x01}, 773 {0xF1, 0x3E}, 774 {0xF0, 0x82}, 775 {0xF0, 0x02}, 776 {0xF1, 0x3E}, 777 {0xF0, 0x83}, 778 {0xF0, 0x03}, 779 {0xF1, 0x3B}, 780 {0xF0, 0x84}, 781 {0xF0, 0x04}, 782 {0xF1, 0x39}, 783 {0xF0, 0x85}, 784 {0xF0, 0x05}, 785 {0xF1, 0x38}, 786 {0xF0, 0x86}, 787 {0xF0, 0x06}, 788 {0xF1, 0x37}, 789 {0xF0, 0x87}, 790 {0xF0, 0x07}, 791 {0xF1, 0x36}, 792 {0xF0, 0x88}, 793 {0xF0, 0x08}, 794 {0xF1, 0x35}, 795 {0xF0, 0x89}, 796 {0xF0, 0x09}, 797 {0xF1, 0x35}, 798 {0xF0, 0x8A}, 799 {0xF0, 0x0A}, 800 {0xF1, 0x34}, 801 {0xF0, 0x8B}, 802 {0xF0, 0x0B}, 803 {0xF1, 0x34}, 804 {0xF0, 0x8C}, 805 {0xF0, 0x0C}, 806 {0xF1, 0x33}, 807 {0xF0, 0x8D}, 808 {0xF0, 0x0D}, 809 {0xF1, 0x32}, 810 {0xF0, 0x8E}, 811 {0xF0, 0x0E}, 812 {0xF1, 0x31}, 813 {0xF0, 0x8F}, 814 {0xF0, 0x0F}, 815 {0xF1, 0x30}, 816 {0xF0, 0x90}, 817 {0xF0, 0x10}, 818 {0xF1, 0x2F}, 819 {0xF0, 0x91}, 820 {0xF0, 0x11}, 821 {0xF1, 0x2F}, 822 {0xF0, 0x92}, 823 {0xF0, 0x12}, 824 {0xF1, 0x2E}, 825 {0xF0, 0x93}, 826 {0xF0, 0x13}, 827 {0xF1, 0x2D}, 828 {0xF0, 0x94}, 829 {0xF0, 0x14}, 830 {0xF1, 0x2C}, 831 {0xF0, 0x95}, 832 {0xF0, 0x15}, 833 {0xF1, 0x2B}, 834 {0xF0, 0x96}, 835 {0xF0, 0x16}, 836 {0xF1, 0x2B}, 837 {0xF0, 0x97}, 838 {0xF0, 0x17}, 839 {0xF1, 0x2A}, 840 {0xF0, 0x98}, 841 {0xF0, 0x18}, 842 {0xF1, 0x29}, 843 {0xF0, 0x99}, 844 {0xF0, 0x19}, 845 {0xF1, 0x28}, 846 {0xF0, 0x9A}, 847 {0xF0, 0x1A}, 848 {0xF1, 0x27}, 849 {0xF0, 0x9B}, 850 {0xF0, 0x1B}, 851 {0xF1, 0x26}, 852 {0xF0, 0x9C}, 853 {0xF0, 0x1C}, 854 {0xF1, 0x25}, 855 {0xF0, 0x9D}, 856 {0xF0, 0x1D}, 857 {0xF1, 0x24}, 858 {0xF0, 0x9E}, 859 {0xF0, 0x1E}, 860 {0xF1, 0x24}, 861 {0xF0, 0x9F}, 862 {0xF0, 0x1F}, 863 {0xF1, 0x23}, 864 {0xF0, 0xA0}, 865 {0xF0, 0x20}, 866 {0xF1, 0x22}, 867 {0xF0, 0xA1}, 868 {0xF0, 0x21}, 869 {0xF1, 0x21}, 870 {0xF0, 0xA2}, 871 {0xF0, 0x22}, 872 {0xF1, 0x20}, 873 {0xF0, 0xA3}, 874 {0xF0, 0x23}, 875 {0xF1, 0x20}, 876 {0xF0, 0xA4}, 877 {0xF0, 0x24}, 878 {0xF1, 0x1F}, 879 {0xF0, 0xA5}, 880 {0xF0, 0x25}, 881 {0xF1, 0x1E}, 882 {0xF0, 0xA6}, 883 {0xF0, 0x26}, 884 {0xF1, 0x1D}, 885 {0xF0, 0xA7}, 886 {0xF0, 0x27}, 887 {0xF1, 0x1C}, 888 {0xF0, 0xA8}, 889 {0xF0, 0x28}, 890 {0xF1, 0x1B}, 891 {0xF0, 0xA9}, 892 {0xF0, 0x29}, 893 {0xF1, 0x1B}, 894 {0xF0, 0xAA}, 895 {0xF0, 0x2A}, 896 {0xF1, 0x1A}, 897 {0xF0, 0xAB}, 898 {0xF0, 0x2B}, 899 {0xF1, 0x1A}, 900 {0xF0, 0xAC}, 901 {0xF0, 0x2C}, 902 {0xF1, 0x19}, 903 {0xF0, 0xAD}, 904 {0xF0, 0x2D}, 905 {0xF1, 0x18}, 906 {0xF0, 0xAE}, 907 {0xF0, 0x2E}, 908 {0xF1, 0x17}, 909 {0xF0, 0xAF}, 910 {0xF0, 0x2F}, 911 {0xF1, 0x16}, 912 {0xF0, 0xB0}, 913 {0xF0, 0x30}, 914 {0xF1, 0x15}, 915 {0xF0, 0xB1}, 916 {0xF0, 0x31}, 917 {0xF1, 0x15}, 918 {0xF0, 0xB2}, 919 {0xF0, 0x32}, 920 {0xF1, 0x15}, 921 {0xF0, 0xB3}, 922 {0xF0, 0x33}, 923 {0xF1, 0x14}, 924 {0xF0, 0xB4}, 925 {0xF0, 0x34}, 926 {0xF1, 0x13}, 927 {0xF0, 0xB5}, 928 {0xF0, 0x35}, 929 {0xF1, 0x12}, 930 {0xF0, 0xB6}, 931 {0xF0, 0x36}, 932 {0xF1, 0x11}, 933 {0xF0, 0xB7}, 934 {0xF0, 0x37}, 935 {0xF1, 0x10}, 936 {0xF0, 0xB8}, 937 {0xF0, 0x38}, 938 {0xF1, 0x0F}, 939 {0xF0, 0xB9}, 940 {0xF0, 0x39}, 941 {0xF1, 0x0E}, 942 {0xF0, 0xBA}, 943 {0xF0, 0x3A}, 944 {0xF1, 0x0D}, 945 {0xF0, 0xBB}, 946 {0xF0, 0x3B}, 947 {0xF1, 0x0C}, 948 {0xF0, 0xBC}, 949 {0xF0, 0x3C}, 950 {0xF1, 0x0B}, 951 {0xF0, 0xBD}, 952 {0xF0, 0x3D}, 953 {0xF1, 0x0B}, 954 {0xF0, 0xBE}, 955 {0xF0, 0x3E}, 956 {0xF1, 0x0A}, 957 {0xF0, 0xBF}, 958 {0xF0, 0x3F}, 959 {0xF1, 0x09}, 960 {0xF0, 0x00}, 961 }; 962 963 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256 964 /* For AIROHA */ 965 static 966 unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { 967 {0x00, 0x31}, 968 {0x01, 0x00}, 969 {0x02, 0x00}, 970 {0x03, 0x00}, 971 {0x04, 0x00}, 972 {0x05, 0x80}, 973 {0x06, 0x00}, 974 {0x07, 0x00}, 975 {0x08, 0x70}, 976 {0x09, 0x41}, 977 {0x0a, 0x2A}, 978 {0x0b, 0x76}, 979 {0x0c, 0x00}, 980 {0x0d, 0x00}, 981 {0x0e, 0x80}, 982 {0x0f, 0x00}, 983 {0x10, 0x00}, 984 {0x11, 0x00}, 985 {0x12, 0x00}, 986 {0x13, 0x00}, 987 {0x14, 0x00}, 988 {0x15, 0x00}, 989 {0x16, 0x00}, 990 {0x17, 0x00}, 991 {0x18, 0x00}, 992 {0x19, 0x00}, 993 {0x1a, 0x00}, 994 {0x1b, 0x8f}, 995 {0x1c, 0x09}, 996 {0x1d, 0x00}, 997 {0x1e, 0x00}, 998 {0x1f, 0x00}, 999 {0x20, 0x00}, 1000 {0x21, 0x00}, 1001 {0x22, 0x00}, 1002 {0x23, 0x00}, 1003 {0x24, 0x00}, 1004 {0x25, 0x4a}, 1005 {0x26, 0x00}, 1006 {0x27, 0x00}, 1007 {0x28, 0x00}, 1008 {0x29, 0x00}, 1009 {0x2a, 0x00}, 1010 {0x2b, 0x00}, 1011 {0x2c, 0x00}, 1012 {0x2d, 0x4a}, 1013 {0x2e, 0x00}, 1014 {0x2f, 0x0a}, 1015 {0x30, 0x26}, 1016 {0x31, 0x5b}, 1017 {0x32, 0x00}, 1018 {0x33, 0x00}, 1019 {0x34, 0x00}, 1020 {0x35, 0x00}, 1021 {0x36, 0xaa}, 1022 {0x37, 0xaa}, 1023 {0x38, 0xff}, 1024 {0x39, 0xff}, 1025 {0x3a, 0x79}, 1026 {0x3b, 0x00}, 1027 {0x3c, 0x00}, 1028 {0x3d, 0x0b}, 1029 {0x3e, 0x48}, 1030 {0x3f, 0x04}, 1031 {0x40, 0x00}, 1032 {0x41, 0x08}, 1033 {0x42, 0x00}, 1034 {0x43, 0x08}, 1035 {0x44, 0x08}, 1036 {0x45, 0x14}, 1037 {0x46, 0x05}, 1038 {0x47, 0x09}, 1039 {0x48, 0x00}, 1040 {0x49, 0x00}, 1041 {0x4a, 0x00}, 1042 {0x4b, 0x00}, 1043 {0x4c, 0x09}, 1044 {0x4d, 0x73}, 1045 {0x4e, 0x00}, 1046 {0x4f, 0xc5}, 1047 {0x50, 0x15}, 1048 {0x51, 0x19}, 1049 {0x52, 0x00}, 1050 {0x53, 0x00}, 1051 {0x54, 0x00}, 1052 {0x55, 0x00}, 1053 {0x56, 0x00}, 1054 {0x57, 0x00}, 1055 {0x58, 0x00}, 1056 {0x59, 0xb0}, 1057 {0x5a, 0x00}, 1058 {0x5b, 0x00}, 1059 {0x5c, 0x00}, 1060 {0x5d, 0x00}, 1061 {0x5e, 0x00}, 1062 {0x5f, 0x00}, 1063 {0x60, 0xe4}, 1064 {0x61, 0x80}, 1065 {0x62, 0x00}, 1066 {0x63, 0x00}, 1067 {0x64, 0x00}, 1068 {0x65, 0x00}, 1069 {0x66, 0x98}, 1070 {0x67, 0x0a}, 1071 {0x68, 0x00}, 1072 {0x69, 0x00}, 1073 {0x6a, 0x00}, 1074 {0x6b, 0x00}, 1075 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */ 1076 {0x6d, 0x03}, 1077 {0x6e, 0x01}, 1078 {0x6f, 0x00}, 1079 {0x70, 0x00}, 1080 {0x71, 0x00}, 1081 {0x72, 0x00}, 1082 {0x73, 0x00}, 1083 {0x74, 0x00}, 1084 {0x75, 0x00}, 1085 {0x76, 0x00}, 1086 {0x77, 0x00}, 1087 {0x78, 0x00}, 1088 {0x79, 0x00}, 1089 {0x7a, 0x00}, 1090 {0x7b, 0x00}, 1091 {0x7c, 0x00}, 1092 {0x7d, 0x00}, 1093 {0x7e, 0x00}, 1094 {0x7f, 0x00}, 1095 {0x80, 0x8c}, 1096 {0x81, 0x01}, 1097 {0x82, 0x09}, 1098 {0x83, 0x00}, 1099 {0x84, 0x00}, 1100 {0x85, 0x00}, 1101 {0x86, 0x00}, 1102 {0x87, 0x00}, 1103 {0x88, 0x08}, 1104 {0x89, 0x00}, 1105 {0x8a, 0x0f}, 1106 {0x8b, 0xb7}, 1107 {0x8c, 0x88}, 1108 {0x8d, 0x47}, 1109 {0x8e, 0xaa}, 1110 {0x8f, 0x02}, 1111 {0x90, 0x22}, 1112 {0x91, 0x00}, 1113 {0x92, 0x00}, 1114 {0x93, 0x00}, 1115 {0x94, 0x00}, 1116 {0x95, 0x00}, 1117 {0x96, 0x00}, 1118 {0x97, 0xeb}, 1119 {0x98, 0x00}, 1120 {0x99, 0x00}, 1121 {0x9a, 0x00}, 1122 {0x9b, 0x00}, 1123 {0x9c, 0x00}, 1124 {0x9d, 0x00}, 1125 {0x9e, 0x00}, 1126 {0x9f, 0x01}, 1127 {0xa0, 0x00}, 1128 {0xa1, 0x00}, 1129 {0xa2, 0x00}, 1130 {0xa3, 0x00}, 1131 {0xa4, 0x00}, 1132 {0xa5, 0x00}, 1133 {0xa6, 0x10}, 1134 {0xa7, 0x00}, 1135 {0xa8, 0x18}, 1136 {0xa9, 0x00}, 1137 {0xaa, 0x00}, 1138 {0xab, 0x00}, 1139 {0xac, 0x00}, 1140 {0xad, 0x00}, 1141 {0xae, 0x00}, 1142 {0xaf, 0x18}, 1143 {0xb0, 0x38}, 1144 {0xb1, 0x30}, 1145 {0xb2, 0x00}, 1146 {0xb3, 0x00}, 1147 {0xb4, 0xff}, 1148 {0xb5, 0x0f}, 1149 {0xb6, 0xe4}, 1150 {0xb7, 0xe2}, 1151 {0xb8, 0x00}, 1152 {0xb9, 0x00}, 1153 {0xba, 0x00}, 1154 {0xbb, 0x03}, 1155 {0xbc, 0x01}, 1156 {0xbd, 0x00}, 1157 {0xbe, 0x00}, 1158 {0xbf, 0x00}, 1159 {0xc0, 0x18}, 1160 {0xc1, 0x20}, 1161 {0xc2, 0x07}, 1162 {0xc3, 0x18}, 1163 {0xc4, 0xff}, 1164 {0xc5, 0x2c}, 1165 {0xc6, 0x0c}, 1166 {0xc7, 0x0a}, 1167 {0xc8, 0x0e}, 1168 {0xc9, 0x01}, 1169 {0xca, 0x68}, 1170 {0xcb, 0xa7}, 1171 {0xcc, 0x3c}, 1172 {0xcd, 0x10}, 1173 {0xce, 0x00}, 1174 {0xcf, 0x25}, 1175 {0xd0, 0x40}, 1176 {0xd1, 0x12}, 1177 {0xd2, 0x00}, 1178 {0xd3, 0x00}, 1179 {0xd4, 0x10}, 1180 {0xd5, 0x28}, 1181 {0xd6, 0x80}, 1182 {0xd7, 0x2A}, 1183 {0xd8, 0x00}, 1184 {0xd9, 0x00}, 1185 {0xda, 0x00}, 1186 {0xdb, 0x00}, 1187 {0xdc, 0x00}, 1188 {0xdd, 0x00}, 1189 {0xde, 0x00}, 1190 {0xdf, 0x00}, 1191 {0xe0, 0x00}, 1192 {0xe1, 0xB3}, 1193 {0xe2, 0x00}, 1194 {0xe3, 0x00}, 1195 {0xe4, 0x00}, 1196 {0xe5, 0x10}, 1197 {0xe6, 0x00}, 1198 {0xe7, 0x1C}, 1199 {0xe8, 0x00}, 1200 {0xe9, 0xf4}, 1201 {0xea, 0x00}, 1202 {0xeb, 0xff}, 1203 {0xec, 0x79}, 1204 {0xed, 0x20}, 1205 {0xee, 0x30}, 1206 {0xef, 0x01}, 1207 {0xf0, 0x00}, 1208 {0xf1, 0x3e}, 1209 {0xf2, 0x00}, 1210 {0xf3, 0x00}, 1211 {0xf4, 0x00}, 1212 {0xf5, 0x00}, 1213 {0xf6, 0x00}, 1214 {0xf7, 0x00}, 1215 {0xf8, 0x00}, 1216 {0xf9, 0x00}, 1217 {0xfa, 0x00}, 1218 {0xfb, 0x00}, 1219 {0xfc, 0x00}, 1220 {0xfd, 0x00}, 1221 {0xfe, 0x00}, 1222 {0xff, 0x00}, 1223 }; 1224 1225 #define CB_VT3253B0_INIT_FOR_UW2451 256 1226 /* For UW2451 */ 1227 static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = { 1228 {0x00, 0x31}, 1229 {0x01, 0x00}, 1230 {0x02, 0x00}, 1231 {0x03, 0x00}, 1232 {0x04, 0x00}, 1233 {0x05, 0x81}, 1234 {0x06, 0x00}, 1235 {0x07, 0x00}, 1236 {0x08, 0x38}, 1237 {0x09, 0x45}, 1238 {0x0a, 0x28}, 1239 {0x0b, 0x76}, 1240 {0x0c, 0x00}, 1241 {0x0d, 0x00}, 1242 {0x0e, 0x80}, 1243 {0x0f, 0x00}, 1244 {0x10, 0x00}, 1245 {0x11, 0x00}, 1246 {0x12, 0x00}, 1247 {0x13, 0x00}, 1248 {0x14, 0x00}, 1249 {0x15, 0x00}, 1250 {0x16, 0x00}, 1251 {0x17, 0x00}, 1252 {0x18, 0x00}, 1253 {0x19, 0x00}, 1254 {0x1a, 0x00}, 1255 {0x1b, 0x8f}, 1256 {0x1c, 0x0f}, 1257 {0x1d, 0x00}, 1258 {0x1e, 0x00}, 1259 {0x1f, 0x00}, 1260 {0x20, 0x00}, 1261 {0x21, 0x00}, 1262 {0x22, 0x00}, 1263 {0x23, 0x00}, 1264 {0x24, 0x00}, 1265 {0x25, 0x4a}, 1266 {0x26, 0x00}, 1267 {0x27, 0x00}, 1268 {0x28, 0x00}, 1269 {0x29, 0x00}, 1270 {0x2a, 0x00}, 1271 {0x2b, 0x00}, 1272 {0x2c, 0x00}, 1273 {0x2d, 0x18}, 1274 {0x2e, 0x00}, 1275 {0x2f, 0x0a}, 1276 {0x30, 0x26}, 1277 {0x31, 0x5b}, 1278 {0x32, 0x00}, 1279 {0x33, 0x00}, 1280 {0x34, 0x00}, 1281 {0x35, 0x00}, 1282 {0x36, 0xaa}, 1283 {0x37, 0xaa}, 1284 {0x38, 0xff}, 1285 {0x39, 0xff}, 1286 {0x3a, 0x00}, 1287 {0x3b, 0x00}, 1288 {0x3c, 0x00}, 1289 {0x3d, 0x03}, 1290 {0x3e, 0x1d}, 1291 {0x3f, 0x04}, 1292 {0x40, 0x00}, 1293 {0x41, 0x08}, 1294 {0x42, 0x00}, 1295 {0x43, 0x08}, 1296 {0x44, 0x08}, 1297 {0x45, 0x14}, 1298 {0x46, 0x05}, 1299 {0x47, 0x09}, 1300 {0x48, 0x00}, 1301 {0x49, 0x00}, 1302 {0x4a, 0x00}, 1303 {0x4b, 0x00}, 1304 {0x4c, 0x09}, 1305 {0x4d, 0x90}, 1306 {0x4e, 0x00}, 1307 {0x4f, 0xc5}, 1308 {0x50, 0x15}, 1309 {0x51, 0x19}, 1310 {0x52, 0x00}, 1311 {0x53, 0x00}, 1312 {0x54, 0x00}, 1313 {0x55, 0x00}, 1314 {0x56, 0x00}, 1315 {0x57, 0x00}, 1316 {0x58, 0x00}, 1317 {0x59, 0xb0}, 1318 {0x5a, 0x00}, 1319 {0x5b, 0x00}, 1320 {0x5c, 0x00}, 1321 {0x5d, 0x00}, 1322 {0x5e, 0x00}, 1323 {0x5f, 0x00}, 1324 {0x60, 0xb3}, 1325 {0x61, 0x81}, 1326 {0x62, 0x00}, 1327 {0x63, 0x00}, 1328 {0x64, 0x00}, 1329 {0x65, 0x00}, 1330 {0x66, 0x57}, 1331 {0x67, 0x6c}, 1332 {0x68, 0x00}, 1333 {0x69, 0x00}, 1334 {0x6a, 0x00}, 1335 {0x6b, 0x00}, 1336 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */ 1337 {0x6d, 0x03}, 1338 {0x6e, 0x01}, 1339 {0x6f, 0x00}, 1340 {0x70, 0x00}, 1341 {0x71, 0x00}, 1342 {0x72, 0x00}, 1343 {0x73, 0x00}, 1344 {0x74, 0x00}, 1345 {0x75, 0x00}, 1346 {0x76, 0x00}, 1347 {0x77, 0x00}, 1348 {0x78, 0x00}, 1349 {0x79, 0x00}, 1350 {0x7a, 0x00}, 1351 {0x7b, 0x00}, 1352 {0x7c, 0x00}, 1353 {0x7d, 0x00}, 1354 {0x7e, 0x00}, 1355 {0x7f, 0x00}, 1356 {0x80, 0x8c}, 1357 {0x81, 0x00}, 1358 {0x82, 0x0e}, 1359 {0x83, 0x00}, 1360 {0x84, 0x00}, 1361 {0x85, 0x00}, 1362 {0x86, 0x00}, 1363 {0x87, 0x00}, 1364 {0x88, 0x08}, 1365 {0x89, 0x00}, 1366 {0x8a, 0x0e}, 1367 {0x8b, 0xa7}, 1368 {0x8c, 0x88}, 1369 {0x8d, 0x47}, 1370 {0x8e, 0xaa}, 1371 {0x8f, 0x02}, 1372 {0x90, 0x00}, 1373 {0x91, 0x00}, 1374 {0x92, 0x00}, 1375 {0x93, 0x00}, 1376 {0x94, 0x00}, 1377 {0x95, 0x00}, 1378 {0x96, 0x00}, 1379 {0x97, 0xe3}, 1380 {0x98, 0x00}, 1381 {0x99, 0x00}, 1382 {0x9a, 0x00}, 1383 {0x9b, 0x00}, 1384 {0x9c, 0x00}, 1385 {0x9d, 0x00}, 1386 {0x9e, 0x00}, 1387 {0x9f, 0x00}, 1388 {0xa0, 0x00}, 1389 {0xa1, 0x00}, 1390 {0xa2, 0x00}, 1391 {0xa3, 0x00}, 1392 {0xa4, 0x00}, 1393 {0xa5, 0x00}, 1394 {0xa6, 0x10}, 1395 {0xa7, 0x00}, 1396 {0xa8, 0x18}, 1397 {0xa9, 0x00}, 1398 {0xaa, 0x00}, 1399 {0xab, 0x00}, 1400 {0xac, 0x00}, 1401 {0xad, 0x00}, 1402 {0xae, 0x00}, 1403 {0xaf, 0x18}, 1404 {0xb0, 0x18}, 1405 {0xb1, 0x30}, 1406 {0xb2, 0x00}, 1407 {0xb3, 0x00}, 1408 {0xb4, 0x00}, 1409 {0xb5, 0x00}, 1410 {0xb6, 0x00}, 1411 {0xb7, 0x00}, 1412 {0xb8, 0x00}, 1413 {0xb9, 0x00}, 1414 {0xba, 0x00}, 1415 {0xbb, 0x03}, 1416 {0xbc, 0x01}, 1417 {0xbd, 0x00}, 1418 {0xbe, 0x00}, 1419 {0xbf, 0x00}, 1420 {0xc0, 0x10}, 1421 {0xc1, 0x20}, 1422 {0xc2, 0x00}, 1423 {0xc3, 0x20}, 1424 {0xc4, 0x00}, 1425 {0xc5, 0x2c}, 1426 {0xc6, 0x1c}, 1427 {0xc7, 0x10}, 1428 {0xc8, 0x10}, 1429 {0xc9, 0x01}, 1430 {0xca, 0x68}, 1431 {0xcb, 0xa7}, 1432 {0xcc, 0x3c}, 1433 {0xcd, 0x09}, 1434 {0xce, 0x00}, 1435 {0xcf, 0x20}, 1436 {0xd0, 0x40}, 1437 {0xd1, 0x10}, 1438 {0xd2, 0x00}, 1439 {0xd3, 0x00}, 1440 {0xd4, 0x20}, 1441 {0xd5, 0x28}, 1442 {0xd6, 0xa0}, 1443 {0xd7, 0x2a}, 1444 {0xd8, 0x00}, 1445 {0xd9, 0x00}, 1446 {0xda, 0x00}, 1447 {0xdb, 0x00}, 1448 {0xdc, 0x00}, 1449 {0xdd, 0x00}, 1450 {0xde, 0x00}, 1451 {0xdf, 0x00}, 1452 {0xe0, 0x00}, 1453 {0xe1, 0xd3}, 1454 {0xe2, 0xc0}, 1455 {0xe3, 0x00}, 1456 {0xe4, 0x00}, 1457 {0xe5, 0x10}, 1458 {0xe6, 0x00}, 1459 {0xe7, 0x12}, 1460 {0xe8, 0x12}, 1461 {0xe9, 0x34}, 1462 {0xea, 0x00}, 1463 {0xeb, 0xff}, 1464 {0xec, 0x79}, 1465 {0xed, 0x20}, 1466 {0xee, 0x30}, 1467 {0xef, 0x01}, 1468 {0xf0, 0x00}, 1469 {0xf1, 0x3e}, 1470 {0xf2, 0x00}, 1471 {0xf3, 0x00}, 1472 {0xf4, 0x00}, 1473 {0xf5, 0x00}, 1474 {0xf6, 0x00}, 1475 {0xf7, 0x00}, 1476 {0xf8, 0x00}, 1477 {0xf9, 0x00}, 1478 {0xfa, 0x00}, 1479 {0xfb, 0x00}, 1480 {0xfc, 0x00}, 1481 {0xfd, 0x00}, 1482 {0xfe, 0x00}, 1483 {0xff, 0x00}, 1484 }; 1485 1486 #define CB_VT3253B0_AGC 193 1487 /* For AIROHA */ 1488 static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = { 1489 {0xF0, 0x00}, 1490 {0xF1, 0x00}, 1491 {0xF0, 0x80}, 1492 {0xF0, 0x01}, 1493 {0xF1, 0x00}, 1494 {0xF0, 0x81}, 1495 {0xF0, 0x02}, 1496 {0xF1, 0x02}, 1497 {0xF0, 0x82}, 1498 {0xF0, 0x03}, 1499 {0xF1, 0x04}, 1500 {0xF0, 0x83}, 1501 {0xF0, 0x03}, 1502 {0xF1, 0x04}, 1503 {0xF0, 0x84}, 1504 {0xF0, 0x04}, 1505 {0xF1, 0x06}, 1506 {0xF0, 0x85}, 1507 {0xF0, 0x05}, 1508 {0xF1, 0x06}, 1509 {0xF0, 0x86}, 1510 {0xF0, 0x06}, 1511 {0xF1, 0x06}, 1512 {0xF0, 0x87}, 1513 {0xF0, 0x07}, 1514 {0xF1, 0x08}, 1515 {0xF0, 0x88}, 1516 {0xF0, 0x08}, 1517 {0xF1, 0x08}, 1518 {0xF0, 0x89}, 1519 {0xF0, 0x09}, 1520 {0xF1, 0x0A}, 1521 {0xF0, 0x8A}, 1522 {0xF0, 0x0A}, 1523 {0xF1, 0x0A}, 1524 {0xF0, 0x8B}, 1525 {0xF0, 0x0B}, 1526 {0xF1, 0x0C}, 1527 {0xF0, 0x8C}, 1528 {0xF0, 0x0C}, 1529 {0xF1, 0x0C}, 1530 {0xF0, 0x8D}, 1531 {0xF0, 0x0D}, 1532 {0xF1, 0x0E}, 1533 {0xF0, 0x8E}, 1534 {0xF0, 0x0E}, 1535 {0xF1, 0x0E}, 1536 {0xF0, 0x8F}, 1537 {0xF0, 0x0F}, 1538 {0xF1, 0x10}, 1539 {0xF0, 0x90}, 1540 {0xF0, 0x10}, 1541 {0xF1, 0x10}, 1542 {0xF0, 0x91}, 1543 {0xF0, 0x11}, 1544 {0xF1, 0x12}, 1545 {0xF0, 0x92}, 1546 {0xF0, 0x12}, 1547 {0xF1, 0x12}, 1548 {0xF0, 0x93}, 1549 {0xF0, 0x13}, 1550 {0xF1, 0x14}, 1551 {0xF0, 0x94}, 1552 {0xF0, 0x14}, 1553 {0xF1, 0x14}, 1554 {0xF0, 0x95}, 1555 {0xF0, 0x15}, 1556 {0xF1, 0x16}, 1557 {0xF0, 0x96}, 1558 {0xF0, 0x16}, 1559 {0xF1, 0x16}, 1560 {0xF0, 0x97}, 1561 {0xF0, 0x17}, 1562 {0xF1, 0x18}, 1563 {0xF0, 0x98}, 1564 {0xF0, 0x18}, 1565 {0xF1, 0x18}, 1566 {0xF0, 0x99}, 1567 {0xF0, 0x19}, 1568 {0xF1, 0x1A}, 1569 {0xF0, 0x9A}, 1570 {0xF0, 0x1A}, 1571 {0xF1, 0x1A}, 1572 {0xF0, 0x9B}, 1573 {0xF0, 0x1B}, 1574 {0xF1, 0x1C}, 1575 {0xF0, 0x9C}, 1576 {0xF0, 0x1C}, 1577 {0xF1, 0x1C}, 1578 {0xF0, 0x9D}, 1579 {0xF0, 0x1D}, 1580 {0xF1, 0x1E}, 1581 {0xF0, 0x9E}, 1582 {0xF0, 0x1E}, 1583 {0xF1, 0x1E}, 1584 {0xF0, 0x9F}, 1585 {0xF0, 0x1F}, 1586 {0xF1, 0x20}, 1587 {0xF0, 0xA0}, 1588 {0xF0, 0x20}, 1589 {0xF1, 0x20}, 1590 {0xF0, 0xA1}, 1591 {0xF0, 0x21}, 1592 {0xF1, 0x22}, 1593 {0xF0, 0xA2}, 1594 {0xF0, 0x22}, 1595 {0xF1, 0x22}, 1596 {0xF0, 0xA3}, 1597 {0xF0, 0x23}, 1598 {0xF1, 0x24}, 1599 {0xF0, 0xA4}, 1600 {0xF0, 0x24}, 1601 {0xF1, 0x24}, 1602 {0xF0, 0xA5}, 1603 {0xF0, 0x25}, 1604 {0xF1, 0x26}, 1605 {0xF0, 0xA6}, 1606 {0xF0, 0x26}, 1607 {0xF1, 0x26}, 1608 {0xF0, 0xA7}, 1609 {0xF0, 0x27}, 1610 {0xF1, 0x28}, 1611 {0xF0, 0xA8}, 1612 {0xF0, 0x28}, 1613 {0xF1, 0x28}, 1614 {0xF0, 0xA9}, 1615 {0xF0, 0x29}, 1616 {0xF1, 0x2A}, 1617 {0xF0, 0xAA}, 1618 {0xF0, 0x2A}, 1619 {0xF1, 0x2A}, 1620 {0xF0, 0xAB}, 1621 {0xF0, 0x2B}, 1622 {0xF1, 0x2C}, 1623 {0xF0, 0xAC}, 1624 {0xF0, 0x2C}, 1625 {0xF1, 0x2C}, 1626 {0xF0, 0xAD}, 1627 {0xF0, 0x2D}, 1628 {0xF1, 0x2E}, 1629 {0xF0, 0xAE}, 1630 {0xF0, 0x2E}, 1631 {0xF1, 0x2E}, 1632 {0xF0, 0xAF}, 1633 {0xF0, 0x2F}, 1634 {0xF1, 0x30}, 1635 {0xF0, 0xB0}, 1636 {0xF0, 0x30}, 1637 {0xF1, 0x30}, 1638 {0xF0, 0xB1}, 1639 {0xF0, 0x31}, 1640 {0xF1, 0x32}, 1641 {0xF0, 0xB2}, 1642 {0xF0, 0x32}, 1643 {0xF1, 0x32}, 1644 {0xF0, 0xB3}, 1645 {0xF0, 0x33}, 1646 {0xF1, 0x34}, 1647 {0xF0, 0xB4}, 1648 {0xF0, 0x34}, 1649 {0xF1, 0x34}, 1650 {0xF0, 0xB5}, 1651 {0xF0, 0x35}, 1652 {0xF1, 0x36}, 1653 {0xF0, 0xB6}, 1654 {0xF0, 0x36}, 1655 {0xF1, 0x36}, 1656 {0xF0, 0xB7}, 1657 {0xF0, 0x37}, 1658 {0xF1, 0x38}, 1659 {0xF0, 0xB8}, 1660 {0xF0, 0x38}, 1661 {0xF1, 0x38}, 1662 {0xF0, 0xB9}, 1663 {0xF0, 0x39}, 1664 {0xF1, 0x3A}, 1665 {0xF0, 0xBA}, 1666 {0xF0, 0x3A}, 1667 {0xF1, 0x3A}, 1668 {0xF0, 0xBB}, 1669 {0xF0, 0x3B}, 1670 {0xF1, 0x3C}, 1671 {0xF0, 0xBC}, 1672 {0xF0, 0x3C}, 1673 {0xF1, 0x3C}, 1674 {0xF0, 0xBD}, 1675 {0xF0, 0x3D}, 1676 {0xF1, 0x3E}, 1677 {0xF0, 0xBE}, 1678 {0xF0, 0x3E}, 1679 {0xF1, 0x3E}, 1680 {0xF0, 0xBF}, 1681 {0xF0, 0x00}, 1682 }; 1683 1684 static const unsigned short awc_frame_time[MAX_RATE] = { 1685 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216 1686 }; 1687 1688 /*--------------------- Export Variables --------------------------*/ 1689 /* 1690 * Description: Calculate data frame transmitting time 1691 * 1692 * Parameters: 1693 * In: 1694 * preamble_type - Preamble Type 1695 * by_pkt_type - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA 1696 * cb_frame_length - Baseband Type 1697 * tx_rate - Tx Rate 1698 * Out: 1699 * 1700 * Return Value: FrameTime 1701 * 1702 */ 1703 unsigned int bb_get_frame_time(unsigned char preamble_type, 1704 unsigned char by_pkt_type, 1705 unsigned int cb_frame_length, 1706 unsigned short tx_rate) 1707 { 1708 unsigned int frame_time; 1709 unsigned int preamble; 1710 unsigned int tmp; 1711 unsigned int rate_idx = (unsigned int)tx_rate; 1712 unsigned int rate = 0; 1713 1714 if (rate_idx > RATE_54M) 1715 return 0; 1716 1717 rate = (unsigned int)awc_frame_time[rate_idx]; 1718 1719 if (rate_idx <= 3) { /* CCK mode */ 1720 if (preamble_type == PREAMBLE_SHORT) 1721 preamble = 96; 1722 else 1723 preamble = 192; 1724 frame_time = (cb_frame_length * 80) / rate; /* ????? */ 1725 tmp = (frame_time * rate) / 80; 1726 if (cb_frame_length != tmp) 1727 frame_time++; 1728 1729 return preamble + frame_time; 1730 } 1731 frame_time = (cb_frame_length * 8 + 22) / rate; /* ???????? */ 1732 tmp = ((frame_time * rate) - 22) / 8; 1733 if (cb_frame_length != tmp) 1734 frame_time++; 1735 1736 frame_time = frame_time * 4; /* ??????? */ 1737 if (by_pkt_type != PK_TYPE_11A) 1738 frame_time += 6; /* ?????? */ 1739 1740 return 20 + frame_time; /* ?????? */ 1741 } 1742 1743 /* 1744 * Description: Calculate Length, Service, and Signal fields of Phy for Tx 1745 * 1746 * Parameters: 1747 * In: 1748 * priv - Device Structure 1749 * frame_length - Tx Frame Length 1750 * tx_rate - Tx Rate 1751 * Out: 1752 * struct vnt_phy_field *phy 1753 * - pointer to Phy Length field 1754 * - pointer to Phy Service field 1755 * - pointer to Phy Signal field 1756 * 1757 * Return Value: none 1758 * 1759 */ 1760 void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length, 1761 u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy) 1762 { 1763 u32 bit_count; 1764 u32 count = 0; 1765 u32 tmp; 1766 int ext_bit; 1767 u8 preamble_type = priv->preamble_type; 1768 1769 bit_count = frame_length * 8; 1770 ext_bit = false; 1771 1772 switch (tx_rate) { 1773 case RATE_1M: 1774 count = bit_count; 1775 1776 phy->signal = 0x00; 1777 1778 break; 1779 case RATE_2M: 1780 count = bit_count / 2; 1781 1782 if (preamble_type == PREAMBLE_SHORT) 1783 phy->signal = 0x09; 1784 else 1785 phy->signal = 0x01; 1786 1787 break; 1788 case RATE_5M: 1789 count = (bit_count * 10) / 55; 1790 tmp = (count * 55) / 10; 1791 1792 if (tmp != bit_count) 1793 count++; 1794 1795 if (preamble_type == PREAMBLE_SHORT) 1796 phy->signal = 0x0a; 1797 else 1798 phy->signal = 0x02; 1799 1800 break; 1801 case RATE_11M: 1802 count = bit_count / 11; 1803 tmp = count * 11; 1804 1805 if (tmp != bit_count) { 1806 count++; 1807 1808 if ((bit_count - tmp) <= 3) 1809 ext_bit = true; 1810 } 1811 1812 if (preamble_type == PREAMBLE_SHORT) 1813 phy->signal = 0x0b; 1814 else 1815 phy->signal = 0x03; 1816 1817 break; 1818 case RATE_6M: 1819 if (pkt_type == PK_TYPE_11A) 1820 phy->signal = 0x9b; 1821 else 1822 phy->signal = 0x8b; 1823 1824 break; 1825 case RATE_9M: 1826 if (pkt_type == PK_TYPE_11A) 1827 phy->signal = 0x9f; 1828 else 1829 phy->signal = 0x8f; 1830 1831 break; 1832 case RATE_12M: 1833 if (pkt_type == PK_TYPE_11A) 1834 phy->signal = 0x9a; 1835 else 1836 phy->signal = 0x8a; 1837 1838 break; 1839 case RATE_18M: 1840 if (pkt_type == PK_TYPE_11A) 1841 phy->signal = 0x9e; 1842 else 1843 phy->signal = 0x8e; 1844 1845 break; 1846 case RATE_24M: 1847 if (pkt_type == PK_TYPE_11A) 1848 phy->signal = 0x99; 1849 else 1850 phy->signal = 0x89; 1851 1852 break; 1853 case RATE_36M: 1854 if (pkt_type == PK_TYPE_11A) 1855 phy->signal = 0x9d; 1856 else 1857 phy->signal = 0x8d; 1858 1859 break; 1860 case RATE_48M: 1861 if (pkt_type == PK_TYPE_11A) 1862 phy->signal = 0x98; 1863 else 1864 phy->signal = 0x88; 1865 1866 break; 1867 case RATE_54M: 1868 if (pkt_type == PK_TYPE_11A) 1869 phy->signal = 0x9c; 1870 else 1871 phy->signal = 0x8c; 1872 break; 1873 default: 1874 if (pkt_type == PK_TYPE_11A) 1875 phy->signal = 0x9c; 1876 else 1877 phy->signal = 0x8c; 1878 break; 1879 } 1880 1881 if (pkt_type == PK_TYPE_11B) { 1882 phy->service = 0x00; 1883 if (ext_bit) 1884 phy->service |= 0x80; 1885 phy->len = cpu_to_le16((u16)count); 1886 } else { 1887 phy->service = 0x00; 1888 phy->len = cpu_to_le16((u16)frame_length); 1889 } 1890 } 1891 1892 /* 1893 * Description: Read a byte from BASEBAND, by embedded programming 1894 * 1895 * Parameters: 1896 * In: 1897 * iobase - I/O base address 1898 * by_bb_addr - address of register in Baseband 1899 * Out: 1900 * pby_data - data read 1901 * 1902 * Return Value: true if succeeded; false if failed. 1903 * 1904 */ 1905 bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr, 1906 unsigned char *pby_data) 1907 { 1908 void __iomem *iobase = priv->port_offset; 1909 unsigned short ww; 1910 unsigned char by_value; 1911 1912 /* BB reg offset */ 1913 VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr); 1914 1915 /* turn on REGR */ 1916 MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR); 1917 /* W_MAX_TIMEOUT is the timeout period */ 1918 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1919 VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value); 1920 if (by_value & BBREGCTL_DONE) 1921 break; 1922 } 1923 1924 /* get BB data */ 1925 VNSvInPortB(iobase + MAC_REG_BBREGDATA, pby_data); 1926 1927 if (ww == W_MAX_TIMEOUT) { 1928 pr_debug(" DBG_PORT80(0x30)\n"); 1929 return false; 1930 } 1931 return true; 1932 } 1933 1934 /* 1935 * Description: Write a Byte to BASEBAND, by embedded programming 1936 * 1937 * Parameters: 1938 * In: 1939 * iobase - I/O base address 1940 * by_bb_addr - address of register in Baseband 1941 * by_data - data to write 1942 * Out: 1943 * none 1944 * 1945 * Return Value: true if succeeded; false if failed. 1946 * 1947 */ 1948 bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr, 1949 unsigned char by_data) 1950 { 1951 void __iomem *iobase = priv->port_offset; 1952 unsigned short ww; 1953 unsigned char by_value; 1954 1955 /* BB reg offset */ 1956 VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr); 1957 /* set BB data */ 1958 VNSvOutPortB(iobase + MAC_REG_BBREGDATA, by_data); 1959 1960 /* turn on BBREGCTL_REGW */ 1961 MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW); 1962 /* W_MAX_TIMEOUT is the timeout period */ 1963 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 1964 VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value); 1965 if (by_value & BBREGCTL_DONE) 1966 break; 1967 } 1968 1969 if (ww == W_MAX_TIMEOUT) { 1970 pr_debug(" DBG_PORT80(0x31)\n"); 1971 return false; 1972 } 1973 return true; 1974 } 1975 1976 /* 1977 * Description: VIA VT3253 Baseband chip init function 1978 * 1979 * Parameters: 1980 * In: 1981 * iobase - I/O base address 1982 * byRevId - Revision ID 1983 * byRFType - RF type 1984 * Out: 1985 * none 1986 * 1987 * Return Value: true if succeeded; false if failed. 1988 * 1989 */ 1990 1991 bool bb_vt3253_init(struct vnt_private *priv) 1992 { 1993 bool result = true; 1994 int ii; 1995 void __iomem *iobase = priv->port_offset; 1996 unsigned char by_rf_type = priv->byRFType; 1997 unsigned char by_local_id = priv->local_id; 1998 1999 if (by_rf_type == RF_RFMD2959) { 2000 if (by_local_id <= REV_ID_VT3253_A1) { 2001 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) 2002 result &= bb_write_embedded(priv, 2003 by_vt3253_init_tab_rfmd[ii][0], 2004 by_vt3253_init_tab_rfmd[ii][1]); 2005 2006 } else { 2007 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) 2008 result &= bb_write_embedded(priv, 2009 byVT3253B0_RFMD[ii][0], 2010 byVT3253B0_RFMD[ii][1]); 2011 2012 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) 2013 result &= bb_write_embedded(priv, 2014 byVT3253B0_AGC4_RFMD2959[ii][0], 2015 byVT3253B0_AGC4_RFMD2959[ii][1]); 2016 2017 VNSvOutPortD(iobase + MAC_REG_ITRTMSET, 0x23); 2018 MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0)); 2019 } 2020 priv->abyBBVGA[0] = 0x18; 2021 priv->abyBBVGA[1] = 0x0A; 2022 priv->abyBBVGA[2] = 0x0; 2023 priv->abyBBVGA[3] = 0x0; 2024 priv->dbm_threshold[0] = -70; 2025 priv->dbm_threshold[1] = -50; 2026 priv->dbm_threshold[2] = 0; 2027 priv->dbm_threshold[3] = 0; 2028 } else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) { 2029 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2030 result &= bb_write_embedded(priv, 2031 byVT3253B0_AIROHA2230[ii][0], 2032 byVT3253B0_AIROHA2230[ii][1]); 2033 2034 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2035 result &= bb_write_embedded(priv, 2036 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2037 2038 priv->abyBBVGA[0] = 0x1C; 2039 priv->abyBBVGA[1] = 0x10; 2040 priv->abyBBVGA[2] = 0x0; 2041 priv->abyBBVGA[3] = 0x0; 2042 priv->dbm_threshold[0] = -70; 2043 priv->dbm_threshold[1] = -48; 2044 priv->dbm_threshold[2] = 0; 2045 priv->dbm_threshold[3] = 0; 2046 } else if (by_rf_type == RF_UW2451) { 2047 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) 2048 result &= bb_write_embedded(priv, 2049 byVT3253B0_UW2451[ii][0], 2050 byVT3253B0_UW2451[ii][1]); 2051 2052 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2053 result &= bb_write_embedded(priv, 2054 byVT3253B0_AGC[ii][0], 2055 byVT3253B0_AGC[ii][1]); 2056 2057 VNSvOutPortB(iobase + MAC_REG_ITRTMSET, 0x23); 2058 MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0)); 2059 2060 priv->abyBBVGA[0] = 0x14; 2061 priv->abyBBVGA[1] = 0x0A; 2062 priv->abyBBVGA[2] = 0x0; 2063 priv->abyBBVGA[3] = 0x0; 2064 priv->dbm_threshold[0] = -60; 2065 priv->dbm_threshold[1] = -50; 2066 priv->dbm_threshold[2] = 0; 2067 priv->dbm_threshold[3] = 0; 2068 } else if (by_rf_type == RF_UW2452) { 2069 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) 2070 result &= bb_write_embedded(priv, 2071 byVT3253B0_UW2451[ii][0], 2072 byVT3253B0_UW2451[ii][1]); 2073 2074 /* Init ANT B select, 2075 * TX Config CR09 = 0x61->0x45, 2076 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) 2077 */ 2078 2079 /*bResult &= bb_write_embedded(iobase,0x09,0x41);*/ 2080 2081 /* Init ANT B select, 2082 * RX Config CR10 = 0x28->0x2A, 2083 * 0x2A->0x28(VC1/VC2 define, 2084 * make the ANT_A, ANT_B inverted) 2085 */ 2086 2087 /*bResult &= bb_write_embedded(iobase,0x0a,0x28);*/ 2088 /* Select VC1/VC2, CR215 = 0x02->0x06 */ 2089 result &= bb_write_embedded(priv, 0xd7, 0x06); 2090 2091 /* {{RobertYu:20050125, request by Jack */ 2092 result &= bb_write_embedded(priv, 0x90, 0x20); 2093 result &= bb_write_embedded(priv, 0x97, 0xeb); 2094 /* }} */ 2095 2096 /* {{RobertYu:20050221, request by Jack */ 2097 result &= bb_write_embedded(priv, 0xa6, 0x00); 2098 result &= bb_write_embedded(priv, 0xa8, 0x30); 2099 /* }} */ 2100 result &= bb_write_embedded(priv, 0xb0, 0x58); 2101 2102 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2103 result &= bb_write_embedded(priv, 2104 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2105 2106 priv->abyBBVGA[0] = 0x14; 2107 priv->abyBBVGA[1] = 0x0A; 2108 priv->abyBBVGA[2] = 0x0; 2109 priv->abyBBVGA[3] = 0x0; 2110 priv->dbm_threshold[0] = -60; 2111 priv->dbm_threshold[1] = -50; 2112 priv->dbm_threshold[2] = 0; 2113 priv->dbm_threshold[3] = 0; 2114 /* }} RobertYu */ 2115 2116 } else if (by_rf_type == RF_VT3226) { 2117 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2118 result &= bb_write_embedded(priv, 2119 byVT3253B0_AIROHA2230[ii][0], 2120 byVT3253B0_AIROHA2230[ii][1]); 2121 2122 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2123 result &= bb_write_embedded(priv, 2124 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2125 2126 priv->abyBBVGA[0] = 0x1C; 2127 priv->abyBBVGA[1] = 0x10; 2128 priv->abyBBVGA[2] = 0x0; 2129 priv->abyBBVGA[3] = 0x0; 2130 priv->dbm_threshold[0] = -70; 2131 priv->dbm_threshold[1] = -48; 2132 priv->dbm_threshold[2] = 0; 2133 priv->dbm_threshold[3] = 0; 2134 /* Fix VT3226 DFC system timing issue */ 2135 MACvSetRFLE_LatchBase(iobase); 2136 /* {{ RobertYu: 20050104 */ 2137 } else if (by_rf_type == RF_AIROHA7230) { 2138 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2139 result &= bb_write_embedded(priv, 2140 byVT3253B0_AIROHA2230[ii][0], 2141 byVT3253B0_AIROHA2230[ii][1]); 2142 2143 /* {{ RobertYu:20050223, request by JerryChung */ 2144 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 2145 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) 2146 */ 2147 /* bResult &= bb_write_embedded(iobase,0x09,0x41);*/ 2148 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 2149 * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) 2150 */ 2151 /* bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/ 2152 /* Select VC1/VC2, CR215 = 0x02->0x06 */ 2153 result &= bb_write_embedded(priv, 0xd7, 0x06); 2154 /* }} */ 2155 2156 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2157 result &= bb_write_embedded(priv, 2158 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2159 2160 priv->abyBBVGA[0] = 0x1C; 2161 priv->abyBBVGA[1] = 0x10; 2162 priv->abyBBVGA[2] = 0x0; 2163 priv->abyBBVGA[3] = 0x0; 2164 priv->dbm_threshold[0] = -70; 2165 priv->dbm_threshold[1] = -48; 2166 priv->dbm_threshold[2] = 0; 2167 priv->dbm_threshold[3] = 0; 2168 /* }} RobertYu */ 2169 } else { 2170 /* No VGA Table now */ 2171 priv->bUpdateBBVGA = false; 2172 priv->abyBBVGA[0] = 0x1C; 2173 } 2174 2175 if (by_local_id > REV_ID_VT3253_A1) { 2176 bb_write_embedded(priv, 0x04, 0x7F); 2177 bb_write_embedded(priv, 0x0D, 0x01); 2178 } 2179 2180 return result; 2181 } 2182 2183 /* 2184 * Description: Set ShortSlotTime mode 2185 * 2186 * Parameters: 2187 * In: 2188 * priv - Device Structure 2189 * Out: 2190 * none 2191 * 2192 * Return Value: none 2193 * 2194 */ 2195 void 2196 bb_set_short_slot_time(struct vnt_private *priv) 2197 { 2198 unsigned char by_bb_rx_conf = 0; 2199 unsigned char by_bb_vga = 0; 2200 2201 bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */ 2202 2203 if (priv->short_slot_time) 2204 by_bb_rx_conf &= 0xDF; /* 1101 1111 */ 2205 else 2206 by_bb_rx_conf |= 0x20; /* 0010 0000 */ 2207 2208 /* patch for 3253B0 Baseband with Cardbus module */ 2209 bb_read_embedded(priv, 0xE7, &by_bb_vga); 2210 if (by_bb_vga == priv->abyBBVGA[0]) 2211 by_bb_rx_conf |= 0x20; /* 0010 0000 */ 2212 2213 bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */ 2214 } 2215 2216 void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data) 2217 { 2218 unsigned char by_bb_rx_conf = 0; 2219 2220 bb_write_embedded(priv, 0xE7, by_data); 2221 2222 bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */ 2223 /* patch for 3253B0 Baseband with Cardbus module */ 2224 if (by_data == priv->abyBBVGA[0]) 2225 by_bb_rx_conf |= 0x20; /* 0010 0000 */ 2226 else if (priv->short_slot_time) 2227 by_bb_rx_conf &= 0xDF; /* 1101 1111 */ 2228 else 2229 by_bb_rx_conf |= 0x20; /* 0010 0000 */ 2230 priv->byBBVGACurrent = by_data; 2231 bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */ 2232 } 2233 2234 /* 2235 * Description: Baseband SoftwareReset 2236 * 2237 * Parameters: 2238 * In: 2239 * iobase - I/O base address 2240 * Out: 2241 * none 2242 * 2243 * Return Value: none 2244 * 2245 */ 2246 void 2247 bb_software_reset(struct vnt_private *priv) 2248 { 2249 bb_write_embedded(priv, 0x50, 0x40); 2250 bb_write_embedded(priv, 0x50, 0); 2251 bb_write_embedded(priv, 0x9C, 0x01); 2252 bb_write_embedded(priv, 0x9C, 0); 2253 } 2254 2255 /* 2256 * Description: Baseband Power Save Mode ON 2257 * 2258 * Parameters: 2259 * In: 2260 * iobase - I/O base address 2261 * Out: 2262 * none 2263 * 2264 * Return Value: none 2265 * 2266 */ 2267 void 2268 bb_power_save_mode_on(struct vnt_private *priv) 2269 { 2270 unsigned char by_org_data; 2271 2272 bb_read_embedded(priv, 0x0D, &by_org_data); 2273 by_org_data |= BIT(0); 2274 bb_write_embedded(priv, 0x0D, by_org_data); 2275 } 2276 2277 /* 2278 * Description: Baseband Power Save Mode OFF 2279 * 2280 * Parameters: 2281 * In: 2282 * iobase - I/O base address 2283 * Out: 2284 * none 2285 * 2286 * Return Value: none 2287 * 2288 */ 2289 void 2290 bb_power_save_mode_off(struct vnt_private *priv) 2291 { 2292 unsigned char by_org_data; 2293 2294 bb_read_embedded(priv, 0x0D, &by_org_data); 2295 by_org_data &= ~(BIT(0)); 2296 bb_write_embedded(priv, 0x0D, by_org_data); 2297 } 2298 2299 /* 2300 * Description: Set Tx Antenna mode 2301 * 2302 * Parameters: 2303 * In: 2304 * priv - Device Structure 2305 * by_antenna_mode - Antenna Mode 2306 * Out: 2307 * none 2308 * 2309 * Return Value: none 2310 * 2311 */ 2312 2313 void 2314 bb_set_tx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode) 2315 { 2316 unsigned char by_bb_tx_conf; 2317 2318 bb_read_embedded(priv, 0x09, &by_bb_tx_conf); /* CR09 */ 2319 if (by_antenna_mode == ANT_DIVERSITY) { 2320 /* bit 1 is diversity */ 2321 by_bb_tx_conf |= 0x02; 2322 } else if (by_antenna_mode == ANT_A) { 2323 /* bit 2 is ANTSEL */ 2324 by_bb_tx_conf &= 0xF9; /* 1111 1001 */ 2325 } else if (by_antenna_mode == ANT_B) { 2326 by_bb_tx_conf &= 0xFD; /* 1111 1101 */ 2327 by_bb_tx_conf |= 0x04; 2328 } 2329 bb_write_embedded(priv, 0x09, by_bb_tx_conf); /* CR09 */ 2330 } 2331 2332 /* 2333 * Description: Set Rx Antenna mode 2334 * 2335 * Parameters: 2336 * In: 2337 * priv - Device Structure 2338 * by_antenna_mode - Antenna Mode 2339 * Out: 2340 * none 2341 * 2342 * Return Value: none 2343 * 2344 */ 2345 2346 void 2347 bb_set_rx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode) 2348 { 2349 unsigned char by_bb_rx_conf; 2350 2351 bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */ 2352 if (by_antenna_mode == ANT_DIVERSITY) { 2353 by_bb_rx_conf |= 0x01; 2354 2355 } else if (by_antenna_mode == ANT_A) { 2356 by_bb_rx_conf &= 0xFC; /* 1111 1100 */ 2357 } else if (by_antenna_mode == ANT_B) { 2358 by_bb_rx_conf &= 0xFE; /* 1111 1110 */ 2359 by_bb_rx_conf |= 0x02; 2360 } 2361 bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */ 2362 } 2363 2364 /* 2365 * Description: bb_set_deep_sleep 2366 * 2367 * Parameters: 2368 * In: 2369 * priv - Device Structure 2370 * Out: 2371 * none 2372 * 2373 * Return Value: none 2374 * 2375 */ 2376 void 2377 bb_set_deep_sleep(struct vnt_private *priv, unsigned char by_local_id) 2378 { 2379 bb_write_embedded(priv, 0x0C, 0x17); /* CR12 */ 2380 bb_write_embedded(priv, 0x0D, 0xB9); /* CR13 */ 2381 } 2382 2383