1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __RTW_PWRCTRL_H_ 8 #define __RTW_PWRCTRL_H_ 9 10 11 #define FW_PWR0 0 12 #define FW_PWR1 1 13 #define FW_PWR2 2 14 #define FW_PWR3 3 15 16 17 #define HW_PWR0 7 18 #define HW_PWR1 6 19 #define HW_PWR2 2 20 #define HW_PWR3 0 21 #define HW_PWR4 8 22 23 #define FW_PWRMSK 0x7 24 25 26 #define XMIT_ALIVE BIT(0) 27 #define RECV_ALIVE BIT(1) 28 #define CMD_ALIVE BIT(2) 29 #define EVT_ALIVE BIT(3) 30 #define BTCOEX_ALIVE BIT(4) 31 32 33 enum Power_Mgnt { 34 PS_MODE_ACTIVE = 0, 35 PS_MODE_MIN, 36 PS_MODE_MAX, 37 PS_MODE_DTIM, /* PS_MODE_SELF_DEFINED */ 38 PS_MODE_VOIP, 39 PS_MODE_UAPSD_WMM, 40 PS_MODE_UAPSD, 41 PS_MODE_IBSS, 42 PS_MODE_WWLAN, 43 PM_Radio_Off, 44 PM_Card_Disable, 45 PS_MODE_NUM, 46 }; 47 48 #ifdef CONFIG_PNO_SUPPORT 49 #define MAX_PNO_LIST_COUNT 16 50 #define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */ 51 #endif 52 53 /* 54 BIT[2:0] = HW state 55 BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state 56 BIT[4] = sub-state 57 */ 58 59 #define PS_DPS BIT(0) 60 #define PS_LCLK (PS_DPS) 61 #define PS_RF_OFF BIT(1) 62 #define PS_ALL_ON BIT(2) 63 #define PS_ST_ACTIVE BIT(3) 64 65 #define PS_ISR_ENABLE BIT(4) 66 #define PS_IMR_ENABLE BIT(5) 67 #define PS_ACK BIT(6) 68 #define PS_TOGGLE BIT(7) 69 70 #define PS_STATE_MASK (0x0F) 71 #define PS_STATE_HW_MASK (0x07) 72 #define PS_SEQ_MASK (0xc0) 73 74 #define PS_STATE(x) (PS_STATE_MASK & (x)) 75 #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) 76 #define PS_SEQ(x) (PS_SEQ_MASK & (x)) 77 78 #define PS_STATE_S0 (PS_DPS) 79 #define PS_STATE_S1 (PS_LCLK) 80 #define PS_STATE_S2 (PS_RF_OFF) 81 #define PS_STATE_S3 (PS_ALL_ON) 82 #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) 83 84 85 #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) 86 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) 87 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) 88 89 90 struct reportpwrstate_parm { 91 unsigned char mode; 92 unsigned char state; /* the CPWM value */ 93 unsigned short rsvd; 94 }; 95 96 97 typedef _sema _pwrlock; 98 99 100 #define LPS_DELAY_TIME 1*HZ /* 1 sec */ 101 102 #define EXE_PWR_NONE 0x01 103 #define EXE_PWR_IPS 0x02 104 #define EXE_PWR_LPS 0x04 105 106 /* RF state. */ 107 enum rt_rf_power_state { 108 rf_on, /* RF is on after RFSleep or RFOff */ 109 rf_sleep, /* 802.11 Power Save mode */ 110 rf_off, /* HW/SW Radio OFF or Inactive Power Save */ 111 /* Add the new RF state above this line ===== */ 112 rf_max 113 }; 114 115 /* RF Off Level for IPS or HW/SW radio off */ 116 #define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */ 117 #define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */ 118 #define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */ 119 #define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-initialize hw parameters */ 120 #define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW */ 121 #define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */ 122 #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock Req in initialization. */ 123 #define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R if no packet is received or transmittd. */ 124 #define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */ 125 126 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? true : false) 127 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG))) 128 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG) 129 130 /* ASPM OSC Control bit, added by Roger, 2013.03.29. */ 131 #define RT_PCI_ASPM_OSC_IGNORE 0 /* PCI ASPM ignore OSC control in default */ 132 #define RT_PCI_ASPM_OSC_ENABLE BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */ 133 #define RT_PCI_ASPM_OSC_DISABLE BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */ 134 135 136 enum _PS_BBRegBackup_ { 137 PSBBREG_RF0 = 0, 138 PSBBREG_RF1, 139 PSBBREG_RF2, 140 PSBBREG_AFE0, 141 PSBBREG_TOTALCNT 142 }; 143 144 enum { /* for ips_mode */ 145 IPS_NONE = 0, 146 IPS_NORMAL, 147 IPS_LEVEL_2, 148 IPS_NUM 149 }; 150 151 /* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */ 152 enum PS_DENY_REASON { 153 PS_DENY_DRV_INITIAL = 0, 154 PS_DENY_SCAN, 155 PS_DENY_JOIN, 156 PS_DENY_DISCONNECT, 157 PS_DENY_SUSPEND, 158 PS_DENY_IOCTL, 159 PS_DENY_MGNT_TX, 160 PS_DENY_DRV_REMOVE = 30, 161 PS_DENY_OTHERS = 31 162 }; 163 164 #ifdef CONFIG_PNO_SUPPORT 165 typedef struct pno_nlo_info 166 { 167 u32 fast_scan_period; /* Fast scan period */ 168 u32 ssid_num; /* number of entry */ 169 u32 slow_scan_period; /* slow scan period */ 170 u32 fast_scan_iterations; /* Fast scan iterations */ 171 u8 ssid_length[MAX_PNO_LIST_COUNT]; /* SSID Length Array */ 172 u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; /* Cipher information for security */ 173 u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; /* channel information */ 174 }pno_nlo_info_t; 175 176 typedef struct pno_ssid { 177 u32 SSID_len; 178 u8 SSID[32]; 179 } pno_ssid_t; 180 181 typedef struct pno_ssid_list { 182 pno_ssid_t node[MAX_PNO_LIST_COUNT]; 183 }pno_ssid_list_t; 184 185 typedef struct pno_scan_channel_info 186 { 187 u8 channel; 188 u8 tx_power; 189 u8 timeout; 190 u8 active; /* set 1 means active scan, or pasivite scan. */ 191 }pno_scan_channel_info_t; 192 193 typedef struct pno_scan_info 194 { 195 u8 enableRFE; /* Enable RFE */ 196 u8 period_scan_time; /* exclusive with fast_scan_period and slow_scan_period */ 197 u8 periodScan; /* exclusive with fast_scan_period and slow_scan_period */ 198 u8 orig_80_offset; /* original channel 80 offset */ 199 u8 orig_40_offset; /* original channel 40 offset */ 200 u8 orig_bw; /* original bandwidth */ 201 u8 orig_ch; /* original channel */ 202 u8 channel_num; /* number of channel */ 203 u64 rfe_type; /* rfe_type && 0x00000000000000ff */ 204 pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT]; 205 }pno_scan_info_t; 206 #endif /* CONFIG_PNO_SUPPORT */ 207 208 struct pwrctrl_priv 209 { 210 _pwrlock lock; 211 _pwrlock check_32k_lock; 212 volatile u8 rpwm; /* requested power state for fw */ 213 volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */ 214 volatile u8 tog; /* toggling */ 215 volatile u8 cpwm_tog; /* toggling */ 216 217 u8 pwr_mode; 218 u8 smart_ps; 219 u8 bcn_ant_mode; 220 u8 dtim; 221 222 u32 alives; 223 _workitem cpwm_event; 224 u8 brpwmtimeout; 225 _workitem rpwmtimeoutwi; 226 _timer pwr_rpwm_timer; 227 u8 bpower_saving; /* for LPS/IPS */ 228 229 u8 b_hw_radio_off; 230 u8 reg_rfoff; 231 u8 reg_pdnmode; /* powerdown mode */ 232 u32 rfoff_reason; 233 234 /* RF OFF Level */ 235 u32 cur_ps_level; 236 u32 reg_rfps_level; 237 238 uint ips_enter_cnts; 239 uint ips_leave_cnts; 240 241 u8 ips_mode; 242 u8 ips_org_mode; 243 u8 ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */ 244 bool bips_processing; 245 unsigned long ips_deny_time; /* will deny IPS when system time is smaller than this */ 246 u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */ 247 248 /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */ 249 /* Use PS_DENY_REASON to decide reason. */ 250 /* Don't access this variable directly without control function, */ 251 /* and this variable should be protected by lock. */ 252 u32 ps_deny; 253 254 u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */ 255 256 u8 fw_psmode_iface_id; 257 u8 bLeisurePs; 258 u8 LpsIdleCount; 259 u8 power_mgnt; 260 u8 org_power_mgnt; 261 u8 bFwCurrentInPSMode; 262 unsigned long DelayLPSLastTimeStamp; 263 s32 pnp_current_pwr_state; 264 u8 pnp_bstop_trx; 265 266 267 u8 bInternalAutoSuspend; 268 u8 bInSuspend; 269 270 u8 bAutoResume; 271 u8 autopm_cnt; 272 273 u8 bSupportRemoteWakeup; 274 u8 wowlan_wake_reason; 275 u8 wowlan_ap_mode; 276 u8 wowlan_mode; 277 #ifdef CONFIG_WOWLAN 278 u8 wowlan_pattern; 279 u8 wowlan_magic; 280 u8 wowlan_unicast; 281 u8 wowlan_pattern_idx; 282 u8 wowlan_pno_enable; 283 #ifdef CONFIG_PNO_SUPPORT 284 u8 pno_in_resume; 285 u8 pno_inited; 286 pno_nlo_info_t *pnlo_info; 287 pno_scan_info_t *pscan_info; 288 pno_ssid_list_t *pno_ssid_list; 289 #endif 290 u32 wowlan_pattern_context[8][5]; 291 u64 wowlan_fw_iv; 292 #endif /* CONFIG_WOWLAN */ 293 _timer pwr_state_check_timer; 294 struct adapter *adapter; 295 int pwr_state_check_interval; 296 u8 pwr_state_check_cnts; 297 298 int ps_flag; /* used by autosuspend */ 299 300 enum rt_rf_power_state rf_pwrstate;/* cur power state, only for IPS */ 301 /* rt_rf_power_state current_rfpwrstate; */ 302 enum rt_rf_power_state change_rfpwrstate; 303 304 u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */ 305 u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */ 306 u8 bkeepfwalive; 307 u8 brfoffbyhw; 308 unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; 309 }; 310 311 #define rtw_get_ips_mode_req(pwrctl) \ 312 (pwrctl)->ips_mode_req 313 314 #define rtw_ips_mode_req(pwrctl, ips_mode) \ 315 (pwrctl)->ips_mode_req = (ips_mode) 316 317 #define RTW_PWR_STATE_CHK_INTERVAL 2000 318 319 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \ 320 do { \ 321 /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __func__, (pwrctl), (ms));*/ \ 322 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \ 323 } while (0) 324 325 #define rtw_set_pwr_state_check_timer(pwrctl) \ 326 _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval) 327 328 extern void rtw_init_pwrctrl_priv(struct adapter *adapter); 329 extern void rtw_free_pwrctrl_priv(struct adapter * adapter); 330 331 s32 rtw_register_task_alive(struct adapter *, u32 task); 332 void rtw_unregister_task_alive(struct adapter *, u32 task); 333 extern s32 rtw_register_tx_alive(struct adapter *padapter); 334 extern void rtw_unregister_tx_alive(struct adapter *padapter); 335 extern s32 rtw_register_cmd_alive(struct adapter *padapter); 336 extern void rtw_unregister_cmd_alive(struct adapter *padapter); 337 extern void cpwm_int_hdl(struct adapter *padapter, struct reportpwrstate_parm *preportpwrstate); 338 extern void LPS_Leave_check(struct adapter *padapter); 339 340 extern void LeaveAllPowerSaveMode(struct adapter * Adapter); 341 extern void LeaveAllPowerSaveModeDirect(struct adapter * Adapter); 342 void _ips_enter(struct adapter *padapter); 343 void ips_enter(struct adapter *padapter); 344 int _ips_leave(struct adapter *padapter); 345 int ips_leave(struct adapter *padapter); 346 347 void rtw_ps_processor(struct adapter *padapter); 348 349 s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms); 350 void LPS_Enter(struct adapter *padapter, const char *msg); 351 void LPS_Leave(struct adapter *padapter, const char *msg); 352 void traffic_check_for_leave_lps(struct adapter *padapter, u8 tx, u32 tx_packets); 353 void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); 354 void rtw_set_rpwm(struct adapter *padapter, u8 val8); 355 356 void rtw_set_ips_deny(struct adapter *padapter, u32 ms); 357 int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *caller); 358 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__) 359 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__) 360 int rtw_pm_set_ips(struct adapter *padapter, u8 mode); 361 int rtw_pm_set_lps(struct adapter *padapter, u8 mode); 362 363 void rtw_ps_deny(struct adapter *padapter, enum PS_DENY_REASON reason); 364 void rtw_ps_deny_cancel(struct adapter *padapter, enum PS_DENY_REASON reason); 365 u32 rtw_ps_deny_get(struct adapter *padapter); 366 367 #endif /* __RTL871X_PWRCTRL_H_ */ 368