192096dc0SQuytelda Kahja /* SPDX-License-Identifier: GPL-2.0 */ 292096dc0SQuytelda Kahja /****************************************************************************** 392096dc0SQuytelda Kahja * 492096dc0SQuytelda Kahja * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 592096dc0SQuytelda Kahja * 692096dc0SQuytelda Kahja ******************************************************************************/ 792096dc0SQuytelda Kahja #ifndef __INC_HAL8723BPHYCFG_H__ 892096dc0SQuytelda Kahja #define __INC_HAL8723BPHYCFG_H__ 992096dc0SQuytelda Kahja 1092096dc0SQuytelda Kahja /*--------------------------Define Parameters-------------------------------*/ 1192096dc0SQuytelda Kahja #define LOOP_LIMIT 5 1292096dc0SQuytelda Kahja #define MAX_STALL_TIME 50 /* us */ 1392096dc0SQuytelda Kahja #define AntennaDiversityValue 0x80 /* Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) */ 1492096dc0SQuytelda Kahja #define MAX_TXPWR_IDX_NMODE_92S 63 1592096dc0SQuytelda Kahja #define Reset_Cnt_Limit 3 1692096dc0SQuytelda Kahja 1792096dc0SQuytelda Kahja #define MAX_AGGR_NUM 0x07 1892096dc0SQuytelda Kahja 1992096dc0SQuytelda Kahja 2092096dc0SQuytelda Kahja /*--------------------------Define Parameters End-------------------------------*/ 2192096dc0SQuytelda Kahja 2292096dc0SQuytelda Kahja 2392096dc0SQuytelda Kahja /*------------------------------Define structure----------------------------*/ 2492096dc0SQuytelda Kahja 2592096dc0SQuytelda Kahja /*------------------------------Define structure End----------------------------*/ 2692096dc0SQuytelda Kahja 2792096dc0SQuytelda Kahja /*--------------------------Exported Function prototype---------------------*/ 2892096dc0SQuytelda Kahja u32 2992096dc0SQuytelda Kahja PHY_QueryBBReg_8723B( 3092096dc0SQuytelda Kahja struct adapter *Adapter, 3192096dc0SQuytelda Kahja u32 RegAddr, 3292096dc0SQuytelda Kahja u32 BitMask 3392096dc0SQuytelda Kahja ); 3492096dc0SQuytelda Kahja 3592096dc0SQuytelda Kahja void 3692096dc0SQuytelda Kahja PHY_SetBBReg_8723B( 3792096dc0SQuytelda Kahja struct adapter *Adapter, 3892096dc0SQuytelda Kahja u32 RegAddr, 3992096dc0SQuytelda Kahja u32 BitMask, 4092096dc0SQuytelda Kahja u32 Data 4192096dc0SQuytelda Kahja ); 4292096dc0SQuytelda Kahja 4392096dc0SQuytelda Kahja u32 4492096dc0SQuytelda Kahja PHY_QueryRFReg_8723B( 4592096dc0SQuytelda Kahja struct adapter * Adapter, 4692096dc0SQuytelda Kahja u8 eRFPath, 4792096dc0SQuytelda Kahja u32 RegAddr, 4892096dc0SQuytelda Kahja u32 BitMask 4992096dc0SQuytelda Kahja ); 5092096dc0SQuytelda Kahja 5192096dc0SQuytelda Kahja void 5292096dc0SQuytelda Kahja PHY_SetRFReg_8723B( 5392096dc0SQuytelda Kahja struct adapter * Adapter, 5492096dc0SQuytelda Kahja u8 eRFPath, 5592096dc0SQuytelda Kahja u32 RegAddr, 5692096dc0SQuytelda Kahja u32 BitMask, 5792096dc0SQuytelda Kahja u32 Data 5892096dc0SQuytelda Kahja ); 5992096dc0SQuytelda Kahja 6092096dc0SQuytelda Kahja /* MAC/BB/RF HAL config */ 6192096dc0SQuytelda Kahja int PHY_BBConfig8723B(struct adapter *Adapter ); 6292096dc0SQuytelda Kahja 6392096dc0SQuytelda Kahja int PHY_RFConfig8723B(struct adapter *Adapter ); 6492096dc0SQuytelda Kahja 6592096dc0SQuytelda Kahja s32 PHY_MACConfig8723B(struct adapter *padapter); 6692096dc0SQuytelda Kahja 6792096dc0SQuytelda Kahja void 6892096dc0SQuytelda Kahja PHY_SetTxPowerIndex_8723B( 6992096dc0SQuytelda Kahja struct adapter * Adapter, 7092096dc0SQuytelda Kahja u32 PowerIndex, 7192096dc0SQuytelda Kahja u8 RFPath, 7292096dc0SQuytelda Kahja u8 Rate 7392096dc0SQuytelda Kahja ); 7492096dc0SQuytelda Kahja 7592096dc0SQuytelda Kahja u8 7692096dc0SQuytelda Kahja PHY_GetTxPowerIndex_8723B( 7792096dc0SQuytelda Kahja struct adapter * padapter, 7892096dc0SQuytelda Kahja u8 RFPath, 7992096dc0SQuytelda Kahja u8 Rate, 8092096dc0SQuytelda Kahja enum CHANNEL_WIDTH BandWidth, 8192096dc0SQuytelda Kahja u8 Channel 8292096dc0SQuytelda Kahja ); 8392096dc0SQuytelda Kahja 8492096dc0SQuytelda Kahja void 8592096dc0SQuytelda Kahja PHY_GetTxPowerLevel8723B( 8692096dc0SQuytelda Kahja struct adapter * Adapter, 8792096dc0SQuytelda Kahja s32* powerlevel 8892096dc0SQuytelda Kahja ); 8992096dc0SQuytelda Kahja 9092096dc0SQuytelda Kahja void 9192096dc0SQuytelda Kahja PHY_SetTxPowerLevel8723B( 9292096dc0SQuytelda Kahja struct adapter * Adapter, 9392096dc0SQuytelda Kahja u8 channel 9492096dc0SQuytelda Kahja ); 9592096dc0SQuytelda Kahja 9692096dc0SQuytelda Kahja void 9792096dc0SQuytelda Kahja PHY_SetBWMode8723B( 9892096dc0SQuytelda Kahja struct adapter * Adapter, 9992096dc0SQuytelda Kahja enum CHANNEL_WIDTH Bandwidth, /* 20M or 40M */ 10092096dc0SQuytelda Kahja unsigned char Offset /* Upper, Lower, or Don't care */ 10192096dc0SQuytelda Kahja ); 10292096dc0SQuytelda Kahja 10392096dc0SQuytelda Kahja void 10492096dc0SQuytelda Kahja PHY_SwChnl8723B(/* Call after initialization */ 10592096dc0SQuytelda Kahja struct adapter *Adapter, 10692096dc0SQuytelda Kahja u8 channel 10792096dc0SQuytelda Kahja ); 10892096dc0SQuytelda Kahja 10992096dc0SQuytelda Kahja void 11092096dc0SQuytelda Kahja PHY_SetSwChnlBWMode8723B( 11192096dc0SQuytelda Kahja struct adapter * Adapter, 11292096dc0SQuytelda Kahja u8 channel, 11392096dc0SQuytelda Kahja enum CHANNEL_WIDTH Bandwidth, 11492096dc0SQuytelda Kahja u8 Offset40, 11592096dc0SQuytelda Kahja u8 Offset80 11692096dc0SQuytelda Kahja ); 11792096dc0SQuytelda Kahja 11892096dc0SQuytelda Kahja /*--------------------------Exported Function prototype End---------------------*/ 11992096dc0SQuytelda Kahja 12092096dc0SQuytelda Kahja #endif 121