1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __HAL_COM_PHYCFG_H__ 8 #define __HAL_COM_PHYCFG_H__ 9 10 #define PathA 0x0 /* Useless */ 11 #define PathB 0x1 12 #define PathC 0x2 13 #define PathD 0x3 14 15 enum rate_section { 16 CCK = 0, 17 OFDM, 18 HT_MCS0_MCS7, 19 HT_MCS8_MCS15, 20 HT_MCS16_MCS23, 21 HT_MCS24_MCS31, 22 }; 23 24 enum { 25 RF_1TX = 0, 26 RF_2TX, 27 RF_3TX, 28 RF_4TX, 29 RF_MAX_TX_NUM, 30 RF_TX_NUM_NONIMPLEMENT, 31 }; 32 33 #define MAX_POWER_INDEX 0x3F 34 35 enum { 36 TXPWR_LMT_FCC = 0, 37 TXPWR_LMT_MKK, 38 TXPWR_LMT_ETSI, 39 TXPWR_LMT_WW, 40 TXPWR_LMT_MAX_REGULATION_NUM, 41 }; 42 43 /*------------------------------Define structure----------------------------*/ 44 struct bb_register_def { 45 u32 rfintfs; /* set software control: */ 46 /* 0x870~0x877[8 bytes] */ 47 48 u32 rfintfo; /* output data: */ 49 /* 0x860~0x86f [16 bytes] */ 50 51 u32 rfintfe; /* output enable: */ 52 /* 0x860~0x86f [16 bytes] */ 53 54 u32 rf3wireOffset; /* LSSI data: */ 55 /* 0x840~0x84f [16 bytes] */ 56 57 u32 rfHSSIPara2; /* wire parameter control2 : */ 58 /* 0x824~0x827, 0x82c~0x82f, 59 * 0x834~0x837, 0x83c~0x83f 60 */ 61 u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */ 62 /* 0x8a0~0x8af [16 bytes] */ 63 64 u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 65 * 0x8b8-8bc for Path A and B */ 66 67 }; 68 69 u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath, u8 TxNum, 70 enum rate_section RateSection); 71 72 u8 PHY_GetRateSectionIndexOfTxPowerByRate(struct adapter *padapter, u32 RegAddr, 73 u32 BitMask); 74 75 void PHY_GetRateValuesOfTxPowerByRate(struct adapter *padapter, u32 RegAddr, 76 u32 BitMask, u32 Value, u8 *RateIndex, 77 s8 *PwrByRateVal, u8 *RateNum); 78 79 u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate); 80 81 void PHY_SetTxPowerIndexByRateSection(struct adapter *padapter, u8 RFPath, u8 Channel, 82 u8 RateSection); 83 84 s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 TxNum, u8 RateIndex); 85 86 void PHY_SetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 TxNum, u8 Rate, 87 s8 Value); 88 89 void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path); 90 91 void PHY_SetTxPowerIndexByRateArray(struct adapter *padapter, u8 RFPath, 92 enum channel_width BandWidth, u8 Channel, 93 u8 *Rates, u8 RateArraySize); 94 95 void PHY_InitTxPowerByRate(struct adapter *padapter); 96 97 void PHY_StoreTxPowerByRate(struct adapter *padapter, u32 RfPath, u32 TxNum, 98 u32 RegAddr, u32 BitMask, u32 Data); 99 100 void PHY_TxPowerByRateConfiguration(struct adapter *padapter); 101 102 u8 PHY_GetTxPowerIndexBase(struct adapter *padapter, u8 RFPath, u8 Rate, 103 enum channel_width BandWidth, u8 Channel); 104 105 s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 RegPwrTblSel, 106 enum channel_width Bandwidth, u8 RfPath, u8 DataRate, 107 u8 Channel); 108 109 void PHY_SetTxPowerLimit(struct adapter *Adapter, u8 *Regulation, u8 *Bandwidth, 110 u8 *RateSection, u8 *RfPath, u8 *Channel, u8 *PowerLimit); 111 112 void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter); 113 114 void PHY_InitTxPowerLimit(struct adapter *Adapter); 115 116 s8 PHY_GetTxPowerTrackingOffset(struct adapter *padapter, u8 Rate, u8 RFPath); 117 118 void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan); 119 120 #endif /* __HAL_COMMON_H__ */ 121