1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15 #ifndef __ODM_TYPES_H__ 16 #define __ODM_TYPES_H__ 17 18 #include <drv_types.h> 19 20 /* Deifne HW endian support */ 21 #define ODM_ENDIAN_BIG 0 22 #define ODM_ENDIAN_LITTLE 1 23 24 #define GET_ODM(__padapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__padapter))->odmpriv))) 25 26 typedef enum _HAL_STATUS { 27 HAL_STATUS_SUCCESS, 28 HAL_STATUS_FAILURE, 29 /*RT_STATUS_PENDING, 30 RT_STATUS_RESOURCE, 31 RT_STATUS_INVALID_CONTEXT, 32 RT_STATUS_INVALID_PARAMETER, 33 RT_STATUS_NOT_SUPPORT, 34 RT_STATUS_OS_API_FAILED,*/ 35 } HAL_STATUS, *PHAL_STATUS; 36 37 38 /* */ 39 /* Declare for ODM spin lock defintion temporarily fro compile pass. */ 40 /* */ 41 typedef enum _RT_SPINLOCK_TYPE { 42 RT_TX_SPINLOCK = 1, 43 RT_RX_SPINLOCK = 2, 44 RT_RM_SPINLOCK = 3, 45 RT_CAM_SPINLOCK = 4, 46 RT_SCAN_SPINLOCK = 5, 47 RT_LOG_SPINLOCK = 7, 48 RT_BW_SPINLOCK = 8, 49 RT_CHNLOP_SPINLOCK = 9, 50 RT_RF_OPERATE_SPINLOCK = 10, 51 RT_INITIAL_SPINLOCK = 11, 52 RT_RF_STATE_SPINLOCK = 12, /* For RF state. Added by Bruce, 2007-10-30. */ 53 /* Shall we define Ndis 6.2 SpinLock Here ? */ 54 RT_PORT_SPINLOCK = 16, 55 RT_H2C_SPINLOCK = 20, /* For H2C cmd. Added by tynli. 2009.11.09. */ 56 57 RT_BTData_SPINLOCK = 25, 58 59 RT_WAPI_OPTION_SPINLOCK = 26, 60 RT_WAPI_RX_SPINLOCK = 27, 61 62 /* add for 92D CCK control issue */ 63 RT_CCK_PAGEA_SPINLOCK = 28, 64 RT_BUFFER_SPINLOCK = 29, 65 RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, 66 RT_GEN_TEMP_BUF_SPINLOCK = 31, 67 RT_AWB_SPINLOCK = 32, 68 RT_FW_PS_SPINLOCK = 33, 69 RT_HW_TIMER_SPIN_LOCK = 34, 70 RT_MPT_WI_SPINLOCK = 35, 71 RT_P2P_SPIN_LOCK = 36, /* Protect P2P context */ 72 RT_DBG_SPIN_LOCK = 37, 73 RT_IQK_SPINLOCK = 38, 74 RT_PENDED_OID_SPINLOCK = 39, 75 RT_CHNLLIST_SPINLOCK = 40, 76 RT_INDIC_SPINLOCK = 41, /* protect indication */ 77 } RT_SPINLOCK_TYPE; 78 79 #if defined(__LITTLE_ENDIAN) 80 #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE 81 #else 82 #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG 83 #endif 84 85 typedef struct timer_list RT_TIMER, *PRT_TIMER; 86 typedef void *RT_TIMER_CALL_BACK; 87 #define STA_INFO_T struct sta_info 88 #define PSTA_INFO_T struct sta_info * 89 90 #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) 91 #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) 92 #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) 93 94 /* define useless flag to avoid compile warning */ 95 #define USE_WORKITEM 0 96 #define FPGA_TWO_MAC_VERIFICATION 0 97 98 #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) 99 #define COND_ELSE 2 100 #define COND_ENDIF 3 101 102 #endif /* __ODM_TYPES_H__ */ 103