1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 
8 #include "odm_precomp.h"
9 
10 void odm_ConfigRFReg_8723B(
11 	struct dm_odm_t *pDM_Odm,
12 	u32 Addr,
13 	u32 Data,
14 	enum odm_rf_radio_path_e RF_PATH,
15 	u32 RegAddr
16 )
17 {
18 	if (Addr == 0xfe || Addr == 0xffe)
19 		msleep(50);
20 	else {
21 		PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
22 		/*  Add 1us delay between BB/RF register setting. */
23 		udelay(1);
24 
25 		/* For disable/enable test in high temperature, the B6 value will fail to fill. Suggestion by BB Stanley, 2013.06.25. */
26 		if (Addr == 0xb6) {
27 			u32 getvalue = 0;
28 			u8 count = 0;
29 
30 			getvalue = PHY_QueryRFReg(
31 				pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
32 			);
33 
34 			udelay(1);
35 
36 			while ((getvalue>>8) != (Data>>8)) {
37 				count++;
38 				PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
39 				udelay(1);
40 				getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord);
41 				if (count > 5)
42 					break;
43 			}
44 		}
45 
46 		if (Addr == 0xb2) {
47 			u32 getvalue = 0;
48 			u8 count = 0;
49 
50 			getvalue = PHY_QueryRFReg(
51 				pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
52 			);
53 
54 			udelay(1);
55 
56 			while (getvalue != Data) {
57 				count++;
58 				PHY_SetRFReg(
59 					pDM_Odm->Adapter,
60 					RF_PATH,
61 					RegAddr,
62 					bRFRegOffsetMask,
63 					Data
64 				);
65 				udelay(1);
66 				/* Do LCK againg */
67 				PHY_SetRFReg(
68 					pDM_Odm->Adapter,
69 					RF_PATH,
70 					0x18,
71 					bRFRegOffsetMask,
72 					0x0fc07
73 				);
74 				udelay(1);
75 				getvalue = PHY_QueryRFReg(
76 					pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord
77 				);
78 
79 				if (count > 5)
80 					break;
81 			}
82 		}
83 	}
84 }
85 
86 
87 void odm_ConfigRF_RadioA_8723B(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data)
88 {
89 	u32  content = 0x1000; /*  RF_Content: radioa_txt */
90 	u32 maskforPhySet = (u32)(content&0xE000);
91 
92 	odm_ConfigRFReg_8723B(
93 		pDM_Odm,
94 		Addr,
95 		Data,
96 		ODM_RF_PATH_A,
97 		Addr|maskforPhySet
98 	);
99 }
100 
101 void odm_ConfigMAC_8723B(struct dm_odm_t *pDM_Odm, u32 Addr, u8 Data)
102 {
103 	rtw_write8(pDM_Odm->Adapter, Addr, Data);
104 }
105 
106 void odm_ConfigBB_AGC_8723B(
107 	struct dm_odm_t *pDM_Odm,
108 	u32 Addr,
109 	u32 Bitmask,
110 	u32 Data
111 )
112 {
113 	PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
114 	/*  Add 1us delay between BB/RF register setting. */
115 	udelay(1);
116 }
117 
118 void odm_ConfigBB_PHY_REG_PG_8723B(
119 	struct dm_odm_t *pDM_Odm,
120 	u32 RfPath,
121 	u32 TxNum,
122 	u32 Addr,
123 	u32 Bitmask,
124 	u32 Data
125 )
126 {
127 	if (Addr == 0xfe || Addr == 0xffe)
128 		msleep(50);
129 	else {
130 		PHY_StoreTxPowerByRate(pDM_Odm->Adapter, RfPath, TxNum, Addr, Bitmask, Data);
131 	}
132 }
133 
134 void odm_ConfigBB_PHY_8723B(
135 	struct dm_odm_t *pDM_Odm,
136 	u32 Addr,
137 	u32 Bitmask,
138 	u32 Data
139 )
140 {
141 	if (Addr == 0xfe)
142 		msleep(50);
143 	else if (Addr == 0xfd)
144 		mdelay(5);
145 	else if (Addr == 0xfc)
146 		mdelay(1);
147 	else if (Addr == 0xfb)
148 		udelay(50);
149 	else if (Addr == 0xfa)
150 		udelay(5);
151 	else if (Addr == 0xf9)
152 		udelay(1);
153 	else {
154 		PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
155 	}
156 
157 	/*  Add 1us delay between BB/RF register setting. */
158 	udelay(1);
159 }
160 
161 void odm_ConfigBB_TXPWR_LMT_8723B(
162 	struct dm_odm_t *pDM_Odm,
163 	u8 *Regulation,
164 	u8 *Bandwidth,
165 	u8 *RateSection,
166 	u8 *RfPath,
167 	u8 *Channel,
168 	u8 *PowerLimit
169 )
170 {
171 	PHY_SetTxPowerLimit(
172 		pDM_Odm->Adapter,
173 		Regulation,
174 		Bandwidth,
175 		RateSection,
176 		RfPath,
177 		Channel,
178 		PowerLimit
179 	);
180 }
181