1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15 16 17 #ifndef __HALHWOUTSRC_H__ 18 #define __HALHWOUTSRC_H__ 19 20 21 /*--------------------------Define -------------------------------------------*/ 22 /* define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) */ 23 #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ 24 sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32))) 25 #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ 26 sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32))) 27 28 #define AGC_DIFF_CONFIG(ic, band)\ 29 do {\ 30 if (pDM_Odm->bIsMPChip)\ 31 AGC_DIFF_CONFIG_MP(ic, band);\ 32 else\ 33 AGC_DIFF_CONFIG_TC(ic, band);\ 34 } while (0) 35 36 37 /* */ 38 /* structure and define */ 39 /* */ 40 41 typedef struct _Phy_Rx_AGC_Info { 42 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) 43 u8 gain:7, trsw:1; 44 #else 45 u8 trsw:1, gain:7; 46 #endif 47 } PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T; 48 49 typedef struct _Phy_Status_Rpt_8192cd { 50 PHY_RX_AGC_INFO_T path_agc[2]; 51 u8 ch_corr[2]; 52 u8 cck_sig_qual_ofdm_pwdb_all; 53 u8 cck_agc_rpt_ofdm_cfosho_a; 54 u8 cck_rpt_b_ofdm_cfosho_b; 55 u8 rsvd_1;/* ch_corr_msb; */ 56 u8 noise_power_db_msb; 57 s8 path_cfotail[2]; 58 u8 pcts_mask[2]; 59 s8 stream_rxevm[2]; 60 u8 path_rxsnr[2]; 61 u8 noise_power_db_lsb; 62 u8 rsvd_2[3]; 63 u8 stream_csi[2]; 64 u8 stream_target_csi[2]; 65 s8 sig_evm; 66 u8 rsvd_3; 67 68 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) 69 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ 70 u8 sgi_en:1; 71 u8 rxsc:2; 72 u8 idle_long:1; 73 u8 r_ant_train_en:1; 74 u8 ant_sel_b:1; 75 u8 ant_sel:1; 76 #else /* _BIG_ENDIAN_ */ 77 u8 ant_sel:1; 78 u8 ant_sel_b:1; 79 u8 r_ant_train_en:1; 80 u8 idle_long:1; 81 u8 rxsc:2; 82 u8 sgi_en:1; 83 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ 84 #endif 85 } PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T; 86 87 88 typedef struct _Phy_Status_Rpt_8812 { 89 /* 2012.05.24 LukeLee: This structure should take big/little endian in consideration later..... */ 90 91 /* DWORD 0 */ 92 u8 gain_trsw[2]; 93 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) 94 u16 chl_num:10; 95 u16 sub_chnl:4; 96 u16 r_RFMOD:2; 97 #else /* _BIG_ENDIAN_ */ 98 u16 r_RFMOD:2; 99 u16 sub_chnl:4; 100 u16 chl_num:10; 101 #endif 102 103 /* DWORD 1 */ 104 u8 pwdb_all; 105 u8 cfosho[4]; /* DW 1 byte 1 DW 2 byte 0 */ 106 107 /* DWORD 2 */ 108 s8 cfotail[4]; /* DW 2 byte 1 DW 3 byte 0 */ 109 110 /* DWORD 3 */ 111 s8 rxevm[2]; /* DW 3 byte 1 DW 3 byte 2 */ 112 s8 rxsnr[2]; /* DW 3 byte 3 DW 4 byte 0 */ 113 114 /* DWORD 4 */ 115 u8 PCTS_MSK_RPT[2]; 116 u8 pdsnr[2]; /* DW 4 byte 3 DW 5 Byte 0 */ 117 118 /* DWORD 5 */ 119 u8 csi_current[2]; 120 u8 rx_gain_c; 121 122 /* DWORD 6 */ 123 u8 rx_gain_d; 124 s8 sigevm; 125 u8 resvd_0; 126 u8 antidx_anta:3; 127 u8 antidx_antb:3; 128 u8 resvd_1:2; 129 } PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T; 130 131 132 void ODM_PhyStatusQuery( 133 PDM_ODM_T pDM_Odm, 134 struct odm_phy_info *pPhyInfo, 135 u8 *pPhyStatus, 136 struct odm_packet_info *pPktinfo 137 ); 138 139 HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm); 140 141 HAL_STATUS ODM_ConfigRFWithHeaderFile( 142 PDM_ODM_T pDM_Odm, 143 ODM_RF_Config_Type ConfigType, 144 ODM_RF_RADIO_PATH_E eRFPath 145 ); 146 147 HAL_STATUS ODM_ConfigBBWithHeaderFile( 148 PDM_ODM_T pDM_Odm, ODM_BB_Config_Type ConfigType 149 ); 150 151 HAL_STATUS ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm); 152 153 HAL_STATUS ODM_ConfigFWWithHeaderFile( 154 PDM_ODM_T pDM_Odm, 155 ODM_FW_Config_Type ConfigType, 156 u8 *pFirmware, 157 u32 *pSize 158 ); 159 160 s32 odm_SignalScaleMapping(PDM_ODM_T pDM_Odm, s32 CurrSig); 161 162 #endif 163