1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * Modifications for inclusion into the Linux staging tree are
19  * Copyright(c) 2010 Larry Finger. All rights reserved.
20  *
21  * Contact information:
22  * WLAN FAE <wlanfae@realtek.com>
23  * Larry Finger <Larry.Finger@lwfinger.net>
24  *
25  ******************************************************************************/
26 #ifndef __RTL871X_PWRCTRL_H_
27 #define __RTL871X_PWRCTRL_H_
28 
29 #include "osdep_service.h"
30 #include "drv_types.h"
31 
32 
33 #define CMD_ALIVE	BIT(2)
34 
35 enum Power_Mgnt {
36 	PS_MODE_ACTIVE	= 0,
37 	PS_MODE_MIN,
38 	PS_MODE_MAX,
39 	PS_MODE_DTIM,
40 	PS_MODE_VOIP,
41 	PS_MODE_UAPSD_WMM,
42 	PS_MODE_UAPSD,
43 	PS_MODE_IBSS,
44 	PS_MODE_WWLAN,
45 	PM_Radio_Off,
46 	PM_Card_Disable,
47 	PS_MODE_NUM
48 };
49 
50 /*
51  * BIT[2:0] = HW state
52  * BIT[3] = Protocol PS state, 0: register active state,
53  *				1: register sleep state
54  * BIT[4] = sub-state
55  */
56 
57 #define		PS_DPS				BIT(0)
58 #define		PS_LCLK				(PS_DPS)
59 #define	PS_RF_OFF			BIT(1)
60 #define	PS_ALL_ON			BIT(2)
61 #define	PS_ST_ACTIVE		BIT(3)
62 #define	PS_LP				BIT(4)	/* low performance */
63 
64 #define	PS_STATE_MASK		(0x0F)
65 #define	PS_STATE_HW_MASK	(0x07)
66 #define		PS_SEQ_MASK		(0xc0)
67 
68 #define	PS_STATE(x)			(PS_STATE_MASK & (x))
69 #define	PS_STATE_HW(x)	(PS_STATE_HW_MASK & (x))
70 #define	PS_SEQ(x)			(PS_SEQ_MASK & (x))
71 
72 #define	PS_STATE_S0		(PS_DPS)
73 #define		PS_STATE_S1		(PS_LCLK)
74 #define	PS_STATE_S2		(PS_RF_OFF)
75 #define		PS_STATE_S3		(PS_ALL_ON)
76 #define	PS_STATE_S4		((PS_ST_ACTIVE) | (PS_ALL_ON))
77 
78 
79 #define		PS_IS_RF_ON(x)		((x) & (PS_ALL_ON))
80 #define		PS_IS_ACTIVE(x)		((x) & (PS_ST_ACTIVE))
81 #define		CLR_PS_STATE(x)	((x) = ((x) & (0xF0)))
82 
83 
84 struct reportpwrstate_parm {
85 	unsigned char mode;
86 	unsigned char state; /* the CPWM value */
87 	unsigned short rsvd;
88 };
89 
90 struct	pwrctrl_priv {
91 	struct mutex mutex_lock;
92 	/*volatile*/ u8 rpwm; /* requested power state for fw */
93 	/* fw current power state. updated when 1. read from HCPWM or
94 	 * 2. driver lowers power level
95 	 */
96 	/*volatile*/ u8 cpwm;
97 	/*volatile*/ u8 tog; /* toggling */
98 	/*volatile*/ u8 cpwm_tog; /* toggling */
99 	/*volatile*/ u8 tgt_rpwm; /* wanted power state */
100 	uint pwr_mode;
101 	uint smart_ps;
102 	uint alives;
103 	uint ImrContent;	/* used to store original imr. */
104 	uint bSleep; /* sleep -> active is different from active -> sleep. */
105 
106 	struct work_struct SetPSModeWorkItem;
107 	struct work_struct rpwm_workitem;
108 	struct timer_list rpwm_check_timer;
109 	u8	rpwm_retry;
110 	uint	bSetPSModeWorkItemInProgress;
111 
112 	spinlock_t pnp_pwr_mgnt_lock;
113 	s32	pnp_current_pwr_state;
114 	u8	pnp_bstop_trx;
115 	u8	pnp_wwirp_pending;
116 };
117 
118 void r8712_init_pwrctrl_priv(struct _adapter *adapter);
119 sint r8712_register_cmd_alive(struct _adapter *padapter);
120 void r8712_unregister_cmd_alive(struct _adapter *padapter);
121 void r8712_cpwm_int_hdl(struct _adapter *padapter,
122 			struct reportpwrstate_parm *preportpwrstate);
123 void r8712_set_ps_mode(struct _adapter *padapter, uint ps_mode,
124 			uint smart_ps);
125 void r8712_set_rpwm(struct _adapter *padapter, u8 val8);
126 
127 #endif  /* __RTL871X_PWRCTRL_H_ */
128