1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * Modifications for inclusion into the Linux staging tree are
19  * Copyright(c) 2010 Larry Finger. All rights reserved.
20  *
21  * Contact information:
22  * WLAN FAE <wlanfae@realtek.com>
23  * Larry Finger <Larry.Finger@lwfinger.net>
24  *
25  ******************************************************************************/
26 #ifndef __RTL8712_SPEC_H__
27 #define __RTL8712_SPEC_H__
28 
29 #define RTL8712_IOBASE_TXPKT		0x10200000	/*IOBASE_TXPKT*/
30 #define RTL8712_IOBASE_RXPKT		0x10210000	/*IOBASE_RXPKT*/
31 #define RTL8712_IOBASE_RXCMD		0x10220000	/*IOBASE_RXCMD*/
32 #define RTL8712_IOBASE_TXSTATUS		0x10230000	/*IOBASE_TXSTATUS*/
33 #define RTL8712_IOBASE_RXSTATUS		0x10240000	/*IOBASE_RXSTATUS*/
34 #define RTL8712_IOBASE_IOREG		0x10250000	/*IOBASE_IOREG ADDR*/
35 #define RTL8712_IOBASE_SCHEDULER	0x10260000	/*IOBASE_SCHEDULE*/
36 
37 #define RTL8712_IOBASE_TRXDMA		0x10270000	/*IOBASE_TRXDMA*/
38 #define RTL8712_IOBASE_TXLLT		0x10280000	/*IOBASE_TXLLT*/
39 #define RTL8712_IOBASE_WMAC		0x10290000	/*IOBASE_WMAC*/
40 #define RTL8712_IOBASE_FW2HW		0x102A0000	/*IOBASE_FW2HW*/
41 #define RTL8712_IOBASE_ACCESS_PHYREG	0x102B0000	/*IOBASE_ACCESS_PHYREG*/
42 
43 #define RTL8712_IOBASE_FF	0x10300000 /*IOBASE_FIFO 0x1031000~0x103AFFFF*/
44 
45 
46 /*IOREG Offset for 8712*/
47 #define RTL8712_SYSCFG_		RTL8712_IOBASE_IOREG
48 #define RTL8712_CMDCTRL_	(RTL8712_IOBASE_IOREG + 0x40)
49 #define RTL8712_MACIDSETTING_	(RTL8712_IOBASE_IOREG + 0x50)
50 #define RTL8712_TIMECTRL_	(RTL8712_IOBASE_IOREG + 0x80)
51 #define RTL8712_FIFOCTRL_	(RTL8712_IOBASE_IOREG + 0xA0)
52 #define RTL8712_RATECTRL_	(RTL8712_IOBASE_IOREG + 0x160)
53 #define RTL8712_EDCASETTING_	(RTL8712_IOBASE_IOREG + 0x1D0)
54 #define RTL8712_WMAC_		(RTL8712_IOBASE_IOREG + 0x200)
55 #define RTL8712_SECURITY_	(RTL8712_IOBASE_IOREG + 0x240)
56 #define RTL8712_POWERSAVE_	(RTL8712_IOBASE_IOREG + 0x260)
57 #define RTL8712_GP_		(RTL8712_IOBASE_IOREG + 0x2E0)
58 #define RTL8712_INTERRUPT_	(RTL8712_IOBASE_IOREG + 0x300)
59 #define RTL8712_DEBUGCTRL_	(RTL8712_IOBASE_IOREG + 0x310)
60 #define RTL8712_OFFLOAD_	(RTL8712_IOBASE_IOREG + 0x2D0)
61 
62 
63 /*FIFO for 8712*/
64 #define RTL8712_DMA_BCNQ	(RTL8712_IOBASE_FF + 0x10000)
65 #define RTL8712_DMA_MGTQ	(RTL8712_IOBASE_FF + 0x20000)
66 #define RTL8712_DMA_BMCQ	(RTL8712_IOBASE_FF + 0x30000)
67 #define RTL8712_DMA_VOQ		(RTL8712_IOBASE_FF + 0x40000)
68 #define RTL8712_DMA_VIQ		(RTL8712_IOBASE_FF + 0x50000)
69 #define RTL8712_DMA_BEQ		(RTL8712_IOBASE_FF + 0x60000)
70 #define RTL8712_DMA_BKQ		(RTL8712_IOBASE_FF + 0x70000)
71 #define RTL8712_DMA_RX0FF	(RTL8712_IOBASE_FF + 0x80000)
72 #define RTL8712_DMA_H2CCMD	(RTL8712_IOBASE_FF + 0x90000)
73 #define RTL8712_DMA_C2HCMD	(RTL8712_IOBASE_FF + 0xA0000)
74 
75 
76 /*------------------------------*/
77 
78 /*BIT 16 15*/
79 #define	DID_SDIO_LOCAL			0	/* 0 0*/
80 #define	DID_WLAN_IOREG			1	/* 0 1*/
81 #define	DID_WLAN_FIFO			3	/* 1 1*/
82 #define   DID_UNDEFINE				(-1)
83 
84 #define CMD_ADDR_MAPPING_SHIFT		2	/*SDIO CMD ADDR MAPPING,
85 						 *shift 2 bit for match
86 						 * offset[14:2]*/
87 
88 /*Offset for SDIO LOCAL*/
89 #define	OFFSET_SDIO_LOCAL				0x0FFF
90 
91 /*Offset for WLAN IOREG*/
92 #define OFFSET_WLAN_IOREG				0x0FFF
93 
94 /*Offset for WLAN FIFO*/
95 #define	OFFSET_TX_BCNQ				0x0300
96 #define	OFFSET_TX_HIQ					0x0310
97 #define	OFFSET_TX_CMDQ				0x0320
98 #define	OFFSET_TX_MGTQ				0x0330
99 #define	OFFSET_TX_HCCAQ				0x0340
100 #define	OFFSET_TX_VOQ					0x0350
101 #define	OFFSET_TX_VIQ					0x0360
102 #define	OFFSET_TX_BEQ					0x0370
103 #define	OFFSET_TX_BKQ					0x0380
104 #define	OFFSET_RX_RX0FFQ				0x0390
105 #define	OFFSET_RX_C2HFFQ				0x03A0
106 
107 #define	BK_QID_01	1
108 #define	BK_QID_02	2
109 #define	BE_QID_01	0
110 #define	BE_QID_02	3
111 #define	VI_QID_01	4
112 #define	VI_QID_02	5
113 #define	VO_QID_01	6
114 #define	VO_QID_02	7
115 #define	HCCA_QID_01	8
116 #define	HCCA_QID_02	9
117 #define	HCCA_QID_03	10
118 #define	HCCA_QID_04	11
119 #define	HCCA_QID_05	12
120 #define	HCCA_QID_06	13
121 #define	HCCA_QID_07	14
122 #define	HCCA_QID_08	15
123 #define	HI_QID		17
124 #define	CMD_QID	19
125 #define	MGT_QID	18
126 #define	BCN_QID	16
127 
128 #include "rtl8712_regdef.h"
129 
130 #include "rtl8712_bitdef.h"
131 
132 #include "basic_types.h"
133 
134 #endif /* __RTL8712_SPEC_H__ */
135 
136