1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 28fc8598eSJerry Chuang #ifndef _R819XU_PHYREG_H 38fc8598eSJerry Chuang #define _R819XU_PHYREG_H 48fc8598eSJerry Chuang 58fc8598eSJerry Chuang 62160e944SSanjeev Sharma #define RF_DATA 0x1d4 /* FW will write RF data in the register.*/ 78fc8598eSJerry Chuang 82160e944SSanjeev Sharma /* page8 */ 92160e944SSanjeev Sharma #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ 108fc8598eSJerry Chuang #define rFPGA0_TxGainStage 0x80c 118fc8598eSJerry Chuang #define rFPGA0_XA_HSSIParameter1 0x820 128fc8598eSJerry Chuang #define rFPGA0_XA_HSSIParameter2 0x824 138fc8598eSJerry Chuang #define rFPGA0_XB_HSSIParameter1 0x828 148fc8598eSJerry Chuang #define rFPGA0_XB_HSSIParameter2 0x82c 158fc8598eSJerry Chuang #define rFPGA0_XC_HSSIParameter1 0x830 168fc8598eSJerry Chuang #define rFPGA0_XC_HSSIParameter2 0x834 178fc8598eSJerry Chuang #define rFPGA0_XD_HSSIParameter1 0x838 188fc8598eSJerry Chuang #define rFPGA0_XD_HSSIParameter2 0x83c 198fc8598eSJerry Chuang #define rFPGA0_XA_LSSIParameter 0x840 208fc8598eSJerry Chuang #define rFPGA0_XB_LSSIParameter 0x844 218fc8598eSJerry Chuang #define rFPGA0_XC_LSSIParameter 0x848 228fc8598eSJerry Chuang #define rFPGA0_XD_LSSIParameter 0x84c 238fc8598eSJerry Chuang #define rFPGA0_XAB_SwitchControl 0x858 248fc8598eSJerry Chuang #define rFPGA0_XCD_SwitchControl 0x85c 258fc8598eSJerry Chuang #define rFPGA0_XA_RFInterfaceOE 0x860 268fc8598eSJerry Chuang #define rFPGA0_XB_RFInterfaceOE 0x864 278fc8598eSJerry Chuang #define rFPGA0_XC_RFInterfaceOE 0x868 288fc8598eSJerry Chuang #define rFPGA0_XD_RFInterfaceOE 0x86c 298fc8598eSJerry Chuang #define rFPGA0_XAB_RFInterfaceSW 0x870 308fc8598eSJerry Chuang #define rFPGA0_XCD_RFInterfaceSW 0x874 318fc8598eSJerry Chuang #define rFPGA0_XAB_RFParameter 0x878 328fc8598eSJerry Chuang #define rFPGA0_XCD_RFParameter 0x87c 338fc8598eSJerry Chuang #define rFPGA0_AnalogParameter1 0x880 348fc8598eSJerry Chuang #define rFPGA0_AnalogParameter4 0x88c 358fc8598eSJerry Chuang #define rFPGA0_XA_LSSIReadBack 0x8a0 368fc8598eSJerry Chuang #define rFPGA0_XB_LSSIReadBack 0x8a4 378fc8598eSJerry Chuang #define rFPGA0_XC_LSSIReadBack 0x8a8 388fc8598eSJerry Chuang #define rFPGA0_XD_LSSIReadBack 0x8ac 398fc8598eSJerry Chuang #define rFPGA0_XAB_RFInterfaceRB 0x8e0 408fc8598eSJerry Chuang #define rFPGA0_XCD_RFInterfaceRB 0x8e4 418fc8598eSJerry Chuang 422160e944SSanjeev Sharma /* page 9 */ 432160e944SSanjeev Sharma #define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ 448fc8598eSJerry Chuang 452160e944SSanjeev Sharma /* page a */ 468fc8598eSJerry Chuang #define rCCK0_System 0xa00 478fc8598eSJerry Chuang #define rCCK0_AFESetting 0xa04 488fc8598eSJerry Chuang #define rCCK0_CCA 0xa08 498fc8598eSJerry Chuang #define rCCK0_TxFilter1 0xa20 508fc8598eSJerry Chuang #define rCCK0_TxFilter2 0xa24 512160e944SSanjeev Sharma #define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ 528fc8598eSJerry Chuang 532160e944SSanjeev Sharma /* page c */ 548fc8598eSJerry Chuang #define rOFDM0_TRxPathEnable 0xc04 552160e944SSanjeev Sharma #define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ 562160e944SSanjeev Sharma #define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ 578fc8598eSJerry Chuang #define rOFDM0_XBRxAFE 0xc18 588fc8598eSJerry Chuang #define rOFDM0_XBRxIQImbalance 0xc1c 598fc8598eSJerry Chuang #define rOFDM0_XCRxAFE 0xc20 608fc8598eSJerry Chuang #define rOFDM0_XCRxIQImbalance 0xc24 618fc8598eSJerry Chuang #define rOFDM0_XDRxAFE 0xc28 628fc8598eSJerry Chuang #define rOFDM0_XDRxIQImbalance 0xc2c 632160e944SSanjeev Sharma #define rOFDM0_RxDetector1 0xc30 /* PD,BW & SBD */ 642160e944SSanjeev Sharma #define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync.*/ 652160e944SSanjeev Sharma #define rOFDM0_RxDetector3 0xc38 /* Frame Sync.*/ 662160e944SSanjeev Sharma #define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ 678fc8598eSJerry Chuang #define rOFDM0_XAAGCCore1 0xc50 688fc8598eSJerry Chuang #define rOFDM0_XAAGCCore2 0xc54 698fc8598eSJerry Chuang #define rOFDM0_XBAGCCore1 0xc58 708fc8598eSJerry Chuang #define rOFDM0_XBAGCCore2 0xc5c 718fc8598eSJerry Chuang #define rOFDM0_XCAGCCore1 0xc60 728fc8598eSJerry Chuang #define rOFDM0_XCAGCCore2 0xc64 738fc8598eSJerry Chuang #define rOFDM0_XDAGCCore1 0xc68 748fc8598eSJerry Chuang #define rOFDM0_XDAGCCore2 0xc6c 758fc8598eSJerry Chuang #define rOFDM0_XATxIQImbalance 0xc80 768fc8598eSJerry Chuang #define rOFDM0_XATxAFE 0xc84 778fc8598eSJerry Chuang #define rOFDM0_XBTxIQImbalance 0xc88 788fc8598eSJerry Chuang #define rOFDM0_XBTxAFE 0xc8c 798fc8598eSJerry Chuang #define rOFDM0_XCTxIQImbalance 0xc90 808fc8598eSJerry Chuang #define rOFDM0_XCTxAFE 0xc94 818fc8598eSJerry Chuang #define rOFDM0_XDTxIQImbalance 0xc98 828fc8598eSJerry Chuang #define rOFDM0_XDTxAFE 0xc9c 838fc8598eSJerry Chuang 848fc8598eSJerry Chuang 852160e944SSanjeev Sharma /* page d */ 868fc8598eSJerry Chuang #define rOFDM1_LSTF 0xd00 878fc8598eSJerry Chuang #define rOFDM1_TRxPathEnable 0xd04 888fc8598eSJerry Chuang 892160e944SSanjeev Sharma /* page e */ 908fc8598eSJerry Chuang #define rTxAGC_Rate18_06 0xe00 918fc8598eSJerry Chuang #define rTxAGC_Rate54_24 0xe04 928fc8598eSJerry Chuang #define rTxAGC_CCK_Mcs32 0xe08 938fc8598eSJerry Chuang #define rTxAGC_Mcs03_Mcs00 0xe10 948fc8598eSJerry Chuang #define rTxAGC_Mcs07_Mcs04 0xe14 958fc8598eSJerry Chuang #define rTxAGC_Mcs11_Mcs08 0xe18 968fc8598eSJerry Chuang #define rTxAGC_Mcs15_Mcs12 0xe1c 978fc8598eSJerry Chuang 988fc8598eSJerry Chuang 992160e944SSanjeev Sharma /* RF 1002160e944SSanjeev Sharma * Zebra1 1012160e944SSanjeev Sharma */ 1028fc8598eSJerry Chuang #define rZebra1_Channel 0x7 1038fc8598eSJerry Chuang 1042160e944SSanjeev Sharma /* Zebra4 */ 1058fc8598eSJerry Chuang #define rGlobalCtrl 0 1068fc8598eSJerry Chuang 1072160e944SSanjeev Sharma /* Bit Mask 108531db655SJohn Whitmore * page-8 1092160e944SSanjeev Sharma */ 1108fc8598eSJerry Chuang #define bRFMOD 0x1 1118fc8598eSJerry Chuang #define bJapanMode 0x2 1128fc8598eSJerry Chuang #define bCCKTxSC 0x30 1138fc8598eSJerry Chuang #define bCCKEn 0x1000000 1148fc8598eSJerry Chuang #define bOFDMEn 0x2000000 1158fc8598eSJerry Chuang #define bOFDMRxADCPhase 0x10000 1168fc8598eSJerry Chuang #define bOFDMTxDACPhase 0x40000 1178fc8598eSJerry Chuang #define bXATxAGC 0x3f 1188fc8598eSJerry Chuang #define bXBTxAGC 0xf00 1198fc8598eSJerry Chuang #define bXCTxAGC 0xf000 1208fc8598eSJerry Chuang #define bXDTxAGC 0xf0000 1218fc8598eSJerry Chuang #define bPAStart 0xf0000000 1228fc8598eSJerry Chuang #define bTRStart 0x00f00000 1238fc8598eSJerry Chuang #define bRFStart 0x0000f000 1248fc8598eSJerry Chuang #define bBBStart 0x000000f0 1258fc8598eSJerry Chuang #define bBBCCKStart 0x0000000f 1262160e944SSanjeev Sharma #define bPAEnd 0xf /* Reg0x814 */ 1278fc8598eSJerry Chuang #define bTREnd 0x0f000000 1288fc8598eSJerry Chuang #define bRFEnd 0x000f0000 1292160e944SSanjeev Sharma #define bCCAMask 0x000000f0 /* T2R */ 1308fc8598eSJerry Chuang #define bR2RCCAMask 0x00000f00 1318fc8598eSJerry Chuang #define bHSSI_R2TDelay 0xf8000000 1328fc8598eSJerry Chuang #define bHSSI_T2RDelay 0xf80000 1332160e944SSanjeev Sharma #define bContTxHSSI 0x400 /* chane gain at continue Tx */ 1348fc8598eSJerry Chuang #define bIGFromCCK 0x200 1358fc8598eSJerry Chuang #define bAGCAddress 0x3f 1368fc8598eSJerry Chuang #define bRxHPTx 0x7000 1378fc8598eSJerry Chuang #define bRxHPT2R 0x38000 1388fc8598eSJerry Chuang #define bRxHPCCKIni 0xc0000 1398fc8598eSJerry Chuang #define bAGCTxCode 0xc00000 1408fc8598eSJerry Chuang #define bAGCRxCode 0x300000 1418fc8598eSJerry Chuang #define b3WireDataLength 0x800 1428fc8598eSJerry Chuang #define b3WireAddressLength 0x400 1438fc8598eSJerry Chuang #define b3WireRFPowerDown 0x1 1442160e944SSanjeev Sharma /* #define bHWSISelect 0x8 */ 1458fc8598eSJerry Chuang #define b5GPAPEPolarity 0x40000000 1468fc8598eSJerry Chuang #define b2GPAPEPolarity 0x80000000 1478fc8598eSJerry Chuang #define bRFSW_TxDefaultAnt 0x3 1488fc8598eSJerry Chuang #define bRFSW_TxOptionAnt 0x30 1498fc8598eSJerry Chuang #define bRFSW_RxDefaultAnt 0x300 1508fc8598eSJerry Chuang #define bRFSW_RxOptionAnt 0x3000 1518fc8598eSJerry Chuang #define bRFSI_3WireData 0x1 1528fc8598eSJerry Chuang #define bRFSI_3WireClock 0x2 1538fc8598eSJerry Chuang #define bRFSI_3WireLoad 0x4 1548fc8598eSJerry Chuang #define bRFSI_3WireRW 0x8 1552160e944SSanjeev Sharma #define bRFSI_3Wire 0xf /* 3-wire total control */ 1568fc8598eSJerry Chuang #define bRFSI_RFENV 0x10 1578fc8598eSJerry Chuang #define bRFSI_TRSW 0x20 1588fc8598eSJerry Chuang #define bRFSI_TRSWB 0x40 1598fc8598eSJerry Chuang #define bRFSI_ANTSW 0x100 1608fc8598eSJerry Chuang #define bRFSI_ANTSWB 0x200 1618fc8598eSJerry Chuang #define bRFSI_PAPE 0x400 1628fc8598eSJerry Chuang #define bRFSI_PAPE5G 0x800 1638fc8598eSJerry Chuang #define bBandSelect 0x1 1648fc8598eSJerry Chuang #define bHTSIG2_GI 0x80 1658fc8598eSJerry Chuang #define bHTSIG2_Smoothing 0x01 1668fc8598eSJerry Chuang #define bHTSIG2_Sounding 0x02 1678fc8598eSJerry Chuang #define bHTSIG2_Aggreaton 0x08 1688fc8598eSJerry Chuang #define bHTSIG2_STBC 0x30 1698fc8598eSJerry Chuang #define bHTSIG2_AdvCoding 0x40 1708fc8598eSJerry Chuang #define bHTSIG2_NumOfHTLTF 0x300 1718fc8598eSJerry Chuang #define bHTSIG2_CRC8 0x3fc 1728fc8598eSJerry Chuang #define bHTSIG1_MCS 0x7f 1738fc8598eSJerry Chuang #define bHTSIG1_BandWidth 0x80 1748fc8598eSJerry Chuang #define bHTSIG1_HTLength 0xffff 1758fc8598eSJerry Chuang #define bLSIG_Rate 0xf 1768fc8598eSJerry Chuang #define bLSIG_Reserved 0x10 1778fc8598eSJerry Chuang #define bLSIG_Length 0x1fffe 1788fc8598eSJerry Chuang #define bLSIG_Parity 0x20 1798fc8598eSJerry Chuang #define bCCKRxPhase 0x4 1802160e944SSanjeev Sharma #define bLSSIReadAddress 0x3f000000 /* LSSI "Read" Address */ 1812160e944SSanjeev Sharma #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ 1828fc8598eSJerry Chuang #define bLSSIReadBackData 0xfff 1838fc8598eSJerry Chuang #define bLSSIReadOKFlag 0x1000 1842160e944SSanjeev Sharma #define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ 1858fc8598eSJerry Chuang #define bRegulator0Standby 0x1 1868fc8598eSJerry Chuang #define bRegulatorPLLStandby 0x2 1878fc8598eSJerry Chuang #define bRegulator1Standby 0x4 1888fc8598eSJerry Chuang #define bPLLPowerUp 0x8 1898fc8598eSJerry Chuang #define bDPLLPowerUp 0x10 1908fc8598eSJerry Chuang #define bDA10PowerUp 0x20 1918fc8598eSJerry Chuang #define bAD7PowerUp 0x200 1928fc8598eSJerry Chuang #define bDA6PowerUp 0x2000 1938fc8598eSJerry Chuang #define bXtalPowerUp 0x4000 1948fc8598eSJerry Chuang #define b40MDClkPowerUP 0x8000 1958fc8598eSJerry Chuang #define bDA6DebugMode 0x20000 1968fc8598eSJerry Chuang #define bDA6Swing 0x380000 1978fc8598eSJerry Chuang #define bADClkPhase 0x4000000 1988fc8598eSJerry Chuang #define b80MClkDelay 0x18000000 1998fc8598eSJerry Chuang #define bAFEWatchDogEnable 0x20000000 2008fc8598eSJerry Chuang #define bXtalCap 0x0f000000 2018fc8598eSJerry Chuang #define bIntDifClkEnable 0x400 2028fc8598eSJerry Chuang #define bExtSigClkEnable 0x800 2038fc8598eSJerry Chuang #define bBandgapMbiasPowerUp 0x10000 2048fc8598eSJerry Chuang #define bAD11SHGain 0xc0000 2058fc8598eSJerry Chuang #define bAD11InputRange 0x700000 2068fc8598eSJerry Chuang #define bAD11OPCurrent 0x3800000 2078fc8598eSJerry Chuang #define bIPathLoopback 0x4000000 2088fc8598eSJerry Chuang #define bQPathLoopback 0x8000000 2098fc8598eSJerry Chuang #define bAFELoopback 0x10000000 2108fc8598eSJerry Chuang #define bDA10Swing 0x7e0 2118fc8598eSJerry Chuang #define bDA10Reverse 0x800 2128fc8598eSJerry Chuang #define bDAClkSource 0x1000 2138fc8598eSJerry Chuang #define bAD7InputRange 0x6000 2148fc8598eSJerry Chuang #define bAD7Gain 0x38000 2158fc8598eSJerry Chuang #define bAD7OutputCMMode 0x40000 2168fc8598eSJerry Chuang #define bAD7InputCMMode 0x380000 2178fc8598eSJerry Chuang #define bAD7Current 0xc00000 2188fc8598eSJerry Chuang #define bRegulatorAdjust 0x7000000 2198fc8598eSJerry Chuang #define bAD11PowerUpAtTx 0x1 2208fc8598eSJerry Chuang #define bDA10PSAtTx 0x10 2218fc8598eSJerry Chuang #define bAD11PowerUpAtRx 0x100 2228fc8598eSJerry Chuang #define bDA10PSAtRx 0x1000 2238fc8598eSJerry Chuang 2248fc8598eSJerry Chuang #define bCCKRxAGCFormat 0x200 2258fc8598eSJerry Chuang 2268fc8598eSJerry Chuang #define bPSDFFTSamplepPoint 0xc000 2278fc8598eSJerry Chuang #define bPSDAverageNum 0x3000 2288fc8598eSJerry Chuang #define bIQPathControl 0xc00 2298fc8598eSJerry Chuang #define bPSDFreq 0x3ff 2308fc8598eSJerry Chuang #define bPSDAntennaPath 0x30 2318fc8598eSJerry Chuang #define bPSDIQSwitch 0x40 2328fc8598eSJerry Chuang #define bPSDRxTrigger 0x400000 2338fc8598eSJerry Chuang #define bPSDTxTrigger 0x80000000 2348fc8598eSJerry Chuang #define bPSDSineToneScale 0x7f000000 2358fc8598eSJerry Chuang #define bPSDReport 0xffff 2368fc8598eSJerry Chuang 2372160e944SSanjeev Sharma /* page-9 */ 2388fc8598eSJerry Chuang #define bOFDMTxSC 0x30000000 2398fc8598eSJerry Chuang #define bCCKTxOn 0x1 2408fc8598eSJerry Chuang #define bOFDMTxOn 0x2 2412160e944SSanjeev Sharma #define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ 2422160e944SSanjeev Sharma #define bDebugItem 0xff /* reset debug page and LWord */ 2438fc8598eSJerry Chuang #define bAntL 0x10 2448fc8598eSJerry Chuang #define bAntNonHT 0x100 2458fc8598eSJerry Chuang #define bAntHT1 0x1000 2468fc8598eSJerry Chuang #define bAntHT2 0x10000 2478fc8598eSJerry Chuang #define bAntHT1S1 0x100000 2488fc8598eSJerry Chuang #define bAntNonHTS1 0x1000000 2498fc8598eSJerry Chuang 2502160e944SSanjeev Sharma /* page-a */ 2518fc8598eSJerry Chuang #define bCCKBBMode 0x3 2528fc8598eSJerry Chuang #define bCCKTxPowerSaving 0x80 2538fc8598eSJerry Chuang #define bCCKRxPowerSaving 0x40 2548fc8598eSJerry Chuang #define bCCKSideBand 0x10 2558fc8598eSJerry Chuang #define bCCKScramble 0x8 2568fc8598eSJerry Chuang #define bCCKAntDiversity 0x8000 2578fc8598eSJerry Chuang #define bCCKCarrierRecovery 0x4000 2588fc8598eSJerry Chuang #define bCCKTxRate 0x3000 2598fc8598eSJerry Chuang #define bCCKDCCancel 0x0800 2608fc8598eSJerry Chuang #define bCCKISICancel 0x0400 2618fc8598eSJerry Chuang #define bCCKMatchFilter 0x0200 2628fc8598eSJerry Chuang #define bCCKEqualizer 0x0100 2638fc8598eSJerry Chuang #define bCCKPreambleDetect 0x800000 2648fc8598eSJerry Chuang #define bCCKFastFalseCCA 0x400000 2658fc8598eSJerry Chuang #define bCCKChEstStart 0x300000 2668fc8598eSJerry Chuang #define bCCKCCACount 0x080000 2678fc8598eSJerry Chuang #define bCCKcs_lim 0x070000 2688fc8598eSJerry Chuang #define bCCKBistMode 0x80000000 2698fc8598eSJerry Chuang #define bCCKCCAMask 0x40000000 2708fc8598eSJerry Chuang #define bCCKTxDACPhase 0x4 2712160e944SSanjeev Sharma #define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ 2728fc8598eSJerry Chuang #define bCCKr_cp_mode0 0x0100 2738fc8598eSJerry Chuang #define bCCKTxDCOffset 0xf0 2748fc8598eSJerry Chuang #define bCCKRxDCOffset 0xf 2758fc8598eSJerry Chuang #define bCCKCCAMode 0xc000 2768fc8598eSJerry Chuang #define bCCKFalseCS_lim 0x3f00 2778fc8598eSJerry Chuang #define bCCKCS_ratio 0xc00000 2788fc8598eSJerry Chuang #define bCCKCorgBit_sel 0x300000 2798fc8598eSJerry Chuang #define bCCKPD_lim 0x0f0000 2808fc8598eSJerry Chuang #define bCCKNewCCA 0x80000000 2818fc8598eSJerry Chuang #define bCCKRxHPofIG 0x8000 2828fc8598eSJerry Chuang #define bCCKRxIG 0x7f00 2838fc8598eSJerry Chuang #define bCCKLNAPolarity 0x800000 2848fc8598eSJerry Chuang #define bCCKRx1stGain 0x7f0000 2852160e944SSanjeev Sharma #define bCCKRFExtend 0x20000000 /* CCK Rx initial gain polarity */ 2868fc8598eSJerry Chuang #define bCCKRxAGCSatLevel 0x1f000000 2878fc8598eSJerry Chuang #define bCCKRxAGCSatCount 0xe0 2882160e944SSanjeev Sharma #define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ 2898fc8598eSJerry Chuang #define bCCKFixedRxAGC 0x8000 2902160e944SSanjeev Sharma /* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ 2918fc8598eSJerry Chuang #define bCCKAntennaPolarity 0x2000 2928fc8598eSJerry Chuang #define bCCKTxFilterType 0x0c00 2938fc8598eSJerry Chuang #define bCCKRxAGCReportType 0x0300 2948fc8598eSJerry Chuang #define bCCKRxDAGCEn 0x80000000 2958fc8598eSJerry Chuang #define bCCKRxDAGCPeriod 0x20000000 2968fc8598eSJerry Chuang #define bCCKRxDAGCSatLevel 0x1f000000 2978fc8598eSJerry Chuang #define bCCKTimingRecovery 0x800000 2988fc8598eSJerry Chuang #define bCCKTxC0 0x3f0000 2998fc8598eSJerry Chuang #define bCCKTxC1 0x3f000000 3008fc8598eSJerry Chuang #define bCCKTxC2 0x3f 3018fc8598eSJerry Chuang #define bCCKTxC3 0x3f00 3028fc8598eSJerry Chuang #define bCCKTxC4 0x3f0000 3038fc8598eSJerry Chuang #define bCCKTxC5 0x3f000000 3048fc8598eSJerry Chuang #define bCCKTxC6 0x3f 3058fc8598eSJerry Chuang #define bCCKTxC7 0x3f00 3068fc8598eSJerry Chuang #define bCCKDebugPort 0xff0000 3078fc8598eSJerry Chuang #define bCCKDACDebug 0x0f000000 3088fc8598eSJerry Chuang #define bCCKFalseAlarmEnable 0x8000 3098fc8598eSJerry Chuang #define bCCKFalseAlarmRead 0x4000 3108fc8598eSJerry Chuang #define bCCKTRSSI 0x7f 3118fc8598eSJerry Chuang #define bCCKRxAGCReport 0xfe 3128fc8598eSJerry Chuang #define bCCKRxReport_AntSel 0x80000000 3138fc8598eSJerry Chuang #define bCCKRxReport_MFOff 0x40000000 3148fc8598eSJerry Chuang #define bCCKRxRxReport_SQLoss 0x20000000 3158fc8598eSJerry Chuang #define bCCKRxReport_Pktloss 0x10000000 3168fc8598eSJerry Chuang #define bCCKRxReport_Lockedbit 0x08000000 3178fc8598eSJerry Chuang #define bCCKRxReport_RateError 0x04000000 3188fc8598eSJerry Chuang #define bCCKRxReport_RxRate 0x03000000 3198fc8598eSJerry Chuang #define bCCKRxFACounterLower 0xff 3208fc8598eSJerry Chuang #define bCCKRxFACounterUpper 0xff000000 3218fc8598eSJerry Chuang #define bCCKRxHPAGCStart 0xe000 3228fc8598eSJerry Chuang #define bCCKRxHPAGCFinal 0x1c00 3238fc8598eSJerry Chuang 3248fc8598eSJerry Chuang #define bCCKRxFalseAlarmEnable 0x8000 3258fc8598eSJerry Chuang #define bCCKFACounterFreeze 0x4000 3268fc8598eSJerry Chuang 3278fc8598eSJerry Chuang #define bCCKTxPathSel 0x10000000 3288fc8598eSJerry Chuang #define bCCKDefaultRxPath 0xc000000 3298fc8598eSJerry Chuang #define bCCKOptionRxPath 0x3000000 3308fc8598eSJerry Chuang 3312160e944SSanjeev Sharma /* page c */ 3328fc8598eSJerry Chuang #define bNumOfSTF 0x3 3338fc8598eSJerry Chuang #define bShift_L 0xc0 3348fc8598eSJerry Chuang #define bGI_TH 0xc 3358fc8598eSJerry Chuang #define bRxPathA 0x1 3368fc8598eSJerry Chuang #define bRxPathB 0x2 3378fc8598eSJerry Chuang #define bRxPathC 0x4 3388fc8598eSJerry Chuang #define bRxPathD 0x8 3398fc8598eSJerry Chuang #define bTxPathA 0x1 3408fc8598eSJerry Chuang #define bTxPathB 0x2 3418fc8598eSJerry Chuang #define bTxPathC 0x4 3428fc8598eSJerry Chuang #define bTxPathD 0x8 3438fc8598eSJerry Chuang #define bTRSSIFreq 0x200 3448fc8598eSJerry Chuang #define bADCBackoff 0x3000 3458fc8598eSJerry Chuang #define bDFIRBackoff 0xc000 3468fc8598eSJerry Chuang #define bTRSSILatchPhase 0x10000 3478fc8598eSJerry Chuang #define bRxIDCOffset 0xff 3488fc8598eSJerry Chuang #define bRxQDCOffset 0xff00 3498fc8598eSJerry Chuang #define bRxDFIRMode 0x1800000 3508fc8598eSJerry Chuang #define bRxDCNFType 0xe000000 3518fc8598eSJerry Chuang #define bRXIQImb_A 0x3ff 3528fc8598eSJerry Chuang #define bRXIQImb_B 0xfc00 3538fc8598eSJerry Chuang #define bRXIQImb_C 0x3f0000 3548fc8598eSJerry Chuang #define bRXIQImb_D 0xffc00000 3558fc8598eSJerry Chuang #define bDC_dc_Notch 0x60000 3568fc8598eSJerry Chuang #define bRxNBINotch 0x1f000000 3578fc8598eSJerry Chuang #define bPD_TH 0xf 3588fc8598eSJerry Chuang #define bPD_TH_Opt2 0xc000 3598fc8598eSJerry Chuang #define bPWED_TH 0x700 3608fc8598eSJerry Chuang #define bIfMF_Win_L 0x800 3618fc8598eSJerry Chuang #define bPD_Option 0x1000 3628fc8598eSJerry Chuang #define bMF_Win_L 0xe000 3638fc8598eSJerry Chuang #define bBW_Search_L 0x30000 3648fc8598eSJerry Chuang #define bwin_enh_L 0xc0000 3658fc8598eSJerry Chuang #define bBW_TH 0x700000 3668fc8598eSJerry Chuang #define bED_TH2 0x3800000 3678fc8598eSJerry Chuang #define bBW_option 0x4000000 3688fc8598eSJerry Chuang #define bRatio_TH 0x18000000 3698fc8598eSJerry Chuang #define bWindow_L 0xe0000000 3708fc8598eSJerry Chuang #define bSBD_Option 0x1 3718fc8598eSJerry Chuang #define bFrame_TH 0x1c 3728fc8598eSJerry Chuang #define bFS_Option 0x60 3738fc8598eSJerry Chuang #define bDC_Slope_check 0x80 3748fc8598eSJerry Chuang #define bFGuard_Counter_DC_L 0xe00 3758fc8598eSJerry Chuang #define bFrame_Weight_Short 0x7000 3768fc8598eSJerry Chuang #define bSub_Tune 0xe00000 3778fc8598eSJerry Chuang #define bFrame_DC_Length 0xe000000 3788fc8598eSJerry Chuang #define bSBD_start_offset 0x30000000 3798fc8598eSJerry Chuang #define bFrame_TH_2 0x7 3808fc8598eSJerry Chuang #define bFrame_GI2_TH 0x38 3818fc8598eSJerry Chuang #define bGI2_Sync_en 0x40 3828fc8598eSJerry Chuang #define bSarch_Short_Early 0x300 3838fc8598eSJerry Chuang #define bSarch_Short_Late 0xc00 3848fc8598eSJerry Chuang #define bSarch_GI2_Late 0x70000 3858fc8598eSJerry Chuang #define bCFOAntSum 0x1 3868fc8598eSJerry Chuang #define bCFOAcc 0x2 3878fc8598eSJerry Chuang #define bCFOStartOffset 0xc 3888fc8598eSJerry Chuang #define bCFOLookBack 0x70 3898fc8598eSJerry Chuang #define bCFOSumWeight 0x80 3908fc8598eSJerry Chuang #define bDAGCEnable 0x10000 3918fc8598eSJerry Chuang #define bTXIQImb_A 0x3ff 3928fc8598eSJerry Chuang #define bTXIQImb_B 0xfc00 3938fc8598eSJerry Chuang #define bTXIQImb_C 0x3f0000 3948fc8598eSJerry Chuang #define bTXIQImb_D 0xffc00000 3958fc8598eSJerry Chuang #define bTxIDCOffset 0xff 3968fc8598eSJerry Chuang #define bTxQDCOffset 0xff00 3978fc8598eSJerry Chuang #define bTxDFIRMode 0x10000 3988fc8598eSJerry Chuang #define bTxPesudoNoiseOn 0x4000000 3998fc8598eSJerry Chuang #define bTxPesudoNoise_A 0xff 4008fc8598eSJerry Chuang #define bTxPesudoNoise_B 0xff00 4018fc8598eSJerry Chuang #define bTxPesudoNoise_C 0xff0000 4028fc8598eSJerry Chuang #define bTxPesudoNoise_D 0xff000000 4038fc8598eSJerry Chuang #define bCCADropOption 0x20000 4048fc8598eSJerry Chuang #define bCCADropThres 0xfff00000 4058fc8598eSJerry Chuang #define bEDCCA_H 0xf 4068fc8598eSJerry Chuang #define bEDCCA_L 0xf0 4078fc8598eSJerry Chuang #define bLambda_ED 0x300 4088fc8598eSJerry Chuang #define bRxInitialGain 0x7f 4098fc8598eSJerry Chuang #define bRxAntDivEn 0x80 4108fc8598eSJerry Chuang #define bRxAGCAddressForLNA 0x7f00 4118fc8598eSJerry Chuang #define bRxHighPowerFlow 0x8000 4128fc8598eSJerry Chuang #define bRxAGCFreezeThres 0xc0000 4138fc8598eSJerry Chuang #define bRxFreezeStep_AGC1 0x300000 4148fc8598eSJerry Chuang #define bRxFreezeStep_AGC2 0xc00000 4158fc8598eSJerry Chuang #define bRxFreezeStep_AGC3 0x3000000 4168fc8598eSJerry Chuang #define bRxFreezeStep_AGC0 0xc000000 4178fc8598eSJerry Chuang #define bRxRssi_Cmp_En 0x10000000 4188fc8598eSJerry Chuang #define bRxQuickAGCEn 0x20000000 4198fc8598eSJerry Chuang #define bRxAGCFreezeThresMode 0x40000000 4208fc8598eSJerry Chuang #define bRxOverFlowCheckType 0x80000000 4218fc8598eSJerry Chuang #define bRxAGCShift 0x7f 4228fc8598eSJerry Chuang #define bTRSW_Tri_Only 0x80 4238fc8598eSJerry Chuang #define bPowerThres 0x300 4248fc8598eSJerry Chuang #define bRxAGCEn 0x1 4258fc8598eSJerry Chuang #define bRxAGCTogetherEn 0x2 4268fc8598eSJerry Chuang #define bRxAGCMin 0x4 4278fc8598eSJerry Chuang #define bRxHP_Ini 0x7 4288fc8598eSJerry Chuang #define bRxHP_TRLNA 0x70 4298fc8598eSJerry Chuang #define bRxHP_RSSI 0x700 4308fc8598eSJerry Chuang #define bRxHP_BBP1 0x7000 4318fc8598eSJerry Chuang #define bRxHP_BBP2 0x70000 4328fc8598eSJerry Chuang #define bRxHP_BBP3 0x700000 4332160e944SSanjeev Sharma #define bRSSI_H 0x7f0000 /* the threshold for high power */ 4342160e944SSanjeev Sharma #define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ 4358fc8598eSJerry Chuang #define bRxSettle_TRSW 0x7 4368fc8598eSJerry Chuang #define bRxSettle_LNA 0x38 4378fc8598eSJerry Chuang #define bRxSettle_RSSI 0x1c0 4388fc8598eSJerry Chuang #define bRxSettle_BBP 0xe00 4398fc8598eSJerry Chuang #define bRxSettle_RxHP 0x7000 4408fc8598eSJerry Chuang #define bRxSettle_AntSW_RSSI 0x38000 4418fc8598eSJerry Chuang #define bRxSettle_AntSW 0xc0000 4428fc8598eSJerry Chuang #define bRxProcessTime_DAGC 0x300000 4438fc8598eSJerry Chuang #define bRxSettle_HSSI 0x400000 4448fc8598eSJerry Chuang #define bRxProcessTime_BBPPW 0x800000 4458fc8598eSJerry Chuang #define bRxAntennaPowerShift 0x3000000 4468fc8598eSJerry Chuang #define bRSSITableSelect 0xc000000 4478fc8598eSJerry Chuang #define bRxHP_Final 0x7000000 4488fc8598eSJerry Chuang #define bRxHTSettle_BBP 0x7 4498fc8598eSJerry Chuang #define bRxHTSettle_HSSI 0x8 4508fc8598eSJerry Chuang #define bRxHTSettle_RxHP 0x70 4518fc8598eSJerry Chuang #define bRxHTSettle_BBPPW 0x80 4528fc8598eSJerry Chuang #define bRxHTSettle_Idle 0x300 4538fc8598eSJerry Chuang #define bRxHTSettle_Reserved 0x1c00 4548fc8598eSJerry Chuang #define bRxHTRxHPEn 0x8000 4558fc8598eSJerry Chuang #define bRxHTAGCFreezeThres 0x30000 4568fc8598eSJerry Chuang #define bRxHTAGCTogetherEn 0x40000 4578fc8598eSJerry Chuang #define bRxHTAGCMin 0x80000 4588fc8598eSJerry Chuang #define bRxHTAGCEn 0x100000 4598fc8598eSJerry Chuang #define bRxHTDAGCEn 0x200000 4608fc8598eSJerry Chuang #define bRxHTRxHP_BBP 0x1c00000 4618fc8598eSJerry Chuang #define bRxHTRxHP_Final 0xe0000000 4628fc8598eSJerry Chuang #define bRxPWRatioTH 0x3 4638fc8598eSJerry Chuang #define bRxPWRatioEn 0x4 4648fc8598eSJerry Chuang #define bRxMFHold 0x3800 4658fc8598eSJerry Chuang #define bRxPD_Delay_TH1 0x38 4668fc8598eSJerry Chuang #define bRxPD_Delay_TH2 0x1c0 4678fc8598eSJerry Chuang #define bRxPD_DC_COUNT_MAX 0x600 4682160e944SSanjeev Sharma /* #define bRxMF_Hold 0x3800 */ 4698fc8598eSJerry Chuang #define bRxPD_Delay_TH 0x8000 4708fc8598eSJerry Chuang #define bRxProcess_Delay 0xf0000 4718fc8598eSJerry Chuang #define bRxSearchrange_GI2_Early 0x700000 4728fc8598eSJerry Chuang #define bRxFrame_Guard_Counter_L 0x3800000 4738fc8598eSJerry Chuang #define bRxSGI_Guard_L 0xc000000 4748fc8598eSJerry Chuang #define bRxSGI_Search_L 0x30000000 4758fc8598eSJerry Chuang #define bRxSGI_TH 0xc0000000 4768fc8598eSJerry Chuang #define bDFSCnt0 0xff 4778fc8598eSJerry Chuang #define bDFSCnt1 0xff00 4788fc8598eSJerry Chuang #define bDFSFlag 0xf0000 4798fc8598eSJerry Chuang 4808fc8598eSJerry Chuang #define bMFWeightSum 0x300000 4818fc8598eSJerry Chuang #define bMinIdxTH 0x7f000000 4828fc8598eSJerry Chuang 4838fc8598eSJerry Chuang #define bDAFormat 0x40000 4848fc8598eSJerry Chuang 4858fc8598eSJerry Chuang #define bTxChEmuEnable 0x01000000 4868fc8598eSJerry Chuang 4878fc8598eSJerry Chuang #define bTRSWIsolation_A 0x7f 4888fc8598eSJerry Chuang #define bTRSWIsolation_B 0x7f00 4898fc8598eSJerry Chuang #define bTRSWIsolation_C 0x7f0000 4908fc8598eSJerry Chuang #define bTRSWIsolation_D 0x7f000000 4918fc8598eSJerry Chuang 4928fc8598eSJerry Chuang #define bExtLNAGain 0x7c00 4938fc8598eSJerry Chuang 4942160e944SSanjeev Sharma /* page d */ 4958fc8598eSJerry Chuang #define bSTBCEn 0x4 4968fc8598eSJerry Chuang #define bAntennaMapping 0x10 4978fc8598eSJerry Chuang #define bNss 0x20 4988fc8598eSJerry Chuang #define bCFOAntSumD 0x200 4998fc8598eSJerry Chuang #define bPHYCounterReset 0x8000000 5008fc8598eSJerry Chuang #define bCFOReportGet 0x4000000 5018fc8598eSJerry Chuang #define bOFDMContinueTx 0x10000000 5028fc8598eSJerry Chuang #define bOFDMSingleCarrier 0x20000000 5038fc8598eSJerry Chuang #define bOFDMSingleTone 0x40000000 5042160e944SSanjeev Sharma /* #define bRxPath1 0x01 5052160e944SSanjeev Sharma * #define bRxPath2 0x02 5062160e944SSanjeev Sharma * #define bRxPath3 0x04 5072160e944SSanjeev Sharma * #define bRxPath4 0x08 5082160e944SSanjeev Sharma * #define bTxPath1 0x10 5092160e944SSanjeev Sharma * #define bTxPath2 0x20 5102160e944SSanjeev Sharma */ 5118fc8598eSJerry Chuang #define bHTDetect 0x100 5128fc8598eSJerry Chuang #define bCFOEn 0x10000 5138fc8598eSJerry Chuang #define bCFOValue 0xfff00000 5148fc8598eSJerry Chuang #define bSigTone_Re 0x3f 5158fc8598eSJerry Chuang #define bSigTone_Im 0x7f00 5168fc8598eSJerry Chuang #define bCounter_CCA 0xffff 5178fc8598eSJerry Chuang #define bCounter_ParityFail 0xffff0000 5188fc8598eSJerry Chuang #define bCounter_RateIllegal 0xffff 5198fc8598eSJerry Chuang #define bCounter_CRC8Fail 0xffff0000 5208fc8598eSJerry Chuang #define bCounter_MCSNoSupport 0xffff 5218fc8598eSJerry Chuang #define bCounter_FastSync 0xffff 5228fc8598eSJerry Chuang #define bShortCFO 0xfff 5232160e944SSanjeev Sharma #define bShortCFOTLength 12 /* total */ 5242160e944SSanjeev Sharma #define bShortCFOFLength 11 /* fraction */ 5258fc8598eSJerry Chuang #define bLongCFO 0x7ff 5268fc8598eSJerry Chuang #define bLongCFOTLength 11 5278fc8598eSJerry Chuang #define bLongCFOFLength 11 5288fc8598eSJerry Chuang #define bTailCFO 0x1fff 5298fc8598eSJerry Chuang #define bTailCFOTLength 13 5308fc8598eSJerry Chuang #define bTailCFOFLength 12 5318fc8598eSJerry Chuang 5328fc8598eSJerry Chuang #define bmax_en_pwdB 0xffff 5338fc8598eSJerry Chuang #define bCC_power_dB 0xffff0000 5348fc8598eSJerry Chuang #define bnoise_pwdB 0xffff 5358fc8598eSJerry Chuang #define bPowerMeasTLength 10 5368fc8598eSJerry Chuang #define bPowerMeasFLength 3 5378fc8598eSJerry Chuang #define bRx_HT_BW 0x1 5388fc8598eSJerry Chuang #define bRxSC 0x6 5398fc8598eSJerry Chuang #define bRx_HT 0x8 5408fc8598eSJerry Chuang 5418fc8598eSJerry Chuang #define bNB_intf_det_on 0x1 5428fc8598eSJerry Chuang #define bIntf_win_len_cfg 0x30 5438fc8598eSJerry Chuang #define bNB_Intf_TH_cfg 0x1c0 5448fc8598eSJerry Chuang 5458fc8598eSJerry Chuang #define bRFGain 0x3f 5468fc8598eSJerry Chuang #define bTableSel 0x40 5478fc8598eSJerry Chuang #define bTRSW 0x80 5488fc8598eSJerry Chuang 5498fc8598eSJerry Chuang #define bRxSNR_A 0xff 5508fc8598eSJerry Chuang #define bRxSNR_B 0xff00 5518fc8598eSJerry Chuang #define bRxSNR_C 0xff0000 5528fc8598eSJerry Chuang #define bRxSNR_D 0xff000000 5538fc8598eSJerry Chuang #define bSNREVMTLength 8 5548fc8598eSJerry Chuang #define bSNREVMFLength 1 5558fc8598eSJerry Chuang 5568fc8598eSJerry Chuang #define bCSI1st 0xff 5578fc8598eSJerry Chuang #define bCSI2nd 0xff00 5588fc8598eSJerry Chuang #define bRxEVM1st 0xff0000 5598fc8598eSJerry Chuang #define bRxEVM2nd 0xff000000 5608fc8598eSJerry Chuang 5618fc8598eSJerry Chuang #define bSIGEVM 0xff 5628fc8598eSJerry Chuang #define bPWDB 0xff00 5638fc8598eSJerry Chuang #define bSGIEN 0x10000 5648fc8598eSJerry Chuang 5658fc8598eSJerry Chuang #define bSFactorQAM1 0xf 5668fc8598eSJerry Chuang #define bSFactorQAM2 0xf0 5678fc8598eSJerry Chuang #define bSFactorQAM3 0xf00 5688fc8598eSJerry Chuang #define bSFactorQAM4 0xf000 5698fc8598eSJerry Chuang #define bSFactorQAM5 0xf0000 5708fc8598eSJerry Chuang #define bSFactorQAM6 0xf0000 5718fc8598eSJerry Chuang #define bSFactorQAM7 0xf00000 5728fc8598eSJerry Chuang #define bSFactorQAM8 0xf000000 5738fc8598eSJerry Chuang #define bSFactorQAM9 0xf0000000 5748fc8598eSJerry Chuang #define bCSIScheme 0x100000 5758fc8598eSJerry Chuang 5768fc8598eSJerry Chuang #define bNoiseLvlTopSet 0x3 5778fc8598eSJerry Chuang #define bChSmooth 0x4 5788fc8598eSJerry Chuang #define bChSmoothCfg1 0x38 5798fc8598eSJerry Chuang #define bChSmoothCfg2 0x1c0 5808fc8598eSJerry Chuang #define bChSmoothCfg3 0xe00 5818fc8598eSJerry Chuang #define bChSmoothCfg4 0x7000 5828fc8598eSJerry Chuang #define bMRCMode 0x800000 5838fc8598eSJerry Chuang #define bTHEVMCfg 0x7000000 5848fc8598eSJerry Chuang 5858fc8598eSJerry Chuang #define bLoopFitType 0x1 5868fc8598eSJerry Chuang #define bUpdCFO 0x40 5878fc8598eSJerry Chuang #define bUpdCFOOffData 0x80 5888fc8598eSJerry Chuang #define bAdvUpdCFO 0x100 5898fc8598eSJerry Chuang #define bAdvTimeCtrl 0x800 5908fc8598eSJerry Chuang #define bUpdClko 0x1000 5918fc8598eSJerry Chuang #define bFC 0x6000 5928fc8598eSJerry Chuang #define bTrackingMode 0x8000 5938fc8598eSJerry Chuang #define bPhCmpEnable 0x10000 5948fc8598eSJerry Chuang #define bUpdClkoLTF 0x20000 5958fc8598eSJerry Chuang #define bComChCFO 0x40000 5968fc8598eSJerry Chuang #define bCSIEstiMode 0x80000 5978fc8598eSJerry Chuang #define bAdvUpdEqz 0x100000 5988fc8598eSJerry Chuang #define bUChCfg 0x7000000 5998fc8598eSJerry Chuang #define bUpdEqz 0x8000000 6008fc8598eSJerry Chuang 6012160e944SSanjeev Sharma /* page e */ 6028fc8598eSJerry Chuang #define bTxAGCRate18_06 0x7f7f7f7f 6038fc8598eSJerry Chuang #define bTxAGCRate54_24 0x7f7f7f7f 6048fc8598eSJerry Chuang #define bTxAGCRateMCS32 0x7f 6058fc8598eSJerry Chuang #define bTxAGCRateCCK 0x7f00 6068fc8598eSJerry Chuang #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f 6078fc8598eSJerry Chuang #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f 6088fc8598eSJerry Chuang #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f 6098fc8598eSJerry Chuang #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f 6108fc8598eSJerry Chuang 6118fc8598eSJerry Chuang 6122160e944SSanjeev Sharma /* Rx Pseduo noise */ 6138fc8598eSJerry Chuang #define bRxPesudoNoiseOn 0x20000000 6148fc8598eSJerry Chuang #define bRxPesudoNoise_A 0xff 6158fc8598eSJerry Chuang #define bRxPesudoNoise_B 0xff00 6168fc8598eSJerry Chuang #define bRxPesudoNoise_C 0xff0000 6178fc8598eSJerry Chuang #define bRxPesudoNoise_D 0xff000000 6188fc8598eSJerry Chuang #define bPesudoNoiseState_A 0xffff 6198fc8598eSJerry Chuang #define bPesudoNoiseState_B 0xffff0000 6208fc8598eSJerry Chuang #define bPesudoNoiseState_C 0xffff 6218fc8598eSJerry Chuang #define bPesudoNoiseState_D 0xffff0000 6228fc8598eSJerry Chuang 6232160e944SSanjeev Sharma /* RF 6242160e944SSanjeev Sharma * Zebra1 6252160e944SSanjeev Sharma */ 6268fc8598eSJerry Chuang #define bZebra1_HSSIEnable 0x8 6278fc8598eSJerry Chuang #define bZebra1_TRxControl 0xc00 6288fc8598eSJerry Chuang #define bZebra1_TRxGainSetting 0x07f 6298fc8598eSJerry Chuang #define bZebra1_RxCorner 0xc00 6308fc8598eSJerry Chuang #define bZebra1_TxChargePump 0x38 6318fc8598eSJerry Chuang #define bZebra1_RxChargePump 0x7 6328fc8598eSJerry Chuang #define bZebra1_ChannelNum 0xf80 6338fc8598eSJerry Chuang #define bZebra1_TxLPFBW 0x400 6348fc8598eSJerry Chuang #define bZebra1_RxLPFBW 0x600 6358fc8598eSJerry Chuang 6362160e944SSanjeev Sharma /* Zebra4 */ 6378fc8598eSJerry Chuang #define bRTL8256RegModeCtrl1 0x100 6388fc8598eSJerry Chuang #define bRTL8256RegModeCtrl0 0x40 6398fc8598eSJerry Chuang #define bRTL8256_TxLPFBW 0x18 6408fc8598eSJerry Chuang #define bRTL8256_RxLPFBW 0x600 6418fc8598eSJerry Chuang 6422160e944SSanjeev Sharma /* RTL8258 */ 6438fc8598eSJerry Chuang #define bRTL8258_TxLPFBW 0xc 6448fc8598eSJerry Chuang #define bRTL8258_RxLPFBW 0xc00 6458fc8598eSJerry Chuang #define bRTL8258_RSSILPFBW 0xc0 6468fc8598eSJerry Chuang 6472160e944SSanjeev Sharma /* byte endable for sb_write */ 6488fc8598eSJerry Chuang #define bByte0 0x1 6498fc8598eSJerry Chuang #define bByte1 0x2 6508fc8598eSJerry Chuang #define bByte2 0x4 6518fc8598eSJerry Chuang #define bByte3 0x8 6528fc8598eSJerry Chuang #define bWord0 0x3 6538fc8598eSJerry Chuang #define bWord1 0xc 6548fc8598eSJerry Chuang #define bDWord 0xf 6558fc8598eSJerry Chuang 6562160e944SSanjeev Sharma /* for PutRegsetting & GetRegSetting BitMask */ 6578fc8598eSJerry Chuang #define bMaskByte0 0xff 6588fc8598eSJerry Chuang #define bMaskByte1 0xff00 6598fc8598eSJerry Chuang #define bMaskByte2 0xff0000 6608fc8598eSJerry Chuang #define bMaskByte3 0xff000000 6618fc8598eSJerry Chuang #define bMaskHWord 0xffff0000 6628fc8598eSJerry Chuang #define bMaskLWord 0x0000ffff 6638fc8598eSJerry Chuang #define bMaskDWord 0xffffffff 6648fc8598eSJerry Chuang 6652160e944SSanjeev Sharma /* for PutRFRegsetting & GetRFRegSetting BitMask */ 6668fc8598eSJerry Chuang #define bMask12Bits 0xfff 6678fc8598eSJerry Chuang 6688fc8598eSJerry Chuang #define bEnable 0x1 6698fc8598eSJerry Chuang #define bDisable 0x0 6708fc8598eSJerry Chuang 6718fc8598eSJerry Chuang #define LeftAntenna 0x0 6728fc8598eSJerry Chuang #define RightAntenna 0x1 6738fc8598eSJerry Chuang 6742160e944SSanjeev Sharma #define tCheckTxStatus 500 /* 500ms */ 6752160e944SSanjeev Sharma #define tUpdateRxCounter 100 /* 100ms */ 6768fc8598eSJerry Chuang 6778fc8598eSJerry Chuang #define rateCCK 0 6788fc8598eSJerry Chuang #define rateOFDM 1 6798fc8598eSJerry Chuang #define rateHT 2 6808fc8598eSJerry Chuang 6812160e944SSanjeev Sharma /* define Register-End */ 6828fc8598eSJerry Chuang #define bPMAC_End 0x1ff 6838fc8598eSJerry Chuang #define bFPGAPHY0_End 0x8ff 6848fc8598eSJerry Chuang #define bFPGAPHY1_End 0x9ff 6858fc8598eSJerry Chuang #define bCCKPHY0_End 0xaff 6868fc8598eSJerry Chuang #define bOFDMPHY0_End 0xcff 6878fc8598eSJerry Chuang #define bOFDMPHY1_End 0xdff 6888fc8598eSJerry Chuang 6892160e944SSanjeev Sharma /* define max debug item in each debug page 6902160e944SSanjeev Sharma * #define bMaxItem_FPGA_PHY0 0x9 6912160e944SSanjeev Sharma * #define bMaxItem_FPGA_PHY1 0x3 6922160e944SSanjeev Sharma * #define bMaxItem_PHY_11B 0x16 6932160e944SSanjeev Sharma * #define bMaxItem_OFDM_PHY0 0x29 6942160e944SSanjeev Sharma * #define bMaxItem_OFDM_PHY1 0x0 6952160e944SSanjeev Sharma */ 6968fc8598eSJerry Chuang 6978fc8598eSJerry Chuang #define bPMACControl 0x0 6988fc8598eSJerry Chuang #define bWMACControl 0x1 6998fc8598eSJerry Chuang #define bWNICControl 0x2 7008fc8598eSJerry Chuang 7018fc8598eSJerry Chuang #define PathA 0x0 7028fc8598eSJerry Chuang #define PathB 0x1 7038fc8598eSJerry Chuang #define PathC 0x2 7048fc8598eSJerry Chuang #define PathD 0x3 7058fc8598eSJerry Chuang 7068fc8598eSJerry Chuang #define rRTL8256RxMixerPole 0xb 7078fc8598eSJerry Chuang #define bZebraRxMixerPole 0x6 7088fc8598eSJerry Chuang #define rRTL8256TxBBOPBias 0x9 7098fc8598eSJerry Chuang #define bRTL8256TxBBOPBias 0x400 7108fc8598eSJerry Chuang #define rRTL8256TxBBBW 19 7118fc8598eSJerry Chuang #define bRTL8256TxBBBW 0x18 7128fc8598eSJerry Chuang 7132160e944SSanjeev Sharma #endif /* __INC_HAL8190PCIPHYREG_H */ 714