18fc8598eSJerry Chuang #ifndef _R819XU_PHYREG_H 28fc8598eSJerry Chuang #define _R819XU_PHYREG_H 38fc8598eSJerry Chuang 48fc8598eSJerry Chuang 52160e944SSanjeev Sharma #define RF_DATA 0x1d4 /* FW will write RF data in the register.*/ 68fc8598eSJerry Chuang 72160e944SSanjeev Sharma /* Register duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF 82160e944SSanjeev Sharma * page 1 92160e944SSanjeev Sharma */ 108fc8598eSJerry Chuang #define rPMAC_Reset 0x100 118fc8598eSJerry Chuang #define rPMAC_TxStart 0x104 128fc8598eSJerry Chuang #define rPMAC_TxLegacySIG 0x108 138fc8598eSJerry Chuang #define rPMAC_TxHTSIG1 0x10c 148fc8598eSJerry Chuang #define rPMAC_TxHTSIG2 0x110 158fc8598eSJerry Chuang #define rPMAC_PHYDebug 0x114 168fc8598eSJerry Chuang #define rPMAC_TxPacketNum 0x118 178fc8598eSJerry Chuang #define rPMAC_TxIdle 0x11c 188fc8598eSJerry Chuang #define rPMAC_TxMACHeader0 0x120 198fc8598eSJerry Chuang #define rPMAC_TxMACHeader1 0x124 208fc8598eSJerry Chuang #define rPMAC_TxMACHeader2 0x128 218fc8598eSJerry Chuang #define rPMAC_TxMACHeader3 0x12c 228fc8598eSJerry Chuang #define rPMAC_TxMACHeader4 0x130 238fc8598eSJerry Chuang #define rPMAC_TxMACHeader5 0x134 248fc8598eSJerry Chuang #define rPMAC_TxDataType 0x138 258fc8598eSJerry Chuang #define rPMAC_TxRandomSeed 0x13c 268fc8598eSJerry Chuang #define rPMAC_CCKPLCPPreamble 0x140 278fc8598eSJerry Chuang #define rPMAC_CCKPLCPHeader 0x144 288fc8598eSJerry Chuang #define rPMAC_CCKCRC16 0x148 298fc8598eSJerry Chuang #define rPMAC_OFDMRxCRC32OK 0x170 308fc8598eSJerry Chuang #define rPMAC_OFDMRxCRC32Er 0x174 318fc8598eSJerry Chuang #define rPMAC_OFDMRxParityEr 0x178 328fc8598eSJerry Chuang #define rPMAC_OFDMRxCRC8Er 0x17c 338fc8598eSJerry Chuang #define rPMAC_CCKCRxRC16Er 0x180 348fc8598eSJerry Chuang #define rPMAC_CCKCRxRC32Er 0x184 358fc8598eSJerry Chuang #define rPMAC_CCKCRxRC32OK 0x188 368fc8598eSJerry Chuang #define rPMAC_TxStatus 0x18c 378fc8598eSJerry Chuang 382160e944SSanjeev Sharma /* page8 */ 392160e944SSanjeev Sharma #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ 408fc8598eSJerry Chuang #define rFPGA0_TxInfo 0x804 418fc8598eSJerry Chuang #define rFPGA0_PSDFunction 0x808 428fc8598eSJerry Chuang #define rFPGA0_TxGainStage 0x80c 438fc8598eSJerry Chuang #define rFPGA0_RFTiming1 0x810 448fc8598eSJerry Chuang #define rFPGA0_RFTiming2 0x814 452160e944SSanjeev Sharma /* #define rFPGA0_XC_RFTiming 0x818 462160e944SSanjeev Sharma * #define rFPGA0_XD_RFTiming 0x81c 472160e944SSanjeev Sharma */ 488fc8598eSJerry Chuang #define rFPGA0_XA_HSSIParameter1 0x820 498fc8598eSJerry Chuang #define rFPGA0_XA_HSSIParameter2 0x824 508fc8598eSJerry Chuang #define rFPGA0_XB_HSSIParameter1 0x828 518fc8598eSJerry Chuang #define rFPGA0_XB_HSSIParameter2 0x82c 528fc8598eSJerry Chuang #define rFPGA0_XC_HSSIParameter1 0x830 538fc8598eSJerry Chuang #define rFPGA0_XC_HSSIParameter2 0x834 548fc8598eSJerry Chuang #define rFPGA0_XD_HSSIParameter1 0x838 558fc8598eSJerry Chuang #define rFPGA0_XD_HSSIParameter2 0x83c 568fc8598eSJerry Chuang #define rFPGA0_XA_LSSIParameter 0x840 578fc8598eSJerry Chuang #define rFPGA0_XB_LSSIParameter 0x844 588fc8598eSJerry Chuang #define rFPGA0_XC_LSSIParameter 0x848 598fc8598eSJerry Chuang #define rFPGA0_XD_LSSIParameter 0x84c 608fc8598eSJerry Chuang #define rFPGA0_RFWakeUpParameter 0x850 618fc8598eSJerry Chuang #define rFPGA0_RFSleepUpParameter 0x854 628fc8598eSJerry Chuang #define rFPGA0_XAB_SwitchControl 0x858 638fc8598eSJerry Chuang #define rFPGA0_XCD_SwitchControl 0x85c 648fc8598eSJerry Chuang #define rFPGA0_XA_RFInterfaceOE 0x860 658fc8598eSJerry Chuang #define rFPGA0_XB_RFInterfaceOE 0x864 668fc8598eSJerry Chuang #define rFPGA0_XC_RFInterfaceOE 0x868 678fc8598eSJerry Chuang #define rFPGA0_XD_RFInterfaceOE 0x86c 688fc8598eSJerry Chuang #define rFPGA0_XAB_RFInterfaceSW 0x870 698fc8598eSJerry Chuang #define rFPGA0_XCD_RFInterfaceSW 0x874 708fc8598eSJerry Chuang #define rFPGA0_XAB_RFParameter 0x878 718fc8598eSJerry Chuang #define rFPGA0_XCD_RFParameter 0x87c 728fc8598eSJerry Chuang #define rFPGA0_AnalogParameter1 0x880 738fc8598eSJerry Chuang #define rFPGA0_AnalogParameter2 0x884 748fc8598eSJerry Chuang #define rFPGA0_AnalogParameter3 0x888 758fc8598eSJerry Chuang #define rFPGA0_AnalogParameter4 0x88c 768fc8598eSJerry Chuang #define rFPGA0_XA_LSSIReadBack 0x8a0 778fc8598eSJerry Chuang #define rFPGA0_XB_LSSIReadBack 0x8a4 788fc8598eSJerry Chuang #define rFPGA0_XC_LSSIReadBack 0x8a8 798fc8598eSJerry Chuang #define rFPGA0_XD_LSSIReadBack 0x8ac 808fc8598eSJerry Chuang #define rFPGA0_PSDReport 0x8b4 818fc8598eSJerry Chuang #define rFPGA0_XAB_RFInterfaceRB 0x8e0 828fc8598eSJerry Chuang #define rFPGA0_XCD_RFInterfaceRB 0x8e4 838fc8598eSJerry Chuang 842160e944SSanjeev Sharma /* page 9 */ 852160e944SSanjeev Sharma #define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ 868fc8598eSJerry Chuang #define rFPGA1_TxBlock 0x904 878fc8598eSJerry Chuang #define rFPGA1_DebugSelect 0x908 888fc8598eSJerry Chuang #define rFPGA1_TxInfo 0x90c 898fc8598eSJerry Chuang 902160e944SSanjeev Sharma /* page a */ 918fc8598eSJerry Chuang #define rCCK0_System 0xa00 928fc8598eSJerry Chuang #define rCCK0_AFESetting 0xa04 938fc8598eSJerry Chuang #define rCCK0_CCA 0xa08 942160e944SSanjeev Sharma #define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ 952160e944SSanjeev Sharma #define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ 968fc8598eSJerry Chuang #define rCCK0_RxHP 0xa14 972160e944SSanjeev Sharma #define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ 982160e944SSanjeev Sharma #define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ 998fc8598eSJerry Chuang #define rCCK0_TxFilter1 0xa20 1008fc8598eSJerry Chuang #define rCCK0_TxFilter2 0xa24 1012160e944SSanjeev Sharma #define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ 1022160e944SSanjeev Sharma #define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d */ 1038fc8598eSJerry Chuang #define rCCK0_TRSSIReport 0xa50 1042160e944SSanjeev Sharma #define rCCK0_RxReport 0xa54 /* 0xa57 */ 1052160e944SSanjeev Sharma #define rCCK0_FACounterLower 0xa5c /* 0xa5b */ 1062160e944SSanjeev Sharma #define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ 1078fc8598eSJerry Chuang 1082160e944SSanjeev Sharma /* page c */ 1098fc8598eSJerry Chuang #define rOFDM0_LSTF 0xc00 1108fc8598eSJerry Chuang #define rOFDM0_TRxPathEnable 0xc04 1118fc8598eSJerry Chuang #define rOFDM0_TRMuxPar 0xc08 1128fc8598eSJerry Chuang #define rOFDM0_TRSWIsolation 0xc0c 1132160e944SSanjeev Sharma #define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ 1142160e944SSanjeev Sharma #define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ 1158fc8598eSJerry Chuang #define rOFDM0_XBRxAFE 0xc18 1168fc8598eSJerry Chuang #define rOFDM0_XBRxIQImbalance 0xc1c 1178fc8598eSJerry Chuang #define rOFDM0_XCRxAFE 0xc20 1188fc8598eSJerry Chuang #define rOFDM0_XCRxIQImbalance 0xc24 1198fc8598eSJerry Chuang #define rOFDM0_XDRxAFE 0xc28 1208fc8598eSJerry Chuang #define rOFDM0_XDRxIQImbalance 0xc2c 1212160e944SSanjeev Sharma #define rOFDM0_RxDetector1 0xc30 /* PD,BW & SBD */ 1222160e944SSanjeev Sharma #define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync.*/ 1232160e944SSanjeev Sharma #define rOFDM0_RxDetector3 0xc38 /* Frame Sync.*/ 1242160e944SSanjeev Sharma #define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ 1252160e944SSanjeev Sharma #define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ 1262160e944SSanjeev Sharma #define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ 1272160e944SSanjeev Sharma #define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ 1282160e944SSanjeev Sharma #define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ 1298fc8598eSJerry Chuang #define rOFDM0_XAAGCCore1 0xc50 1308fc8598eSJerry Chuang #define rOFDM0_XAAGCCore2 0xc54 1318fc8598eSJerry Chuang #define rOFDM0_XBAGCCore1 0xc58 1328fc8598eSJerry Chuang #define rOFDM0_XBAGCCore2 0xc5c 1338fc8598eSJerry Chuang #define rOFDM0_XCAGCCore1 0xc60 1348fc8598eSJerry Chuang #define rOFDM0_XCAGCCore2 0xc64 1358fc8598eSJerry Chuang #define rOFDM0_XDAGCCore1 0xc68 1368fc8598eSJerry Chuang #define rOFDM0_XDAGCCore2 0xc6c 1378fc8598eSJerry Chuang #define rOFDM0_AGCParameter1 0xc70 1388fc8598eSJerry Chuang #define rOFDM0_AGCParameter2 0xc74 1398fc8598eSJerry Chuang #define rOFDM0_AGCRSSITable 0xc78 1408fc8598eSJerry Chuang #define rOFDM0_HTSTFAGC 0xc7c 1418fc8598eSJerry Chuang #define rOFDM0_XATxIQImbalance 0xc80 1428fc8598eSJerry Chuang #define rOFDM0_XATxAFE 0xc84 1438fc8598eSJerry Chuang #define rOFDM0_XBTxIQImbalance 0xc88 1448fc8598eSJerry Chuang #define rOFDM0_XBTxAFE 0xc8c 1458fc8598eSJerry Chuang #define rOFDM0_XCTxIQImbalance 0xc90 1468fc8598eSJerry Chuang #define rOFDM0_XCTxAFE 0xc94 1478fc8598eSJerry Chuang #define rOFDM0_XDTxIQImbalance 0xc98 1488fc8598eSJerry Chuang #define rOFDM0_XDTxAFE 0xc9c 1498fc8598eSJerry Chuang #define rOFDM0_RxHPParameter 0xce0 1508fc8598eSJerry Chuang #define rOFDM0_TxPseudoNoiseWgt 0xce4 1518fc8598eSJerry Chuang #define rOFDM0_FrameSync 0xcf0 1528fc8598eSJerry Chuang #define rOFDM0_DFSReport 0xcf4 1538fc8598eSJerry Chuang #define rOFDM0_TxCoeff1 0xca4 1548fc8598eSJerry Chuang #define rOFDM0_TxCoeff2 0xca8 1558fc8598eSJerry Chuang #define rOFDM0_TxCoeff3 0xcac 1568fc8598eSJerry Chuang #define rOFDM0_TxCoeff4 0xcb0 1578fc8598eSJerry Chuang #define rOFDM0_TxCoeff5 0xcb4 1588fc8598eSJerry Chuang #define rOFDM0_TxCoeff6 0xcb8 1598fc8598eSJerry Chuang 1608fc8598eSJerry Chuang 1612160e944SSanjeev Sharma /* page d */ 1628fc8598eSJerry Chuang #define rOFDM1_LSTF 0xd00 1638fc8598eSJerry Chuang #define rOFDM1_TRxPathEnable 0xd04 1648fc8598eSJerry Chuang #define rOFDM1_CFO 0xd08 1658fc8598eSJerry Chuang #define rOFDM1_CSI1 0xd10 1668fc8598eSJerry Chuang #define rOFDM1_SBD 0xd14 1678fc8598eSJerry Chuang #define rOFDM1_CSI2 0xd18 1688fc8598eSJerry Chuang #define rOFDM1_CFOTracking 0xd2c 1698fc8598eSJerry Chuang #define rOFDM1_TRxMesaure1 0xd34 1708fc8598eSJerry Chuang #define rOFDM1_IntfDet 0xd3c 1718fc8598eSJerry Chuang #define rOFDM1_PseudoNoiseStateAB 0xd50 1728fc8598eSJerry Chuang #define rOFDM1_PseudoNoiseStateCD 0xd54 1738fc8598eSJerry Chuang #define rOFDM1_RxPseudoNoiseWgt 0xd58 1742160e944SSanjeev Sharma #define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ 1752160e944SSanjeev Sharma #define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ 1762160e944SSanjeev Sharma 1772160e944SSanjeev Sharma #define rOFDM_PHYCounter3 0xda8 /* MCS not support */ 1788fc8598eSJerry Chuang #define rOFDM_ShortCFOAB 0xdac 1798fc8598eSJerry Chuang #define rOFDM_ShortCFOCD 0xdb0 1808fc8598eSJerry Chuang #define rOFDM_LongCFOAB 0xdb4 1818fc8598eSJerry Chuang #define rOFDM_LongCFOCD 0xdb8 1828fc8598eSJerry Chuang #define rOFDM_TailCFOAB 0xdbc 1838fc8598eSJerry Chuang #define rOFDM_TailCFOCD 0xdc0 1848fc8598eSJerry Chuang #define rOFDM_PWMeasure1 0xdc4 1858fc8598eSJerry Chuang #define rOFDM_PWMeasure2 0xdc8 1868fc8598eSJerry Chuang #define rOFDM_BWReport 0xdcc 1878fc8598eSJerry Chuang #define rOFDM_AGCReport 0xdd0 1888fc8598eSJerry Chuang #define rOFDM_RxSNR 0xdd4 1898fc8598eSJerry Chuang #define rOFDM_RxEVMCSI 0xdd8 1908fc8598eSJerry Chuang #define rOFDM_SIGReport 0xddc 1918fc8598eSJerry Chuang 1922160e944SSanjeev Sharma /* page e */ 1938fc8598eSJerry Chuang #define rTxAGC_Rate18_06 0xe00 1948fc8598eSJerry Chuang #define rTxAGC_Rate54_24 0xe04 1958fc8598eSJerry Chuang #define rTxAGC_CCK_Mcs32 0xe08 1968fc8598eSJerry Chuang #define rTxAGC_Mcs03_Mcs00 0xe10 1978fc8598eSJerry Chuang #define rTxAGC_Mcs07_Mcs04 0xe14 1988fc8598eSJerry Chuang #define rTxAGC_Mcs11_Mcs08 0xe18 1998fc8598eSJerry Chuang #define rTxAGC_Mcs15_Mcs12 0xe1c 2008fc8598eSJerry Chuang 2018fc8598eSJerry Chuang 2022160e944SSanjeev Sharma /* RF 2032160e944SSanjeev Sharma * Zebra1 2042160e944SSanjeev Sharma */ 2058fc8598eSJerry Chuang #define rZebra1_HSSIEnable 0x0 2068fc8598eSJerry Chuang #define rZebra1_TRxEnable1 0x1 2078fc8598eSJerry Chuang #define rZebra1_TRxEnable2 0x2 2088fc8598eSJerry Chuang #define rZebra1_AGC 0x4 2098fc8598eSJerry Chuang #define rZebra1_ChargePump 0x5 2108fc8598eSJerry Chuang #define rZebra1_Channel 0x7 2118fc8598eSJerry Chuang #define rZebra1_TxGain 0x8 2128fc8598eSJerry Chuang #define rZebra1_TxLPF 0x9 2138fc8598eSJerry Chuang #define rZebra1_RxLPF 0xb 2148fc8598eSJerry Chuang #define rZebra1_RxHPFCorner 0xc 2158fc8598eSJerry Chuang 2162160e944SSanjeev Sharma /* Zebra4 */ 2178fc8598eSJerry Chuang #define rGlobalCtrl 0 2188fc8598eSJerry Chuang #define rRTL8256_TxLPF 19 2198fc8598eSJerry Chuang #define rRTL8256_RxLPF 11 2208fc8598eSJerry Chuang 2212160e944SSanjeev Sharma /* RTL8258 */ 2228fc8598eSJerry Chuang #define rRTL8258_TxLPF 0x11 2238fc8598eSJerry Chuang #define rRTL8258_RxLPF 0x13 2248fc8598eSJerry Chuang #define rRTL8258_RSSILPF 0xa 2258fc8598eSJerry Chuang 2262160e944SSanjeev Sharma /* Bit Mask 2272160e944SSanjeev Sharma * page-1 2282160e944SSanjeev Sharma */ 2298fc8598eSJerry Chuang #define bBBResetB 0x100 2308fc8598eSJerry Chuang #define bGlobalResetB 0x200 2318fc8598eSJerry Chuang #define bOFDMTxStart 0x4 2328fc8598eSJerry Chuang #define bCCKTxStart 0x8 2338fc8598eSJerry Chuang #define bCRC32Debug 0x100 2348fc8598eSJerry Chuang #define bPMACLoopback 0x10 2358fc8598eSJerry Chuang #define bTxLSIG 0xffffff 2368fc8598eSJerry Chuang #define bOFDMTxRate 0xf 2378fc8598eSJerry Chuang #define bOFDMTxReserved 0x10 2388fc8598eSJerry Chuang #define bOFDMTxLength 0x1ffe0 2398fc8598eSJerry Chuang #define bOFDMTxParity 0x20000 2408fc8598eSJerry Chuang #define bTxHTSIG1 0xffffff 2418fc8598eSJerry Chuang #define bTxHTMCSRate 0x7f 2428fc8598eSJerry Chuang #define bTxHTBW 0x80 2438fc8598eSJerry Chuang #define bTxHTLength 0xffff00 2448fc8598eSJerry Chuang #define bTxHTSIG2 0xffffff 2458fc8598eSJerry Chuang #define bTxHTSmoothing 0x1 2468fc8598eSJerry Chuang #define bTxHTSounding 0x2 2478fc8598eSJerry Chuang #define bTxHTReserved 0x4 2488fc8598eSJerry Chuang #define bTxHTAggreation 0x8 2498fc8598eSJerry Chuang #define bTxHTSTBC 0x30 2508fc8598eSJerry Chuang #define bTxHTAdvanceCoding 0x40 2518fc8598eSJerry Chuang #define bTxHTShortGI 0x80 2528fc8598eSJerry Chuang #define bTxHTNumberHT_LTF 0x300 2538fc8598eSJerry Chuang #define bTxHTCRC8 0x3fc00 2548fc8598eSJerry Chuang #define bCounterReset 0x10000 2558fc8598eSJerry Chuang #define bNumOfOFDMTx 0xffff 2568fc8598eSJerry Chuang #define bNumOfCCKTx 0xffff0000 2578fc8598eSJerry Chuang #define bTxIdleInterval 0xffff 2588fc8598eSJerry Chuang #define bOFDMService 0xffff0000 2598fc8598eSJerry Chuang #define bTxMACHeader 0xffffffff 2608fc8598eSJerry Chuang #define bTxDataInit 0xff 2618fc8598eSJerry Chuang #define bTxHTMode 0x100 2628fc8598eSJerry Chuang #define bTxDataType 0x30000 2638fc8598eSJerry Chuang #define bTxRandomSeed 0xffffffff 2648fc8598eSJerry Chuang #define bCCKTxPreamble 0x1 2658fc8598eSJerry Chuang #define bCCKTxSFD 0xffff0000 2668fc8598eSJerry Chuang #define bCCKTxSIG 0xff 2678fc8598eSJerry Chuang #define bCCKTxService 0xff00 2688fc8598eSJerry Chuang #define bCCKLengthExt 0x8000 2698fc8598eSJerry Chuang #define bCCKTxLength 0xffff0000 2708fc8598eSJerry Chuang #define bCCKTxCRC16 0xffff 2718fc8598eSJerry Chuang #define bCCKTxStatus 0x1 2728fc8598eSJerry Chuang #define bOFDMTxStatus 0x2 2738fc8598eSJerry Chuang 2742160e944SSanjeev Sharma /* page-8 */ 2758fc8598eSJerry Chuang #define bRFMOD 0x1 2768fc8598eSJerry Chuang #define bJapanMode 0x2 2778fc8598eSJerry Chuang #define bCCKTxSC 0x30 2788fc8598eSJerry Chuang #define bCCKEn 0x1000000 2798fc8598eSJerry Chuang #define bOFDMEn 0x2000000 2808fc8598eSJerry Chuang #define bOFDMRxADCPhase 0x10000 2818fc8598eSJerry Chuang #define bOFDMTxDACPhase 0x40000 2828fc8598eSJerry Chuang #define bXATxAGC 0x3f 2838fc8598eSJerry Chuang #define bXBTxAGC 0xf00 2848fc8598eSJerry Chuang #define bXCTxAGC 0xf000 2858fc8598eSJerry Chuang #define bXDTxAGC 0xf0000 2868fc8598eSJerry Chuang #define bPAStart 0xf0000000 2878fc8598eSJerry Chuang #define bTRStart 0x00f00000 2888fc8598eSJerry Chuang #define bRFStart 0x0000f000 2898fc8598eSJerry Chuang #define bBBStart 0x000000f0 2908fc8598eSJerry Chuang #define bBBCCKStart 0x0000000f 2912160e944SSanjeev Sharma #define bPAEnd 0xf /* Reg0x814 */ 2928fc8598eSJerry Chuang #define bTREnd 0x0f000000 2938fc8598eSJerry Chuang #define bRFEnd 0x000f0000 2942160e944SSanjeev Sharma #define bCCAMask 0x000000f0 /* T2R */ 2958fc8598eSJerry Chuang #define bR2RCCAMask 0x00000f00 2968fc8598eSJerry Chuang #define bHSSI_R2TDelay 0xf8000000 2978fc8598eSJerry Chuang #define bHSSI_T2RDelay 0xf80000 2982160e944SSanjeev Sharma #define bContTxHSSI 0x400 /* chane gain at continue Tx */ 2998fc8598eSJerry Chuang #define bIGFromCCK 0x200 3008fc8598eSJerry Chuang #define bAGCAddress 0x3f 3018fc8598eSJerry Chuang #define bRxHPTx 0x7000 3028fc8598eSJerry Chuang #define bRxHPT2R 0x38000 3038fc8598eSJerry Chuang #define bRxHPCCKIni 0xc0000 3048fc8598eSJerry Chuang #define bAGCTxCode 0xc00000 3058fc8598eSJerry Chuang #define bAGCRxCode 0x300000 3068fc8598eSJerry Chuang #define b3WireDataLength 0x800 3078fc8598eSJerry Chuang #define b3WireAddressLength 0x400 3088fc8598eSJerry Chuang #define b3WireRFPowerDown 0x1 3092160e944SSanjeev Sharma /* #define bHWSISelect 0x8 */ 3108fc8598eSJerry Chuang #define b5GPAPEPolarity 0x40000000 3118fc8598eSJerry Chuang #define b2GPAPEPolarity 0x80000000 3128fc8598eSJerry Chuang #define bRFSW_TxDefaultAnt 0x3 3138fc8598eSJerry Chuang #define bRFSW_TxOptionAnt 0x30 3148fc8598eSJerry Chuang #define bRFSW_RxDefaultAnt 0x300 3158fc8598eSJerry Chuang #define bRFSW_RxOptionAnt 0x3000 3168fc8598eSJerry Chuang #define bRFSI_3WireData 0x1 3178fc8598eSJerry Chuang #define bRFSI_3WireClock 0x2 3188fc8598eSJerry Chuang #define bRFSI_3WireLoad 0x4 3198fc8598eSJerry Chuang #define bRFSI_3WireRW 0x8 3202160e944SSanjeev Sharma #define bRFSI_3Wire 0xf /* 3-wire total control */ 3218fc8598eSJerry Chuang #define bRFSI_RFENV 0x10 3228fc8598eSJerry Chuang #define bRFSI_TRSW 0x20 3238fc8598eSJerry Chuang #define bRFSI_TRSWB 0x40 3248fc8598eSJerry Chuang #define bRFSI_ANTSW 0x100 3258fc8598eSJerry Chuang #define bRFSI_ANTSWB 0x200 3268fc8598eSJerry Chuang #define bRFSI_PAPE 0x400 3278fc8598eSJerry Chuang #define bRFSI_PAPE5G 0x800 3288fc8598eSJerry Chuang #define bBandSelect 0x1 3298fc8598eSJerry Chuang #define bHTSIG2_GI 0x80 3308fc8598eSJerry Chuang #define bHTSIG2_Smoothing 0x01 3318fc8598eSJerry Chuang #define bHTSIG2_Sounding 0x02 3328fc8598eSJerry Chuang #define bHTSIG2_Aggreaton 0x08 3338fc8598eSJerry Chuang #define bHTSIG2_STBC 0x30 3348fc8598eSJerry Chuang #define bHTSIG2_AdvCoding 0x40 3358fc8598eSJerry Chuang #define bHTSIG2_NumOfHTLTF 0x300 3368fc8598eSJerry Chuang #define bHTSIG2_CRC8 0x3fc 3378fc8598eSJerry Chuang #define bHTSIG1_MCS 0x7f 3388fc8598eSJerry Chuang #define bHTSIG1_BandWidth 0x80 3398fc8598eSJerry Chuang #define bHTSIG1_HTLength 0xffff 3408fc8598eSJerry Chuang #define bLSIG_Rate 0xf 3418fc8598eSJerry Chuang #define bLSIG_Reserved 0x10 3428fc8598eSJerry Chuang #define bLSIG_Length 0x1fffe 3438fc8598eSJerry Chuang #define bLSIG_Parity 0x20 3448fc8598eSJerry Chuang #define bCCKRxPhase 0x4 3452160e944SSanjeev Sharma #define bLSSIReadAddress 0x3f000000 /* LSSI "Read" Address */ 3462160e944SSanjeev Sharma #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ 3478fc8598eSJerry Chuang #define bLSSIReadBackData 0xfff 3488fc8598eSJerry Chuang #define bLSSIReadOKFlag 0x1000 3492160e944SSanjeev Sharma #define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ 3508fc8598eSJerry Chuang #define bRegulator0Standby 0x1 3518fc8598eSJerry Chuang #define bRegulatorPLLStandby 0x2 3528fc8598eSJerry Chuang #define bRegulator1Standby 0x4 3538fc8598eSJerry Chuang #define bPLLPowerUp 0x8 3548fc8598eSJerry Chuang #define bDPLLPowerUp 0x10 3558fc8598eSJerry Chuang #define bDA10PowerUp 0x20 3568fc8598eSJerry Chuang #define bAD7PowerUp 0x200 3578fc8598eSJerry Chuang #define bDA6PowerUp 0x2000 3588fc8598eSJerry Chuang #define bXtalPowerUp 0x4000 3598fc8598eSJerry Chuang #define b40MDClkPowerUP 0x8000 3608fc8598eSJerry Chuang #define bDA6DebugMode 0x20000 3618fc8598eSJerry Chuang #define bDA6Swing 0x380000 3628fc8598eSJerry Chuang #define bADClkPhase 0x4000000 3638fc8598eSJerry Chuang #define b80MClkDelay 0x18000000 3648fc8598eSJerry Chuang #define bAFEWatchDogEnable 0x20000000 3658fc8598eSJerry Chuang #define bXtalCap 0x0f000000 3668fc8598eSJerry Chuang #define bIntDifClkEnable 0x400 3678fc8598eSJerry Chuang #define bExtSigClkEnable 0x800 3688fc8598eSJerry Chuang #define bBandgapMbiasPowerUp 0x10000 3698fc8598eSJerry Chuang #define bAD11SHGain 0xc0000 3708fc8598eSJerry Chuang #define bAD11InputRange 0x700000 3718fc8598eSJerry Chuang #define bAD11OPCurrent 0x3800000 3728fc8598eSJerry Chuang #define bIPathLoopback 0x4000000 3738fc8598eSJerry Chuang #define bQPathLoopback 0x8000000 3748fc8598eSJerry Chuang #define bAFELoopback 0x10000000 3758fc8598eSJerry Chuang #define bDA10Swing 0x7e0 3768fc8598eSJerry Chuang #define bDA10Reverse 0x800 3778fc8598eSJerry Chuang #define bDAClkSource 0x1000 3788fc8598eSJerry Chuang #define bAD7InputRange 0x6000 3798fc8598eSJerry Chuang #define bAD7Gain 0x38000 3808fc8598eSJerry Chuang #define bAD7OutputCMMode 0x40000 3818fc8598eSJerry Chuang #define bAD7InputCMMode 0x380000 3828fc8598eSJerry Chuang #define bAD7Current 0xc00000 3838fc8598eSJerry Chuang #define bRegulatorAdjust 0x7000000 3848fc8598eSJerry Chuang #define bAD11PowerUpAtTx 0x1 3858fc8598eSJerry Chuang #define bDA10PSAtTx 0x10 3868fc8598eSJerry Chuang #define bAD11PowerUpAtRx 0x100 3878fc8598eSJerry Chuang #define bDA10PSAtRx 0x1000 3888fc8598eSJerry Chuang 3898fc8598eSJerry Chuang #define bCCKRxAGCFormat 0x200 3908fc8598eSJerry Chuang 3918fc8598eSJerry Chuang #define bPSDFFTSamplepPoint 0xc000 3928fc8598eSJerry Chuang #define bPSDAverageNum 0x3000 3938fc8598eSJerry Chuang #define bIQPathControl 0xc00 3948fc8598eSJerry Chuang #define bPSDFreq 0x3ff 3958fc8598eSJerry Chuang #define bPSDAntennaPath 0x30 3968fc8598eSJerry Chuang #define bPSDIQSwitch 0x40 3978fc8598eSJerry Chuang #define bPSDRxTrigger 0x400000 3988fc8598eSJerry Chuang #define bPSDTxTrigger 0x80000000 3998fc8598eSJerry Chuang #define bPSDSineToneScale 0x7f000000 4008fc8598eSJerry Chuang #define bPSDReport 0xffff 4018fc8598eSJerry Chuang 4022160e944SSanjeev Sharma /* page-9 */ 4038fc8598eSJerry Chuang #define bOFDMTxSC 0x30000000 4048fc8598eSJerry Chuang #define bCCKTxOn 0x1 4058fc8598eSJerry Chuang #define bOFDMTxOn 0x2 4062160e944SSanjeev Sharma #define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ 4072160e944SSanjeev Sharma #define bDebugItem 0xff /* reset debug page and LWord */ 4088fc8598eSJerry Chuang #define bAntL 0x10 4098fc8598eSJerry Chuang #define bAntNonHT 0x100 4108fc8598eSJerry Chuang #define bAntHT1 0x1000 4118fc8598eSJerry Chuang #define bAntHT2 0x10000 4128fc8598eSJerry Chuang #define bAntHT1S1 0x100000 4138fc8598eSJerry Chuang #define bAntNonHTS1 0x1000000 4148fc8598eSJerry Chuang 4152160e944SSanjeev Sharma /* page-a */ 4168fc8598eSJerry Chuang #define bCCKBBMode 0x3 4178fc8598eSJerry Chuang #define bCCKTxPowerSaving 0x80 4188fc8598eSJerry Chuang #define bCCKRxPowerSaving 0x40 4198fc8598eSJerry Chuang #define bCCKSideBand 0x10 4208fc8598eSJerry Chuang #define bCCKScramble 0x8 4218fc8598eSJerry Chuang #define bCCKAntDiversity 0x8000 4228fc8598eSJerry Chuang #define bCCKCarrierRecovery 0x4000 4238fc8598eSJerry Chuang #define bCCKTxRate 0x3000 4248fc8598eSJerry Chuang #define bCCKDCCancel 0x0800 4258fc8598eSJerry Chuang #define bCCKISICancel 0x0400 4268fc8598eSJerry Chuang #define bCCKMatchFilter 0x0200 4278fc8598eSJerry Chuang #define bCCKEqualizer 0x0100 4288fc8598eSJerry Chuang #define bCCKPreambleDetect 0x800000 4298fc8598eSJerry Chuang #define bCCKFastFalseCCA 0x400000 4308fc8598eSJerry Chuang #define bCCKChEstStart 0x300000 4318fc8598eSJerry Chuang #define bCCKCCACount 0x080000 4328fc8598eSJerry Chuang #define bCCKcs_lim 0x070000 4338fc8598eSJerry Chuang #define bCCKBistMode 0x80000000 4348fc8598eSJerry Chuang #define bCCKCCAMask 0x40000000 4358fc8598eSJerry Chuang #define bCCKTxDACPhase 0x4 4362160e944SSanjeev Sharma #define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ 4378fc8598eSJerry Chuang #define bCCKr_cp_mode0 0x0100 4388fc8598eSJerry Chuang #define bCCKTxDCOffset 0xf0 4398fc8598eSJerry Chuang #define bCCKRxDCOffset 0xf 4408fc8598eSJerry Chuang #define bCCKCCAMode 0xc000 4418fc8598eSJerry Chuang #define bCCKFalseCS_lim 0x3f00 4428fc8598eSJerry Chuang #define bCCKCS_ratio 0xc00000 4438fc8598eSJerry Chuang #define bCCKCorgBit_sel 0x300000 4448fc8598eSJerry Chuang #define bCCKPD_lim 0x0f0000 4458fc8598eSJerry Chuang #define bCCKNewCCA 0x80000000 4468fc8598eSJerry Chuang #define bCCKRxHPofIG 0x8000 4478fc8598eSJerry Chuang #define bCCKRxIG 0x7f00 4488fc8598eSJerry Chuang #define bCCKLNAPolarity 0x800000 4498fc8598eSJerry Chuang #define bCCKRx1stGain 0x7f0000 4502160e944SSanjeev Sharma #define bCCKRFExtend 0x20000000 /* CCK Rx initial gain polarity */ 4518fc8598eSJerry Chuang #define bCCKRxAGCSatLevel 0x1f000000 4528fc8598eSJerry Chuang #define bCCKRxAGCSatCount 0xe0 4532160e944SSanjeev Sharma #define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ 4548fc8598eSJerry Chuang #define bCCKFixedRxAGC 0x8000 4552160e944SSanjeev Sharma /* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ 4568fc8598eSJerry Chuang #define bCCKAntennaPolarity 0x2000 4578fc8598eSJerry Chuang #define bCCKTxFilterType 0x0c00 4588fc8598eSJerry Chuang #define bCCKRxAGCReportType 0x0300 4598fc8598eSJerry Chuang #define bCCKRxDAGCEn 0x80000000 4608fc8598eSJerry Chuang #define bCCKRxDAGCPeriod 0x20000000 4618fc8598eSJerry Chuang #define bCCKRxDAGCSatLevel 0x1f000000 4628fc8598eSJerry Chuang #define bCCKTimingRecovery 0x800000 4638fc8598eSJerry Chuang #define bCCKTxC0 0x3f0000 4648fc8598eSJerry Chuang #define bCCKTxC1 0x3f000000 4658fc8598eSJerry Chuang #define bCCKTxC2 0x3f 4668fc8598eSJerry Chuang #define bCCKTxC3 0x3f00 4678fc8598eSJerry Chuang #define bCCKTxC4 0x3f0000 4688fc8598eSJerry Chuang #define bCCKTxC5 0x3f000000 4698fc8598eSJerry Chuang #define bCCKTxC6 0x3f 4708fc8598eSJerry Chuang #define bCCKTxC7 0x3f00 4718fc8598eSJerry Chuang #define bCCKDebugPort 0xff0000 4728fc8598eSJerry Chuang #define bCCKDACDebug 0x0f000000 4738fc8598eSJerry Chuang #define bCCKFalseAlarmEnable 0x8000 4748fc8598eSJerry Chuang #define bCCKFalseAlarmRead 0x4000 4758fc8598eSJerry Chuang #define bCCKTRSSI 0x7f 4768fc8598eSJerry Chuang #define bCCKRxAGCReport 0xfe 4778fc8598eSJerry Chuang #define bCCKRxReport_AntSel 0x80000000 4788fc8598eSJerry Chuang #define bCCKRxReport_MFOff 0x40000000 4798fc8598eSJerry Chuang #define bCCKRxRxReport_SQLoss 0x20000000 4808fc8598eSJerry Chuang #define bCCKRxReport_Pktloss 0x10000000 4818fc8598eSJerry Chuang #define bCCKRxReport_Lockedbit 0x08000000 4828fc8598eSJerry Chuang #define bCCKRxReport_RateError 0x04000000 4838fc8598eSJerry Chuang #define bCCKRxReport_RxRate 0x03000000 4848fc8598eSJerry Chuang #define bCCKRxFACounterLower 0xff 4858fc8598eSJerry Chuang #define bCCKRxFACounterUpper 0xff000000 4868fc8598eSJerry Chuang #define bCCKRxHPAGCStart 0xe000 4878fc8598eSJerry Chuang #define bCCKRxHPAGCFinal 0x1c00 4888fc8598eSJerry Chuang 4898fc8598eSJerry Chuang #define bCCKRxFalseAlarmEnable 0x8000 4908fc8598eSJerry Chuang #define bCCKFACounterFreeze 0x4000 4918fc8598eSJerry Chuang 4928fc8598eSJerry Chuang #define bCCKTxPathSel 0x10000000 4938fc8598eSJerry Chuang #define bCCKDefaultRxPath 0xc000000 4948fc8598eSJerry Chuang #define bCCKOptionRxPath 0x3000000 4958fc8598eSJerry Chuang 4962160e944SSanjeev Sharma /* page c */ 4978fc8598eSJerry Chuang #define bNumOfSTF 0x3 4988fc8598eSJerry Chuang #define bShift_L 0xc0 4998fc8598eSJerry Chuang #define bGI_TH 0xc 5008fc8598eSJerry Chuang #define bRxPathA 0x1 5018fc8598eSJerry Chuang #define bRxPathB 0x2 5028fc8598eSJerry Chuang #define bRxPathC 0x4 5038fc8598eSJerry Chuang #define bRxPathD 0x8 5048fc8598eSJerry Chuang #define bTxPathA 0x1 5058fc8598eSJerry Chuang #define bTxPathB 0x2 5068fc8598eSJerry Chuang #define bTxPathC 0x4 5078fc8598eSJerry Chuang #define bTxPathD 0x8 5088fc8598eSJerry Chuang #define bTRSSIFreq 0x200 5098fc8598eSJerry Chuang #define bADCBackoff 0x3000 5108fc8598eSJerry Chuang #define bDFIRBackoff 0xc000 5118fc8598eSJerry Chuang #define bTRSSILatchPhase 0x10000 5128fc8598eSJerry Chuang #define bRxIDCOffset 0xff 5138fc8598eSJerry Chuang #define bRxQDCOffset 0xff00 5148fc8598eSJerry Chuang #define bRxDFIRMode 0x1800000 5158fc8598eSJerry Chuang #define bRxDCNFType 0xe000000 5168fc8598eSJerry Chuang #define bRXIQImb_A 0x3ff 5178fc8598eSJerry Chuang #define bRXIQImb_B 0xfc00 5188fc8598eSJerry Chuang #define bRXIQImb_C 0x3f0000 5198fc8598eSJerry Chuang #define bRXIQImb_D 0xffc00000 5208fc8598eSJerry Chuang #define bDC_dc_Notch 0x60000 5218fc8598eSJerry Chuang #define bRxNBINotch 0x1f000000 5228fc8598eSJerry Chuang #define bPD_TH 0xf 5238fc8598eSJerry Chuang #define bPD_TH_Opt2 0xc000 5248fc8598eSJerry Chuang #define bPWED_TH 0x700 5258fc8598eSJerry Chuang #define bIfMF_Win_L 0x800 5268fc8598eSJerry Chuang #define bPD_Option 0x1000 5278fc8598eSJerry Chuang #define bMF_Win_L 0xe000 5288fc8598eSJerry Chuang #define bBW_Search_L 0x30000 5298fc8598eSJerry Chuang #define bwin_enh_L 0xc0000 5308fc8598eSJerry Chuang #define bBW_TH 0x700000 5318fc8598eSJerry Chuang #define bED_TH2 0x3800000 5328fc8598eSJerry Chuang #define bBW_option 0x4000000 5338fc8598eSJerry Chuang #define bRatio_TH 0x18000000 5348fc8598eSJerry Chuang #define bWindow_L 0xe0000000 5358fc8598eSJerry Chuang #define bSBD_Option 0x1 5368fc8598eSJerry Chuang #define bFrame_TH 0x1c 5378fc8598eSJerry Chuang #define bFS_Option 0x60 5388fc8598eSJerry Chuang #define bDC_Slope_check 0x80 5398fc8598eSJerry Chuang #define bFGuard_Counter_DC_L 0xe00 5408fc8598eSJerry Chuang #define bFrame_Weight_Short 0x7000 5418fc8598eSJerry Chuang #define bSub_Tune 0xe00000 5428fc8598eSJerry Chuang #define bFrame_DC_Length 0xe000000 5438fc8598eSJerry Chuang #define bSBD_start_offset 0x30000000 5448fc8598eSJerry Chuang #define bFrame_TH_2 0x7 5458fc8598eSJerry Chuang #define bFrame_GI2_TH 0x38 5468fc8598eSJerry Chuang #define bGI2_Sync_en 0x40 5478fc8598eSJerry Chuang #define bSarch_Short_Early 0x300 5488fc8598eSJerry Chuang #define bSarch_Short_Late 0xc00 5498fc8598eSJerry Chuang #define bSarch_GI2_Late 0x70000 5508fc8598eSJerry Chuang #define bCFOAntSum 0x1 5518fc8598eSJerry Chuang #define bCFOAcc 0x2 5528fc8598eSJerry Chuang #define bCFOStartOffset 0xc 5538fc8598eSJerry Chuang #define bCFOLookBack 0x70 5548fc8598eSJerry Chuang #define bCFOSumWeight 0x80 5558fc8598eSJerry Chuang #define bDAGCEnable 0x10000 5568fc8598eSJerry Chuang #define bTXIQImb_A 0x3ff 5578fc8598eSJerry Chuang #define bTXIQImb_B 0xfc00 5588fc8598eSJerry Chuang #define bTXIQImb_C 0x3f0000 5598fc8598eSJerry Chuang #define bTXIQImb_D 0xffc00000 5608fc8598eSJerry Chuang #define bTxIDCOffset 0xff 5618fc8598eSJerry Chuang #define bTxQDCOffset 0xff00 5628fc8598eSJerry Chuang #define bTxDFIRMode 0x10000 5638fc8598eSJerry Chuang #define bTxPesudoNoiseOn 0x4000000 5648fc8598eSJerry Chuang #define bTxPesudoNoise_A 0xff 5658fc8598eSJerry Chuang #define bTxPesudoNoise_B 0xff00 5668fc8598eSJerry Chuang #define bTxPesudoNoise_C 0xff0000 5678fc8598eSJerry Chuang #define bTxPesudoNoise_D 0xff000000 5688fc8598eSJerry Chuang #define bCCADropOption 0x20000 5698fc8598eSJerry Chuang #define bCCADropThres 0xfff00000 5708fc8598eSJerry Chuang #define bEDCCA_H 0xf 5718fc8598eSJerry Chuang #define bEDCCA_L 0xf0 5728fc8598eSJerry Chuang #define bLambda_ED 0x300 5738fc8598eSJerry Chuang #define bRxInitialGain 0x7f 5748fc8598eSJerry Chuang #define bRxAntDivEn 0x80 5758fc8598eSJerry Chuang #define bRxAGCAddressForLNA 0x7f00 5768fc8598eSJerry Chuang #define bRxHighPowerFlow 0x8000 5778fc8598eSJerry Chuang #define bRxAGCFreezeThres 0xc0000 5788fc8598eSJerry Chuang #define bRxFreezeStep_AGC1 0x300000 5798fc8598eSJerry Chuang #define bRxFreezeStep_AGC2 0xc00000 5808fc8598eSJerry Chuang #define bRxFreezeStep_AGC3 0x3000000 5818fc8598eSJerry Chuang #define bRxFreezeStep_AGC0 0xc000000 5828fc8598eSJerry Chuang #define bRxRssi_Cmp_En 0x10000000 5838fc8598eSJerry Chuang #define bRxQuickAGCEn 0x20000000 5848fc8598eSJerry Chuang #define bRxAGCFreezeThresMode 0x40000000 5858fc8598eSJerry Chuang #define bRxOverFlowCheckType 0x80000000 5868fc8598eSJerry Chuang #define bRxAGCShift 0x7f 5878fc8598eSJerry Chuang #define bTRSW_Tri_Only 0x80 5888fc8598eSJerry Chuang #define bPowerThres 0x300 5898fc8598eSJerry Chuang #define bRxAGCEn 0x1 5908fc8598eSJerry Chuang #define bRxAGCTogetherEn 0x2 5918fc8598eSJerry Chuang #define bRxAGCMin 0x4 5928fc8598eSJerry Chuang #define bRxHP_Ini 0x7 5938fc8598eSJerry Chuang #define bRxHP_TRLNA 0x70 5948fc8598eSJerry Chuang #define bRxHP_RSSI 0x700 5958fc8598eSJerry Chuang #define bRxHP_BBP1 0x7000 5968fc8598eSJerry Chuang #define bRxHP_BBP2 0x70000 5978fc8598eSJerry Chuang #define bRxHP_BBP3 0x700000 5982160e944SSanjeev Sharma #define bRSSI_H 0x7f0000 /* the threshold for high power */ 5992160e944SSanjeev Sharma #define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ 6008fc8598eSJerry Chuang #define bRxSettle_TRSW 0x7 6018fc8598eSJerry Chuang #define bRxSettle_LNA 0x38 6028fc8598eSJerry Chuang #define bRxSettle_RSSI 0x1c0 6038fc8598eSJerry Chuang #define bRxSettle_BBP 0xe00 6048fc8598eSJerry Chuang #define bRxSettle_RxHP 0x7000 6058fc8598eSJerry Chuang #define bRxSettle_AntSW_RSSI 0x38000 6068fc8598eSJerry Chuang #define bRxSettle_AntSW 0xc0000 6078fc8598eSJerry Chuang #define bRxProcessTime_DAGC 0x300000 6088fc8598eSJerry Chuang #define bRxSettle_HSSI 0x400000 6098fc8598eSJerry Chuang #define bRxProcessTime_BBPPW 0x800000 6108fc8598eSJerry Chuang #define bRxAntennaPowerShift 0x3000000 6118fc8598eSJerry Chuang #define bRSSITableSelect 0xc000000 6128fc8598eSJerry Chuang #define bRxHP_Final 0x7000000 6138fc8598eSJerry Chuang #define bRxHTSettle_BBP 0x7 6148fc8598eSJerry Chuang #define bRxHTSettle_HSSI 0x8 6158fc8598eSJerry Chuang #define bRxHTSettle_RxHP 0x70 6168fc8598eSJerry Chuang #define bRxHTSettle_BBPPW 0x80 6178fc8598eSJerry Chuang #define bRxHTSettle_Idle 0x300 6188fc8598eSJerry Chuang #define bRxHTSettle_Reserved 0x1c00 6198fc8598eSJerry Chuang #define bRxHTRxHPEn 0x8000 6208fc8598eSJerry Chuang #define bRxHTAGCFreezeThres 0x30000 6218fc8598eSJerry Chuang #define bRxHTAGCTogetherEn 0x40000 6228fc8598eSJerry Chuang #define bRxHTAGCMin 0x80000 6238fc8598eSJerry Chuang #define bRxHTAGCEn 0x100000 6248fc8598eSJerry Chuang #define bRxHTDAGCEn 0x200000 6258fc8598eSJerry Chuang #define bRxHTRxHP_BBP 0x1c00000 6268fc8598eSJerry Chuang #define bRxHTRxHP_Final 0xe0000000 6278fc8598eSJerry Chuang #define bRxPWRatioTH 0x3 6288fc8598eSJerry Chuang #define bRxPWRatioEn 0x4 6298fc8598eSJerry Chuang #define bRxMFHold 0x3800 6308fc8598eSJerry Chuang #define bRxPD_Delay_TH1 0x38 6318fc8598eSJerry Chuang #define bRxPD_Delay_TH2 0x1c0 6328fc8598eSJerry Chuang #define bRxPD_DC_COUNT_MAX 0x600 6332160e944SSanjeev Sharma /* #define bRxMF_Hold 0x3800 */ 6348fc8598eSJerry Chuang #define bRxPD_Delay_TH 0x8000 6358fc8598eSJerry Chuang #define bRxProcess_Delay 0xf0000 6368fc8598eSJerry Chuang #define bRxSearchrange_GI2_Early 0x700000 6378fc8598eSJerry Chuang #define bRxFrame_Guard_Counter_L 0x3800000 6388fc8598eSJerry Chuang #define bRxSGI_Guard_L 0xc000000 6398fc8598eSJerry Chuang #define bRxSGI_Search_L 0x30000000 6408fc8598eSJerry Chuang #define bRxSGI_TH 0xc0000000 6418fc8598eSJerry Chuang #define bDFSCnt0 0xff 6428fc8598eSJerry Chuang #define bDFSCnt1 0xff00 6438fc8598eSJerry Chuang #define bDFSFlag 0xf0000 6448fc8598eSJerry Chuang 6458fc8598eSJerry Chuang #define bMFWeightSum 0x300000 6468fc8598eSJerry Chuang #define bMinIdxTH 0x7f000000 6478fc8598eSJerry Chuang 6488fc8598eSJerry Chuang #define bDAFormat 0x40000 6498fc8598eSJerry Chuang 6508fc8598eSJerry Chuang #define bTxChEmuEnable 0x01000000 6518fc8598eSJerry Chuang 6528fc8598eSJerry Chuang #define bTRSWIsolation_A 0x7f 6538fc8598eSJerry Chuang #define bTRSWIsolation_B 0x7f00 6548fc8598eSJerry Chuang #define bTRSWIsolation_C 0x7f0000 6558fc8598eSJerry Chuang #define bTRSWIsolation_D 0x7f000000 6568fc8598eSJerry Chuang 6578fc8598eSJerry Chuang #define bExtLNAGain 0x7c00 6588fc8598eSJerry Chuang 6592160e944SSanjeev Sharma /* page d */ 6608fc8598eSJerry Chuang #define bSTBCEn 0x4 6618fc8598eSJerry Chuang #define bAntennaMapping 0x10 6628fc8598eSJerry Chuang #define bNss 0x20 6638fc8598eSJerry Chuang #define bCFOAntSumD 0x200 6648fc8598eSJerry Chuang #define bPHYCounterReset 0x8000000 6658fc8598eSJerry Chuang #define bCFOReportGet 0x4000000 6668fc8598eSJerry Chuang #define bOFDMContinueTx 0x10000000 6678fc8598eSJerry Chuang #define bOFDMSingleCarrier 0x20000000 6688fc8598eSJerry Chuang #define bOFDMSingleTone 0x40000000 6692160e944SSanjeev Sharma /* #define bRxPath1 0x01 6702160e944SSanjeev Sharma * #define bRxPath2 0x02 6712160e944SSanjeev Sharma * #define bRxPath3 0x04 6722160e944SSanjeev Sharma * #define bRxPath4 0x08 6732160e944SSanjeev Sharma * #define bTxPath1 0x10 6742160e944SSanjeev Sharma * #define bTxPath2 0x20 6752160e944SSanjeev Sharma */ 6768fc8598eSJerry Chuang #define bHTDetect 0x100 6778fc8598eSJerry Chuang #define bCFOEn 0x10000 6788fc8598eSJerry Chuang #define bCFOValue 0xfff00000 6798fc8598eSJerry Chuang #define bSigTone_Re 0x3f 6808fc8598eSJerry Chuang #define bSigTone_Im 0x7f00 6818fc8598eSJerry Chuang #define bCounter_CCA 0xffff 6828fc8598eSJerry Chuang #define bCounter_ParityFail 0xffff0000 6838fc8598eSJerry Chuang #define bCounter_RateIllegal 0xffff 6848fc8598eSJerry Chuang #define bCounter_CRC8Fail 0xffff0000 6858fc8598eSJerry Chuang #define bCounter_MCSNoSupport 0xffff 6868fc8598eSJerry Chuang #define bCounter_FastSync 0xffff 6878fc8598eSJerry Chuang #define bShortCFO 0xfff 6882160e944SSanjeev Sharma #define bShortCFOTLength 12 /* total */ 6892160e944SSanjeev Sharma #define bShortCFOFLength 11 /* fraction */ 6908fc8598eSJerry Chuang #define bLongCFO 0x7ff 6918fc8598eSJerry Chuang #define bLongCFOTLength 11 6928fc8598eSJerry Chuang #define bLongCFOFLength 11 6938fc8598eSJerry Chuang #define bTailCFO 0x1fff 6948fc8598eSJerry Chuang #define bTailCFOTLength 13 6958fc8598eSJerry Chuang #define bTailCFOFLength 12 6968fc8598eSJerry Chuang 6978fc8598eSJerry Chuang #define bmax_en_pwdB 0xffff 6988fc8598eSJerry Chuang #define bCC_power_dB 0xffff0000 6998fc8598eSJerry Chuang #define bnoise_pwdB 0xffff 7008fc8598eSJerry Chuang #define bPowerMeasTLength 10 7018fc8598eSJerry Chuang #define bPowerMeasFLength 3 7028fc8598eSJerry Chuang #define bRx_HT_BW 0x1 7038fc8598eSJerry Chuang #define bRxSC 0x6 7048fc8598eSJerry Chuang #define bRx_HT 0x8 7058fc8598eSJerry Chuang 7068fc8598eSJerry Chuang #define bNB_intf_det_on 0x1 7078fc8598eSJerry Chuang #define bIntf_win_len_cfg 0x30 7088fc8598eSJerry Chuang #define bNB_Intf_TH_cfg 0x1c0 7098fc8598eSJerry Chuang 7108fc8598eSJerry Chuang #define bRFGain 0x3f 7118fc8598eSJerry Chuang #define bTableSel 0x40 7128fc8598eSJerry Chuang #define bTRSW 0x80 7138fc8598eSJerry Chuang 7148fc8598eSJerry Chuang #define bRxSNR_A 0xff 7158fc8598eSJerry Chuang #define bRxSNR_B 0xff00 7168fc8598eSJerry Chuang #define bRxSNR_C 0xff0000 7178fc8598eSJerry Chuang #define bRxSNR_D 0xff000000 7188fc8598eSJerry Chuang #define bSNREVMTLength 8 7198fc8598eSJerry Chuang #define bSNREVMFLength 1 7208fc8598eSJerry Chuang 7218fc8598eSJerry Chuang #define bCSI1st 0xff 7228fc8598eSJerry Chuang #define bCSI2nd 0xff00 7238fc8598eSJerry Chuang #define bRxEVM1st 0xff0000 7248fc8598eSJerry Chuang #define bRxEVM2nd 0xff000000 7258fc8598eSJerry Chuang 7268fc8598eSJerry Chuang #define bSIGEVM 0xff 7278fc8598eSJerry Chuang #define bPWDB 0xff00 7288fc8598eSJerry Chuang #define bSGIEN 0x10000 7298fc8598eSJerry Chuang 7308fc8598eSJerry Chuang #define bSFactorQAM1 0xf 7318fc8598eSJerry Chuang #define bSFactorQAM2 0xf0 7328fc8598eSJerry Chuang #define bSFactorQAM3 0xf00 7338fc8598eSJerry Chuang #define bSFactorQAM4 0xf000 7348fc8598eSJerry Chuang #define bSFactorQAM5 0xf0000 7358fc8598eSJerry Chuang #define bSFactorQAM6 0xf0000 7368fc8598eSJerry Chuang #define bSFactorQAM7 0xf00000 7378fc8598eSJerry Chuang #define bSFactorQAM8 0xf000000 7388fc8598eSJerry Chuang #define bSFactorQAM9 0xf0000000 7398fc8598eSJerry Chuang #define bCSIScheme 0x100000 7408fc8598eSJerry Chuang 7418fc8598eSJerry Chuang #define bNoiseLvlTopSet 0x3 7428fc8598eSJerry Chuang #define bChSmooth 0x4 7438fc8598eSJerry Chuang #define bChSmoothCfg1 0x38 7448fc8598eSJerry Chuang #define bChSmoothCfg2 0x1c0 7458fc8598eSJerry Chuang #define bChSmoothCfg3 0xe00 7468fc8598eSJerry Chuang #define bChSmoothCfg4 0x7000 7478fc8598eSJerry Chuang #define bMRCMode 0x800000 7488fc8598eSJerry Chuang #define bTHEVMCfg 0x7000000 7498fc8598eSJerry Chuang 7508fc8598eSJerry Chuang #define bLoopFitType 0x1 7518fc8598eSJerry Chuang #define bUpdCFO 0x40 7528fc8598eSJerry Chuang #define bUpdCFOOffData 0x80 7538fc8598eSJerry Chuang #define bAdvUpdCFO 0x100 7548fc8598eSJerry Chuang #define bAdvTimeCtrl 0x800 7558fc8598eSJerry Chuang #define bUpdClko 0x1000 7568fc8598eSJerry Chuang #define bFC 0x6000 7578fc8598eSJerry Chuang #define bTrackingMode 0x8000 7588fc8598eSJerry Chuang #define bPhCmpEnable 0x10000 7598fc8598eSJerry Chuang #define bUpdClkoLTF 0x20000 7608fc8598eSJerry Chuang #define bComChCFO 0x40000 7618fc8598eSJerry Chuang #define bCSIEstiMode 0x80000 7628fc8598eSJerry Chuang #define bAdvUpdEqz 0x100000 7638fc8598eSJerry Chuang #define bUChCfg 0x7000000 7648fc8598eSJerry Chuang #define bUpdEqz 0x8000000 7658fc8598eSJerry Chuang 7662160e944SSanjeev Sharma /* page e */ 7678fc8598eSJerry Chuang #define bTxAGCRate18_06 0x7f7f7f7f 7688fc8598eSJerry Chuang #define bTxAGCRate54_24 0x7f7f7f7f 7698fc8598eSJerry Chuang #define bTxAGCRateMCS32 0x7f 7708fc8598eSJerry Chuang #define bTxAGCRateCCK 0x7f00 7718fc8598eSJerry Chuang #define bTxAGCRateMCS3_MCS0 0x7f7f7f7f 7728fc8598eSJerry Chuang #define bTxAGCRateMCS7_MCS4 0x7f7f7f7f 7738fc8598eSJerry Chuang #define bTxAGCRateMCS11_MCS8 0x7f7f7f7f 7748fc8598eSJerry Chuang #define bTxAGCRateMCS15_MCS12 0x7f7f7f7f 7758fc8598eSJerry Chuang 7768fc8598eSJerry Chuang 7772160e944SSanjeev Sharma /* Rx Pseduo noise */ 7788fc8598eSJerry Chuang #define bRxPesudoNoiseOn 0x20000000 7798fc8598eSJerry Chuang #define bRxPesudoNoise_A 0xff 7808fc8598eSJerry Chuang #define bRxPesudoNoise_B 0xff00 7818fc8598eSJerry Chuang #define bRxPesudoNoise_C 0xff0000 7828fc8598eSJerry Chuang #define bRxPesudoNoise_D 0xff000000 7838fc8598eSJerry Chuang #define bPesudoNoiseState_A 0xffff 7848fc8598eSJerry Chuang #define bPesudoNoiseState_B 0xffff0000 7858fc8598eSJerry Chuang #define bPesudoNoiseState_C 0xffff 7868fc8598eSJerry Chuang #define bPesudoNoiseState_D 0xffff0000 7878fc8598eSJerry Chuang 7882160e944SSanjeev Sharma /* RF 7892160e944SSanjeev Sharma * Zebra1 7902160e944SSanjeev Sharma */ 7918fc8598eSJerry Chuang #define bZebra1_HSSIEnable 0x8 7928fc8598eSJerry Chuang #define bZebra1_TRxControl 0xc00 7938fc8598eSJerry Chuang #define bZebra1_TRxGainSetting 0x07f 7948fc8598eSJerry Chuang #define bZebra1_RxCorner 0xc00 7958fc8598eSJerry Chuang #define bZebra1_TxChargePump 0x38 7968fc8598eSJerry Chuang #define bZebra1_RxChargePump 0x7 7978fc8598eSJerry Chuang #define bZebra1_ChannelNum 0xf80 7988fc8598eSJerry Chuang #define bZebra1_TxLPFBW 0x400 7998fc8598eSJerry Chuang #define bZebra1_RxLPFBW 0x600 8008fc8598eSJerry Chuang 8012160e944SSanjeev Sharma /* Zebra4 */ 8028fc8598eSJerry Chuang #define bRTL8256RegModeCtrl1 0x100 8038fc8598eSJerry Chuang #define bRTL8256RegModeCtrl0 0x40 8048fc8598eSJerry Chuang #define bRTL8256_TxLPFBW 0x18 8058fc8598eSJerry Chuang #define bRTL8256_RxLPFBW 0x600 8068fc8598eSJerry Chuang 8072160e944SSanjeev Sharma /* RTL8258 */ 8088fc8598eSJerry Chuang #define bRTL8258_TxLPFBW 0xc 8098fc8598eSJerry Chuang #define bRTL8258_RxLPFBW 0xc00 8108fc8598eSJerry Chuang #define bRTL8258_RSSILPFBW 0xc0 8118fc8598eSJerry Chuang 8122160e944SSanjeev Sharma /* byte endable for sb_write */ 8138fc8598eSJerry Chuang #define bByte0 0x1 8148fc8598eSJerry Chuang #define bByte1 0x2 8158fc8598eSJerry Chuang #define bByte2 0x4 8168fc8598eSJerry Chuang #define bByte3 0x8 8178fc8598eSJerry Chuang #define bWord0 0x3 8188fc8598eSJerry Chuang #define bWord1 0xc 8198fc8598eSJerry Chuang #define bDWord 0xf 8208fc8598eSJerry Chuang 8212160e944SSanjeev Sharma /* for PutRegsetting & GetRegSetting BitMask */ 8228fc8598eSJerry Chuang #define bMaskByte0 0xff 8238fc8598eSJerry Chuang #define bMaskByte1 0xff00 8248fc8598eSJerry Chuang #define bMaskByte2 0xff0000 8258fc8598eSJerry Chuang #define bMaskByte3 0xff000000 8268fc8598eSJerry Chuang #define bMaskHWord 0xffff0000 8278fc8598eSJerry Chuang #define bMaskLWord 0x0000ffff 8288fc8598eSJerry Chuang #define bMaskDWord 0xffffffff 8298fc8598eSJerry Chuang 8302160e944SSanjeev Sharma /* for PutRFRegsetting & GetRFRegSetting BitMask */ 8318fc8598eSJerry Chuang #define bMask12Bits 0xfff 8328fc8598eSJerry Chuang 8338fc8598eSJerry Chuang #define bEnable 0x1 8348fc8598eSJerry Chuang #define bDisable 0x0 8358fc8598eSJerry Chuang 8368fc8598eSJerry Chuang #define LeftAntenna 0x0 8378fc8598eSJerry Chuang #define RightAntenna 0x1 8388fc8598eSJerry Chuang 8392160e944SSanjeev Sharma #define tCheckTxStatus 500 /* 500ms */ 8402160e944SSanjeev Sharma #define tUpdateRxCounter 100 /* 100ms */ 8418fc8598eSJerry Chuang 8428fc8598eSJerry Chuang #define rateCCK 0 8438fc8598eSJerry Chuang #define rateOFDM 1 8448fc8598eSJerry Chuang #define rateHT 2 8458fc8598eSJerry Chuang 8462160e944SSanjeev Sharma /* define Register-End */ 8478fc8598eSJerry Chuang #define bPMAC_End 0x1ff 8488fc8598eSJerry Chuang #define bFPGAPHY0_End 0x8ff 8498fc8598eSJerry Chuang #define bFPGAPHY1_End 0x9ff 8508fc8598eSJerry Chuang #define bCCKPHY0_End 0xaff 8518fc8598eSJerry Chuang #define bOFDMPHY0_End 0xcff 8528fc8598eSJerry Chuang #define bOFDMPHY1_End 0xdff 8538fc8598eSJerry Chuang 8542160e944SSanjeev Sharma /* define max debug item in each debug page 8552160e944SSanjeev Sharma * #define bMaxItem_FPGA_PHY0 0x9 8562160e944SSanjeev Sharma * #define bMaxItem_FPGA_PHY1 0x3 8572160e944SSanjeev Sharma * #define bMaxItem_PHY_11B 0x16 8582160e944SSanjeev Sharma * #define bMaxItem_OFDM_PHY0 0x29 8592160e944SSanjeev Sharma * #define bMaxItem_OFDM_PHY1 0x0 8602160e944SSanjeev Sharma */ 8618fc8598eSJerry Chuang 8628fc8598eSJerry Chuang #define bPMACControl 0x0 8638fc8598eSJerry Chuang #define bWMACControl 0x1 8648fc8598eSJerry Chuang #define bWNICControl 0x2 8658fc8598eSJerry Chuang 8668fc8598eSJerry Chuang #define PathA 0x0 8678fc8598eSJerry Chuang #define PathB 0x1 8688fc8598eSJerry Chuang #define PathC 0x2 8698fc8598eSJerry Chuang #define PathD 0x3 8708fc8598eSJerry Chuang 8718fc8598eSJerry Chuang #define rRTL8256RxMixerPole 0xb 8728fc8598eSJerry Chuang #define bZebraRxMixerPole 0x6 8738fc8598eSJerry Chuang #define rRTL8256TxBBOPBias 0x9 8748fc8598eSJerry Chuang #define bRTL8256TxBBOPBias 0x400 8758fc8598eSJerry Chuang #define rRTL8256TxBBBW 19 8768fc8598eSJerry Chuang #define bRTL8256TxBBBW 0x18 8778fc8598eSJerry Chuang 8782160e944SSanjeev Sharma #endif /* __INC_HAL8190PCIPHYREG_H */ 879