1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * Contact Information: wlanfae <wlanfae@realtek.com> 6 */ 7 #ifndef __R8192UDM_H__ 8 #define __R8192UDM_H__ 9 10 /*--------------------------Define Parameters-------------------------------*/ 11 #define OFDM_TABLE_LEN 19 12 #define CCK_TABLE_LEN 12 13 14 #define DM_DIG_THRESH_HIGH 40 15 #define DM_DIG_THRESH_LOW 35 16 17 #define DM_DIG_HIGH_PWR_THRESH_HIGH 75 18 #define DM_DIG_HIGH_PWR_THRESH_LOW 70 19 20 #define BW_AUTO_SWITCH_HIGH_LOW 25 21 #define BW_AUTO_SWITCH_LOW_HIGH 30 22 23 #define DM_DIG_BACKOFF 12 24 #define DM_DIG_MAX 0x36 25 #define DM_DIG_MIN 0x1c 26 #define DM_DIG_MIN_Netcore 0x12 27 28 #define RX_PATH_SEL_SS_TH_LOW 30 29 #define RX_PATH_SEL_DIFF_TH 18 30 31 #define RATE_ADAPTIVE_TH_HIGH 50 32 #define RATE_ADAPTIVE_TH_LOW_20M 30 33 #define RATE_ADAPTIVE_TH_LOW_40M 10 34 #define VERY_LOW_RSSI 15 35 36 #define WA_IOT_TH_VAL 25 37 38 #define E_FOR_TX_POWER_TRACK 300 39 #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68 40 #define TX_POWER_NEAR_FIELD_THRESH_LOW 62 41 #define TX_POWER_ATHEROAP_THRESH_HIGH 78 42 #define TX_POWER_ATHEROAP_THRESH_LOW 72 43 44 #define CURRENT_TX_RATE_REG 0x1e0 45 #define INITIAL_TX_RATE_REG 0x1e1 46 #define TX_RETRY_COUNT_REG 0x1ac 47 #define RegC38_TH 20 48 49 /*--------------------------Define Parameters-------------------------------*/ 50 51 /*------------------------------Define structure----------------------------*/ 52 struct dig_t { 53 u8 dig_enable_flag; 54 u8 dig_algorithm; 55 u8 dig_algorithm_switch; 56 57 long rssi_low_thresh; 58 long rssi_high_thresh; 59 60 long rssi_high_power_lowthresh; 61 long rssi_high_power_highthresh; 62 63 u8 dig_state; 64 u8 dig_highpwr_state; 65 u8 cur_sta_connect_state; 66 u8 pre_sta_connect_state; 67 68 u8 curpd_thstate; 69 u8 prepd_thstate; 70 u8 curcs_ratio_state; 71 u8 precs_ratio_state; 72 73 u32 pre_ig_value; 74 u32 cur_ig_value; 75 76 u8 backoff_val; 77 u8 rx_gain_range_max; 78 u8 rx_gain_range_min; 79 80 long rssi_val; 81 }; 82 83 enum dm_dig_sta { 84 DM_STA_DIG_OFF = 0, 85 DM_STA_DIG_ON, 86 DM_STA_DIG_MAX 87 }; 88 89 enum dm_ratr_sta { 90 DM_RATR_STA_HIGH = 0, 91 DM_RATR_STA_MIDDLE = 1, 92 DM_RATR_STA_LOW = 2, 93 DM_RATR_STA_MAX 94 }; 95 96 enum dm_dig_alg { 97 DIG_ALGO_BY_FALSE_ALARM = 0, 98 DIG_ALGO_BY_RSSI = 1, 99 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2, 100 DIG_ALGO_BY_TOW_PORT = 3, 101 DIG_ALGO_MAX 102 }; 103 104 enum dm_dig_connect { 105 DIG_STA_DISCONNECT = 0, 106 DIG_STA_CONNECT = 1, 107 DIG_STA_BEFORE_CONNECT = 2, 108 DIG_AP_DISCONNECT = 3, 109 DIG_AP_CONNECT = 4, 110 DIG_AP_ADD_STATION = 5, 111 DIG_CONNECT_MAX 112 }; 113 114 enum dm_dig_pd_th { 115 DIG_PD_AT_LOW_POWER = 0, 116 DIG_PD_AT_NORMAL_POWER = 1, 117 DIG_PD_AT_HIGH_POWER = 2, 118 DIG_PD_MAX 119 }; 120 121 enum dm_dig_cs_ratio { 122 DIG_CS_RATIO_LOWER = 0, 123 DIG_CS_RATIO_HIGHER = 1, 124 DIG_CS_MAX 125 }; 126 127 struct drx_path_sel { 128 u8 enable; 129 u8 cck_method; 130 u8 cck_rx_path; 131 132 u8 ss_th_low; 133 u8 diff_th; 134 u8 disabled_rf; 135 u8 reserved; 136 137 u8 rf_rssi[4]; 138 u8 rf_enable_rssi_th[4]; 139 long cck_pwdb_sta[4]; 140 }; 141 142 enum dm_cck_rx_path_method { 143 CCK_Rx_Version_1 = 0, 144 CCK_Rx_Version_2 = 1, 145 CCK_Rx_Version_MAX 146 }; 147 148 struct dcmd_txcmd { 149 u32 op; 150 u32 length; 151 u32 value; 152 }; 153 154 /*------------------------------Define structure----------------------------*/ 155 156 /*------------------------Export global variable----------------------------*/ 157 extern struct dig_t dm_digtable; 158 159 /* Pre-calculated gain tables */ 160 extern const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN]; 161 extern const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8]; 162 extern const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8]; 163 /* Maps table index to iq amplify gain (dB, 12 to -24dB) */ 164 #define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) 165 166 /*------------------------Export global variable----------------------------*/ 167 168 /*--------------------------Exported Function prototype---------------------*/ 169 /*--------------------------Exported Function prototype---------------------*/ 170 171 void rtl92e_dm_init(struct net_device *dev); 172 void rtl92e_dm_deinit(struct net_device *dev); 173 174 void rtl92e_dm_watchdog(struct net_device *dev); 175 176 void rtl92e_init_adaptive_rate(struct net_device *dev); 177 void rtl92e_dm_txpower_tracking_wq(void *data); 178 179 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14); 180 181 void rtl92e_dm_restore_state(struct net_device *dev); 182 void rtl92e_dm_backup_state(struct net_device *dev); 183 void rtl92e_dm_init_edca_turbo(struct net_device *dev); 184 void rtl92e_dm_rf_pathcheck_wq(void *data); 185 void rtl92e_dm_init_txpower_tracking(struct net_device *dev); 186 #endif /*__R8192UDM_H__ */ 187