1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * This file is based on code from OCTEON SDK by Cavium Networks. 4 * 5 * Copyright (c) 2003-2007 Cavium Networks 6 */ 7 8 #include <linux/platform_device.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/etherdevice.h> 13 #include <linux/phy.h> 14 #include <linux/slab.h> 15 #include <linux/interrupt.h> 16 #include <linux/of_net.h> 17 #include <linux/if_ether.h> 18 #include <linux/if_vlan.h> 19 20 #include <net/dst.h> 21 22 #include <asm/octeon/octeon.h> 23 24 #include "ethernet-defines.h" 25 #include "octeon-ethernet.h" 26 #include "ethernet-mem.h" 27 #include "ethernet-rx.h" 28 #include "ethernet-tx.h" 29 #include "ethernet-mdio.h" 30 #include "ethernet-util.h" 31 32 #include <asm/octeon/cvmx-pip.h> 33 #include <asm/octeon/cvmx-pko.h> 34 #include <asm/octeon/cvmx-fau.h> 35 #include <asm/octeon/cvmx-ipd.h> 36 #include <asm/octeon/cvmx-helper.h> 37 #include <asm/octeon/cvmx-asxx-defs.h> 38 #include <asm/octeon/cvmx-gmxx-defs.h> 39 40 #define OCTEON_MAX_MTU 65392 41 42 static int num_packet_buffers = 1024; 43 module_param(num_packet_buffers, int, 0444); 44 MODULE_PARM_DESC(num_packet_buffers, "\n" 45 "\tNumber of packet buffers to allocate and store in the\n" 46 "\tFPA. By default, 1024 packet buffers are used.\n"); 47 48 static int pow_receive_group = 15; 49 module_param(pow_receive_group, int, 0444); 50 MODULE_PARM_DESC(pow_receive_group, "\n" 51 "\tPOW group to receive packets from. All ethernet hardware\n" 52 "\twill be configured to send incoming packets to this POW\n" 53 "\tgroup. Also any other software can submit packets to this\n" 54 "\tgroup for the kernel to process."); 55 56 static int receive_group_order; 57 module_param(receive_group_order, int, 0444); 58 MODULE_PARM_DESC(receive_group_order, "\n" 59 "\tOrder (0..4) of receive groups to take into use. Ethernet hardware\n" 60 "\twill be configured to send incoming packets to multiple POW\n" 61 "\tgroups. pow_receive_group parameter is ignored when multiple\n" 62 "\tgroups are taken into use and groups are allocated starting\n" 63 "\tfrom 0. By default, a single group is used.\n"); 64 65 int pow_send_group = -1; 66 module_param(pow_send_group, int, 0644); 67 MODULE_PARM_DESC(pow_send_group, "\n" 68 "\tPOW group to send packets to other software on. This\n" 69 "\tcontrols the creation of the virtual device pow0.\n" 70 "\talways_use_pow also depends on this value."); 71 72 int always_use_pow; 73 module_param(always_use_pow, int, 0444); 74 MODULE_PARM_DESC(always_use_pow, "\n" 75 "\tWhen set, always send to the pow group. This will cause\n" 76 "\tpackets sent to real ethernet devices to be sent to the\n" 77 "\tPOW group instead of the hardware. Unless some other\n" 78 "\tapplication changes the config, packets will still be\n" 79 "\treceived from the low level hardware. Use this option\n" 80 "\tto allow a CVMX app to intercept all packets from the\n" 81 "\tlinux kernel. You must specify pow_send_group along with\n" 82 "\tthis option."); 83 84 char pow_send_list[128] = ""; 85 module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444); 86 MODULE_PARM_DESC(pow_send_list, "\n" 87 "\tComma separated list of ethernet devices that should use the\n" 88 "\tPOW for transmit instead of the actual ethernet hardware. This\n" 89 "\tis a per port version of always_use_pow. always_use_pow takes\n" 90 "\tprecedence over this list. For example, setting this to\n" 91 "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" 92 "\tusing the pow_send_group."); 93 94 int rx_napi_weight = 32; 95 module_param(rx_napi_weight, int, 0444); 96 MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter."); 97 98 /* Mask indicating which receive groups are in use. */ 99 int pow_receive_groups; 100 101 /* 102 * cvm_oct_poll_queue_stopping - flag to indicate polling should stop. 103 * 104 * Set to one right before cvm_oct_poll_queue is destroyed. 105 */ 106 atomic_t cvm_oct_poll_queue_stopping = ATOMIC_INIT(0); 107 108 /* 109 * Array of every ethernet device owned by this driver indexed by 110 * the ipd input port number. 111 */ 112 struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; 113 114 u64 cvm_oct_tx_poll_interval; 115 116 static void cvm_oct_rx_refill_worker(struct work_struct *work); 117 static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker); 118 119 static void cvm_oct_rx_refill_worker(struct work_struct *work) 120 { 121 /* 122 * FPA 0 may have been drained, try to refill it if we need 123 * more than num_packet_buffers / 2, otherwise normal receive 124 * processing will refill it. If it were drained, no packets 125 * could be received so cvm_oct_napi_poll would never be 126 * invoked to do the refill. 127 */ 128 cvm_oct_rx_refill_pool(num_packet_buffers / 2); 129 130 if (!atomic_read(&cvm_oct_poll_queue_stopping)) 131 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ); 132 } 133 134 static void cvm_oct_periodic_worker(struct work_struct *work) 135 { 136 struct octeon_ethernet *priv = container_of(work, 137 struct octeon_ethernet, 138 port_periodic_work.work); 139 140 if (priv->poll) 141 priv->poll(cvm_oct_device[priv->port]); 142 143 cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats 144 (cvm_oct_device[priv->port]); 145 146 if (!atomic_read(&cvm_oct_poll_queue_stopping)) 147 schedule_delayed_work(&priv->port_periodic_work, HZ); 148 } 149 150 static void cvm_oct_configure_common_hw(void) 151 { 152 /* Setup the FPA */ 153 cvmx_fpa_enable(); 154 cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, 155 num_packet_buffers); 156 cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, 157 num_packet_buffers); 158 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) 159 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, 160 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 1024); 161 162 #ifdef __LITTLE_ENDIAN 163 { 164 union cvmx_ipd_ctl_status ipd_ctl_status; 165 166 ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS); 167 ipd_ctl_status.s.pkt_lend = 1; 168 ipd_ctl_status.s.wqe_lend = 1; 169 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64); 170 } 171 #endif 172 173 cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8); 174 } 175 176 /** 177 * cvm_oct_free_work- Free a work queue entry 178 * 179 * @work_queue_entry: Work queue entry to free 180 * 181 * Returns Zero on success, Negative on failure. 182 */ 183 int cvm_oct_free_work(void *work_queue_entry) 184 { 185 cvmx_wqe_t *work = work_queue_entry; 186 187 int segments = work->word2.s.bufs; 188 union cvmx_buf_ptr segment_ptr = work->packet_ptr; 189 190 while (segments--) { 191 union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *) 192 cvmx_phys_to_ptr(segment_ptr.s.addr - 8); 193 if (unlikely(!segment_ptr.s.i)) 194 cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), 195 segment_ptr.s.pool, 196 CVMX_FPA_PACKET_POOL_SIZE / 128); 197 segment_ptr = next_ptr; 198 } 199 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1); 200 201 return 0; 202 } 203 EXPORT_SYMBOL(cvm_oct_free_work); 204 205 /** 206 * cvm_oct_common_get_stats - get the low level ethernet statistics 207 * @dev: Device to get the statistics from 208 * 209 * Returns Pointer to the statistics 210 */ 211 static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev) 212 { 213 cvmx_pip_port_status_t rx_status; 214 cvmx_pko_port_status_t tx_status; 215 struct octeon_ethernet *priv = netdev_priv(dev); 216 217 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) { 218 if (octeon_is_simulation()) { 219 /* The simulator doesn't support statistics */ 220 memset(&rx_status, 0, sizeof(rx_status)); 221 memset(&tx_status, 0, sizeof(tx_status)); 222 } else { 223 cvmx_pip_get_port_status(priv->port, 1, &rx_status); 224 cvmx_pko_get_port_status(priv->port, 1, &tx_status); 225 } 226 227 dev->stats.rx_packets += rx_status.inb_packets; 228 dev->stats.tx_packets += tx_status.packets; 229 dev->stats.rx_bytes += rx_status.inb_octets; 230 dev->stats.tx_bytes += tx_status.octets; 231 dev->stats.multicast += rx_status.multicast_packets; 232 dev->stats.rx_crc_errors += rx_status.inb_errors; 233 dev->stats.rx_frame_errors += rx_status.fcs_align_err_packets; 234 dev->stats.rx_dropped += rx_status.dropped_packets; 235 } 236 237 return &dev->stats; 238 } 239 240 /** 241 * cvm_oct_common_change_mtu - change the link MTU 242 * @dev: Device to change 243 * @new_mtu: The new MTU 244 * 245 * Returns Zero on success 246 */ 247 static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu) 248 { 249 struct octeon_ethernet *priv = netdev_priv(dev); 250 int interface = INTERFACE(priv->port); 251 #if IS_ENABLED(CONFIG_VLAN_8021Q) 252 int vlan_bytes = VLAN_HLEN; 253 #else 254 int vlan_bytes = 0; 255 #endif 256 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN + vlan_bytes; 257 258 dev->mtu = new_mtu; 259 260 if ((interface < 2) && 261 (cvmx_helper_interface_get_mode(interface) != 262 CVMX_HELPER_INTERFACE_MODE_SPI)) { 263 int index = INDEX(priv->port); 264 /* Add ethernet header and FCS, and VLAN if configured. */ 265 int max_packet = new_mtu + mtu_overhead; 266 267 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || 268 OCTEON_IS_MODEL(OCTEON_CN58XX)) { 269 /* Signal errors on packets larger than the MTU */ 270 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), 271 max_packet); 272 } else { 273 /* 274 * Set the hardware to truncate packets larger 275 * than the MTU and smaller the 64 bytes. 276 */ 277 union cvmx_pip_frm_len_chkx frm_len_chk; 278 279 frm_len_chk.u64 = 0; 280 frm_len_chk.s.minlen = VLAN_ETH_ZLEN; 281 frm_len_chk.s.maxlen = max_packet; 282 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), 283 frm_len_chk.u64); 284 } 285 /* 286 * Set the hardware to truncate packets larger than 287 * the MTU. The jabber register must be set to a 288 * multiple of 8 bytes, so round up. 289 */ 290 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), 291 (max_packet + 7) & ~7u); 292 } 293 return 0; 294 } 295 296 /** 297 * cvm_oct_common_set_multicast_list - set the multicast list 298 * @dev: Device to work on 299 */ 300 static void cvm_oct_common_set_multicast_list(struct net_device *dev) 301 { 302 union cvmx_gmxx_prtx_cfg gmx_cfg; 303 struct octeon_ethernet *priv = netdev_priv(dev); 304 int interface = INTERFACE(priv->port); 305 306 if ((interface < 2) && 307 (cvmx_helper_interface_get_mode(interface) != 308 CVMX_HELPER_INTERFACE_MODE_SPI)) { 309 union cvmx_gmxx_rxx_adr_ctl control; 310 int index = INDEX(priv->port); 311 312 control.u64 = 0; 313 control.s.bcst = 1; /* Allow broadcast MAC addresses */ 314 315 if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) || 316 (dev->flags & IFF_PROMISC)) 317 /* Force accept multicast packets */ 318 control.s.mcst = 2; 319 else 320 /* Force reject multicast packets */ 321 control.s.mcst = 1; 322 323 if (dev->flags & IFF_PROMISC) 324 /* 325 * Reject matches if promisc. Since CAM is 326 * shut off, should accept everything. 327 */ 328 control.s.cam_mode = 0; 329 else 330 /* Filter packets based on the CAM */ 331 control.s.cam_mode = 1; 332 333 gmx_cfg.u64 = 334 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 335 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 336 gmx_cfg.u64 & ~1ull); 337 338 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), 339 control.u64); 340 if (dev->flags & IFF_PROMISC) 341 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN 342 (index, interface), 0); 343 else 344 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN 345 (index, interface), 1); 346 347 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 348 gmx_cfg.u64); 349 } 350 } 351 352 static int cvm_oct_set_mac_filter(struct net_device *dev) 353 { 354 struct octeon_ethernet *priv = netdev_priv(dev); 355 union cvmx_gmxx_prtx_cfg gmx_cfg; 356 int interface = INTERFACE(priv->port); 357 358 if ((interface < 2) && 359 (cvmx_helper_interface_get_mode(interface) != 360 CVMX_HELPER_INTERFACE_MODE_SPI)) { 361 int i; 362 u8 *ptr = dev->dev_addr; 363 u64 mac = 0; 364 int index = INDEX(priv->port); 365 366 for (i = 0; i < 6; i++) 367 mac = (mac << 8) | (u64)ptr[i]; 368 369 gmx_cfg.u64 = 370 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 371 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 372 gmx_cfg.u64 & ~1ull); 373 374 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac); 375 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), 376 ptr[0]); 377 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), 378 ptr[1]); 379 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), 380 ptr[2]); 381 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), 382 ptr[3]); 383 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), 384 ptr[4]); 385 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), 386 ptr[5]); 387 cvm_oct_common_set_multicast_list(dev); 388 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 389 gmx_cfg.u64); 390 } 391 return 0; 392 } 393 394 /** 395 * cvm_oct_common_set_mac_address - set the hardware MAC address for a device 396 * @dev: The device in question. 397 * @addr: Socket address. 398 * 399 * Returns Zero on success 400 */ 401 static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr) 402 { 403 int r = eth_mac_addr(dev, addr); 404 405 if (r) 406 return r; 407 return cvm_oct_set_mac_filter(dev); 408 } 409 410 /** 411 * cvm_oct_common_init - per network device initialization 412 * @dev: Device to initialize 413 * 414 * Returns Zero on success 415 */ 416 int cvm_oct_common_init(struct net_device *dev) 417 { 418 struct octeon_ethernet *priv = netdev_priv(dev); 419 const u8 *mac = NULL; 420 421 if (priv->of_node) 422 mac = of_get_mac_address(priv->of_node); 423 424 if (mac) 425 ether_addr_copy(dev->dev_addr, mac); 426 else 427 eth_hw_addr_random(dev); 428 429 /* 430 * Force the interface to use the POW send if always_use_pow 431 * was specified or it is in the pow send list. 432 */ 433 if ((pow_send_group != -1) && 434 (always_use_pow || strstr(pow_send_list, dev->name))) 435 priv->queue = -1; 436 437 if (priv->queue != -1) 438 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; 439 440 /* We do our own locking, Linux doesn't need to */ 441 dev->features |= NETIF_F_LLTX; 442 dev->ethtool_ops = &cvm_oct_ethtool_ops; 443 444 cvm_oct_set_mac_filter(dev); 445 dev_set_mtu(dev, dev->mtu); 446 447 /* 448 * Zero out stats for port so we won't mistakenly show 449 * counters from the bootloader. 450 */ 451 memset(dev->netdev_ops->ndo_get_stats(dev), 0, 452 sizeof(struct net_device_stats)); 453 454 if (dev->netdev_ops->ndo_stop) 455 dev->netdev_ops->ndo_stop(dev); 456 457 return 0; 458 } 459 460 void cvm_oct_common_uninit(struct net_device *dev) 461 { 462 if (dev->phydev) 463 phy_disconnect(dev->phydev); 464 } 465 466 int cvm_oct_common_open(struct net_device *dev, 467 void (*link_poll)(struct net_device *)) 468 { 469 union cvmx_gmxx_prtx_cfg gmx_cfg; 470 struct octeon_ethernet *priv = netdev_priv(dev); 471 int interface = INTERFACE(priv->port); 472 int index = INDEX(priv->port); 473 cvmx_helper_link_info_t link_info; 474 int rv; 475 476 rv = cvm_oct_phy_setup_device(dev); 477 if (rv) 478 return rv; 479 480 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 481 gmx_cfg.s.en = 1; 482 if (octeon_has_feature(OCTEON_FEATURE_PKND)) 483 gmx_cfg.s.pknd = priv->port; 484 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); 485 486 if (octeon_is_simulation()) 487 return 0; 488 489 if (dev->phydev) { 490 int r = phy_read_status(dev->phydev); 491 492 if (r == 0 && dev->phydev->link == 0) 493 netif_carrier_off(dev); 494 cvm_oct_adjust_link(dev); 495 } else { 496 link_info = cvmx_helper_link_get(priv->port); 497 if (!link_info.s.link_up) 498 netif_carrier_off(dev); 499 priv->poll = link_poll; 500 link_poll(dev); 501 } 502 503 return 0; 504 } 505 506 void cvm_oct_link_poll(struct net_device *dev) 507 { 508 struct octeon_ethernet *priv = netdev_priv(dev); 509 cvmx_helper_link_info_t link_info; 510 511 link_info = cvmx_helper_link_get(priv->port); 512 if (link_info.u64 == priv->link_info) 513 return; 514 515 if (cvmx_helper_link_set(priv->port, link_info)) 516 link_info.u64 = priv->link_info; 517 else 518 priv->link_info = link_info.u64; 519 520 if (link_info.s.link_up) { 521 if (!netif_carrier_ok(dev)) 522 netif_carrier_on(dev); 523 } else if (netif_carrier_ok(dev)) { 524 netif_carrier_off(dev); 525 } 526 cvm_oct_note_carrier(priv, link_info); 527 } 528 529 static int cvm_oct_xaui_open(struct net_device *dev) 530 { 531 return cvm_oct_common_open(dev, cvm_oct_link_poll); 532 } 533 534 static const struct net_device_ops cvm_oct_npi_netdev_ops = { 535 .ndo_init = cvm_oct_common_init, 536 .ndo_uninit = cvm_oct_common_uninit, 537 .ndo_start_xmit = cvm_oct_xmit, 538 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 539 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 540 .ndo_do_ioctl = cvm_oct_ioctl, 541 .ndo_change_mtu = cvm_oct_common_change_mtu, 542 .ndo_get_stats = cvm_oct_common_get_stats, 543 #ifdef CONFIG_NET_POLL_CONTROLLER 544 .ndo_poll_controller = cvm_oct_poll_controller, 545 #endif 546 }; 547 548 static const struct net_device_ops cvm_oct_xaui_netdev_ops = { 549 .ndo_init = cvm_oct_common_init, 550 .ndo_uninit = cvm_oct_common_uninit, 551 .ndo_open = cvm_oct_xaui_open, 552 .ndo_stop = cvm_oct_common_stop, 553 .ndo_start_xmit = cvm_oct_xmit, 554 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 555 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 556 .ndo_do_ioctl = cvm_oct_ioctl, 557 .ndo_change_mtu = cvm_oct_common_change_mtu, 558 .ndo_get_stats = cvm_oct_common_get_stats, 559 #ifdef CONFIG_NET_POLL_CONTROLLER 560 .ndo_poll_controller = cvm_oct_poll_controller, 561 #endif 562 }; 563 564 static const struct net_device_ops cvm_oct_sgmii_netdev_ops = { 565 .ndo_init = cvm_oct_sgmii_init, 566 .ndo_uninit = cvm_oct_common_uninit, 567 .ndo_open = cvm_oct_sgmii_open, 568 .ndo_stop = cvm_oct_common_stop, 569 .ndo_start_xmit = cvm_oct_xmit, 570 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 571 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 572 .ndo_do_ioctl = cvm_oct_ioctl, 573 .ndo_change_mtu = cvm_oct_common_change_mtu, 574 .ndo_get_stats = cvm_oct_common_get_stats, 575 #ifdef CONFIG_NET_POLL_CONTROLLER 576 .ndo_poll_controller = cvm_oct_poll_controller, 577 #endif 578 }; 579 580 static const struct net_device_ops cvm_oct_spi_netdev_ops = { 581 .ndo_init = cvm_oct_spi_init, 582 .ndo_uninit = cvm_oct_spi_uninit, 583 .ndo_start_xmit = cvm_oct_xmit, 584 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 585 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 586 .ndo_do_ioctl = cvm_oct_ioctl, 587 .ndo_change_mtu = cvm_oct_common_change_mtu, 588 .ndo_get_stats = cvm_oct_common_get_stats, 589 #ifdef CONFIG_NET_POLL_CONTROLLER 590 .ndo_poll_controller = cvm_oct_poll_controller, 591 #endif 592 }; 593 594 static const struct net_device_ops cvm_oct_rgmii_netdev_ops = { 595 .ndo_init = cvm_oct_common_init, 596 .ndo_uninit = cvm_oct_common_uninit, 597 .ndo_open = cvm_oct_rgmii_open, 598 .ndo_stop = cvm_oct_common_stop, 599 .ndo_start_xmit = cvm_oct_xmit, 600 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 601 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 602 .ndo_do_ioctl = cvm_oct_ioctl, 603 .ndo_change_mtu = cvm_oct_common_change_mtu, 604 .ndo_get_stats = cvm_oct_common_get_stats, 605 #ifdef CONFIG_NET_POLL_CONTROLLER 606 .ndo_poll_controller = cvm_oct_poll_controller, 607 #endif 608 }; 609 610 static const struct net_device_ops cvm_oct_pow_netdev_ops = { 611 .ndo_init = cvm_oct_common_init, 612 .ndo_start_xmit = cvm_oct_xmit_pow, 613 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 614 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 615 .ndo_do_ioctl = cvm_oct_ioctl, 616 .ndo_change_mtu = cvm_oct_common_change_mtu, 617 .ndo_get_stats = cvm_oct_common_get_stats, 618 #ifdef CONFIG_NET_POLL_CONTROLLER 619 .ndo_poll_controller = cvm_oct_poll_controller, 620 #endif 621 }; 622 623 static struct device_node *cvm_oct_of_get_child 624 (const struct device_node *parent, int reg_val) 625 { 626 struct device_node *node = NULL; 627 int size; 628 const __be32 *addr; 629 630 for (;;) { 631 node = of_get_next_child(parent, node); 632 if (!node) 633 break; 634 addr = of_get_property(node, "reg", &size); 635 if (addr && (be32_to_cpu(*addr) == reg_val)) 636 break; 637 } 638 return node; 639 } 640 641 static struct device_node *cvm_oct_node_for_port(struct device_node *pip, 642 int interface, int port) 643 { 644 struct device_node *ni, *np; 645 646 ni = cvm_oct_of_get_child(pip, interface); 647 if (!ni) 648 return NULL; 649 650 np = cvm_oct_of_get_child(ni, port); 651 of_node_put(ni); 652 653 return np; 654 } 655 656 static void cvm_set_rgmii_delay(struct octeon_ethernet *priv, int iface, 657 int port) 658 { 659 struct device_node *np = priv->of_node; 660 u32 delay_value; 661 bool rx_delay; 662 bool tx_delay; 663 664 /* By default, both RX/TX delay is enabled in 665 * __cvmx_helper_rgmii_enable(). 666 */ 667 rx_delay = true; 668 tx_delay = true; 669 670 if (!of_property_read_u32(np, "rx-delay", &delay_value)) { 671 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value); 672 rx_delay = delay_value > 0; 673 } 674 if (!of_property_read_u32(np, "tx-delay", &delay_value)) { 675 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value); 676 tx_delay = delay_value > 0; 677 } 678 679 if (!rx_delay && !tx_delay) 680 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; 681 else if (!rx_delay) 682 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_RXID; 683 else if (!tx_delay) 684 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_TXID; 685 else 686 priv->phy_mode = PHY_INTERFACE_MODE_RGMII; 687 } 688 689 static int cvm_oct_probe(struct platform_device *pdev) 690 { 691 int num_interfaces; 692 int interface; 693 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; 694 int qos; 695 struct device_node *pip; 696 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN; 697 698 #if IS_ENABLED(CONFIG_VLAN_8021Q) 699 mtu_overhead += VLAN_HLEN; 700 #endif 701 702 octeon_mdiobus_force_mod_depencency(); 703 704 pip = pdev->dev.of_node; 705 if (!pip) { 706 pr_err("Error: No 'pip' in /aliases\n"); 707 return -EINVAL; 708 } 709 710 cvm_oct_configure_common_hw(); 711 712 cvmx_helper_initialize_packet_io_global(); 713 714 if (receive_group_order) { 715 if (receive_group_order > 4) 716 receive_group_order = 4; 717 pow_receive_groups = (1 << (1 << receive_group_order)) - 1; 718 } else { 719 pow_receive_groups = BIT(pow_receive_group); 720 } 721 722 /* Change the input group for all ports before input is enabled */ 723 num_interfaces = cvmx_helper_get_number_of_interfaces(); 724 for (interface = 0; interface < num_interfaces; interface++) { 725 int num_ports = cvmx_helper_ports_on_interface(interface); 726 int port; 727 728 for (port = cvmx_helper_get_ipd_port(interface, 0); 729 port < cvmx_helper_get_ipd_port(interface, num_ports); 730 port++) { 731 union cvmx_pip_prt_tagx pip_prt_tagx; 732 733 pip_prt_tagx.u64 = 734 cvmx_read_csr(CVMX_PIP_PRT_TAGX(port)); 735 736 if (receive_group_order) { 737 int tag_mask; 738 739 /* We support only 16 groups at the moment, so 740 * always disable the two additional "hidden" 741 * tag_mask bits on CN68XX. 742 */ 743 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) 744 pip_prt_tagx.u64 |= 0x3ull << 44; 745 746 tag_mask = ~((1 << receive_group_order) - 1); 747 pip_prt_tagx.s.grptagbase = 0; 748 pip_prt_tagx.s.grptagmask = tag_mask; 749 pip_prt_tagx.s.grptag = 1; 750 pip_prt_tagx.s.tag_mode = 0; 751 pip_prt_tagx.s.inc_prt_flag = 1; 752 pip_prt_tagx.s.ip6_dprt_flag = 1; 753 pip_prt_tagx.s.ip4_dprt_flag = 1; 754 pip_prt_tagx.s.ip6_sprt_flag = 1; 755 pip_prt_tagx.s.ip4_sprt_flag = 1; 756 pip_prt_tagx.s.ip6_dst_flag = 1; 757 pip_prt_tagx.s.ip4_dst_flag = 1; 758 pip_prt_tagx.s.ip6_src_flag = 1; 759 pip_prt_tagx.s.ip4_src_flag = 1; 760 pip_prt_tagx.s.grp = 0; 761 } else { 762 pip_prt_tagx.s.grptag = 0; 763 pip_prt_tagx.s.grp = pow_receive_group; 764 } 765 766 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port), 767 pip_prt_tagx.u64); 768 } 769 } 770 771 cvmx_helper_ipd_and_packet_input_enable(); 772 773 memset(cvm_oct_device, 0, sizeof(cvm_oct_device)); 774 775 /* 776 * Initialize the FAU used for counting packet buffers that 777 * need to be freed. 778 */ 779 cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); 780 781 /* Initialize the FAU used for counting tx SKBs that need to be freed */ 782 cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0); 783 784 if ((pow_send_group != -1)) { 785 struct net_device *dev; 786 787 dev = alloc_etherdev(sizeof(struct octeon_ethernet)); 788 if (dev) { 789 /* Initialize the device private structure. */ 790 struct octeon_ethernet *priv = netdev_priv(dev); 791 792 SET_NETDEV_DEV(dev, &pdev->dev); 793 dev->netdev_ops = &cvm_oct_pow_netdev_ops; 794 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; 795 priv->port = CVMX_PIP_NUM_INPUT_PORTS; 796 priv->queue = -1; 797 strcpy(dev->name, "pow%d"); 798 for (qos = 0; qos < 16; qos++) 799 skb_queue_head_init(&priv->tx_free_list[qos]); 800 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead; 801 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead; 802 803 if (register_netdev(dev) < 0) { 804 pr_err("Failed to register ethernet device for POW\n"); 805 free_netdev(dev); 806 } else { 807 cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev; 808 pr_info("%s: POW send group %d, receive group %d\n", 809 dev->name, pow_send_group, 810 pow_receive_group); 811 } 812 } else { 813 pr_err("Failed to allocate ethernet device for POW\n"); 814 } 815 } 816 817 num_interfaces = cvmx_helper_get_number_of_interfaces(); 818 for (interface = 0; interface < num_interfaces; interface++) { 819 cvmx_helper_interface_mode_t imode = 820 cvmx_helper_interface_get_mode(interface); 821 int num_ports = cvmx_helper_ports_on_interface(interface); 822 int port; 823 int port_index; 824 825 for (port_index = 0, 826 port = cvmx_helper_get_ipd_port(interface, 0); 827 port < cvmx_helper_get_ipd_port(interface, num_ports); 828 port_index++, port++) { 829 struct octeon_ethernet *priv; 830 struct net_device *dev = 831 alloc_etherdev(sizeof(struct octeon_ethernet)); 832 if (!dev) { 833 pr_err("Failed to allocate ethernet device for port %d\n", 834 port); 835 continue; 836 } 837 838 /* Initialize the device private structure. */ 839 SET_NETDEV_DEV(dev, &pdev->dev); 840 priv = netdev_priv(dev); 841 priv->netdev = dev; 842 priv->of_node = cvm_oct_node_for_port(pip, interface, 843 port_index); 844 845 INIT_DELAYED_WORK(&priv->port_periodic_work, 846 cvm_oct_periodic_worker); 847 priv->imode = imode; 848 priv->port = port; 849 priv->queue = cvmx_pko_get_base_queue(priv->port); 850 priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; 851 priv->phy_mode = PHY_INTERFACE_MODE_NA; 852 for (qos = 0; qos < 16; qos++) 853 skb_queue_head_init(&priv->tx_free_list[qos]); 854 for (qos = 0; qos < cvmx_pko_get_num_queues(port); 855 qos++) 856 cvmx_fau_atomic_write32(priv->fau + qos * 4, 0); 857 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead; 858 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead; 859 860 switch (priv->imode) { 861 /* These types don't support ports to IPD/PKO */ 862 case CVMX_HELPER_INTERFACE_MODE_DISABLED: 863 case CVMX_HELPER_INTERFACE_MODE_PCIE: 864 case CVMX_HELPER_INTERFACE_MODE_PICMG: 865 break; 866 867 case CVMX_HELPER_INTERFACE_MODE_NPI: 868 dev->netdev_ops = &cvm_oct_npi_netdev_ops; 869 strcpy(dev->name, "npi%d"); 870 break; 871 872 case CVMX_HELPER_INTERFACE_MODE_XAUI: 873 dev->netdev_ops = &cvm_oct_xaui_netdev_ops; 874 strcpy(dev->name, "xaui%d"); 875 break; 876 877 case CVMX_HELPER_INTERFACE_MODE_LOOP: 878 dev->netdev_ops = &cvm_oct_npi_netdev_ops; 879 strcpy(dev->name, "loop%d"); 880 break; 881 882 case CVMX_HELPER_INTERFACE_MODE_SGMII: 883 priv->phy_mode = PHY_INTERFACE_MODE_SGMII; 884 dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; 885 strcpy(dev->name, "eth%d"); 886 break; 887 888 case CVMX_HELPER_INTERFACE_MODE_SPI: 889 dev->netdev_ops = &cvm_oct_spi_netdev_ops; 890 strcpy(dev->name, "spi%d"); 891 break; 892 893 case CVMX_HELPER_INTERFACE_MODE_GMII: 894 priv->phy_mode = PHY_INTERFACE_MODE_GMII; 895 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; 896 strcpy(dev->name, "eth%d"); 897 break; 898 899 case CVMX_HELPER_INTERFACE_MODE_RGMII: 900 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; 901 strcpy(dev->name, "eth%d"); 902 cvm_set_rgmii_delay(priv, interface, 903 port_index); 904 break; 905 } 906 907 if (!dev->netdev_ops) { 908 free_netdev(dev); 909 } else if (register_netdev(dev) < 0) { 910 pr_err("Failed to register ethernet device for interface %d, port %d\n", 911 interface, priv->port); 912 free_netdev(dev); 913 } else { 914 cvm_oct_device[priv->port] = dev; 915 fau -= 916 cvmx_pko_get_num_queues(priv->port) * 917 sizeof(u32); 918 schedule_delayed_work(&priv->port_periodic_work, 919 HZ); 920 } 921 } 922 } 923 924 cvm_oct_tx_initialize(); 925 cvm_oct_rx_initialize(); 926 927 /* 928 * 150 uS: about 10 1500-byte packets at 1GE. 929 */ 930 cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000); 931 932 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ); 933 934 return 0; 935 } 936 937 static int cvm_oct_remove(struct platform_device *pdev) 938 { 939 int port; 940 941 cvmx_ipd_disable(); 942 943 atomic_inc_return(&cvm_oct_poll_queue_stopping); 944 cancel_delayed_work_sync(&cvm_oct_rx_refill_work); 945 946 cvm_oct_rx_shutdown(); 947 cvm_oct_tx_shutdown(); 948 949 cvmx_pko_disable(); 950 951 /* Free the ethernet devices */ 952 for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) { 953 if (cvm_oct_device[port]) { 954 struct net_device *dev = cvm_oct_device[port]; 955 struct octeon_ethernet *priv = netdev_priv(dev); 956 957 cancel_delayed_work_sync(&priv->port_periodic_work); 958 959 cvm_oct_tx_shutdown_dev(dev); 960 unregister_netdev(dev); 961 free_netdev(dev); 962 cvm_oct_device[port] = NULL; 963 } 964 } 965 966 cvmx_pko_shutdown(); 967 968 cvmx_ipd_free_ptr(); 969 970 /* Free the HW pools */ 971 cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, 972 num_packet_buffers); 973 cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, 974 num_packet_buffers); 975 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) 976 cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, 977 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128); 978 return 0; 979 } 980 981 static const struct of_device_id cvm_oct_match[] = { 982 { 983 .compatible = "cavium,octeon-3860-pip", 984 }, 985 {}, 986 }; 987 MODULE_DEVICE_TABLE(of, cvm_oct_match); 988 989 static struct platform_driver cvm_oct_driver = { 990 .probe = cvm_oct_probe, 991 .remove = cvm_oct_remove, 992 .driver = { 993 .name = KBUILD_MODNAME, 994 .of_match_table = cvm_oct_match, 995 }, 996 }; 997 998 module_platform_driver(cvm_oct_driver); 999 1000 MODULE_LICENSE("GPL"); 1001 MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>"); 1002 MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver."); 1003