1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * This file is based on code from OCTEON SDK by Cavium Networks. 4 * 5 * Copyright (c) 2003-2007 Cavium Networks 6 */ 7 8 #include <linux/platform_device.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/netdevice.h> 12 #include <linux/etherdevice.h> 13 #include <linux/phy.h> 14 #include <linux/slab.h> 15 #include <linux/interrupt.h> 16 #include <linux/of_mdio.h> 17 #include <linux/of_net.h> 18 #include <linux/if_ether.h> 19 #include <linux/if_vlan.h> 20 21 #include <net/dst.h> 22 23 #include "octeon-ethernet.h" 24 #include "ethernet-defines.h" 25 #include "ethernet-mem.h" 26 #include "ethernet-rx.h" 27 #include "ethernet-tx.h" 28 #include "ethernet-mdio.h" 29 #include "ethernet-util.h" 30 31 #define OCTEON_MAX_MTU 65392 32 33 static int num_packet_buffers = 1024; 34 module_param(num_packet_buffers, int, 0444); 35 MODULE_PARM_DESC(num_packet_buffers, "\n" 36 "\tNumber of packet buffers to allocate and store in the\n" 37 "\tFPA. By default, 1024 packet buffers are used.\n"); 38 39 static int pow_receive_group = 15; 40 module_param(pow_receive_group, int, 0444); 41 MODULE_PARM_DESC(pow_receive_group, "\n" 42 "\tPOW group to receive packets from. All ethernet hardware\n" 43 "\twill be configured to send incoming packets to this POW\n" 44 "\tgroup. Also any other software can submit packets to this\n" 45 "\tgroup for the kernel to process."); 46 47 static int receive_group_order; 48 module_param(receive_group_order, int, 0444); 49 MODULE_PARM_DESC(receive_group_order, "\n" 50 "\tOrder (0..4) of receive groups to take into use. Ethernet hardware\n" 51 "\twill be configured to send incoming packets to multiple POW\n" 52 "\tgroups. pow_receive_group parameter is ignored when multiple\n" 53 "\tgroups are taken into use and groups are allocated starting\n" 54 "\tfrom 0. By default, a single group is used.\n"); 55 56 int pow_send_group = -1; 57 module_param(pow_send_group, int, 0644); 58 MODULE_PARM_DESC(pow_send_group, "\n" 59 "\tPOW group to send packets to other software on. This\n" 60 "\tcontrols the creation of the virtual device pow0.\n" 61 "\talways_use_pow also depends on this value."); 62 63 int always_use_pow; 64 module_param(always_use_pow, int, 0444); 65 MODULE_PARM_DESC(always_use_pow, "\n" 66 "\tWhen set, always send to the pow group. This will cause\n" 67 "\tpackets sent to real ethernet devices to be sent to the\n" 68 "\tPOW group instead of the hardware. Unless some other\n" 69 "\tapplication changes the config, packets will still be\n" 70 "\treceived from the low level hardware. Use this option\n" 71 "\tto allow a CVMX app to intercept all packets from the\n" 72 "\tlinux kernel. You must specify pow_send_group along with\n" 73 "\tthis option."); 74 75 char pow_send_list[128] = ""; 76 module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444); 77 MODULE_PARM_DESC(pow_send_list, "\n" 78 "\tComma separated list of ethernet devices that should use the\n" 79 "\tPOW for transmit instead of the actual ethernet hardware. This\n" 80 "\tis a per port version of always_use_pow. always_use_pow takes\n" 81 "\tprecedence over this list. For example, setting this to\n" 82 "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n" 83 "\tusing the pow_send_group."); 84 85 int rx_napi_weight = 32; 86 module_param(rx_napi_weight, int, 0444); 87 MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter."); 88 89 /* Mask indicating which receive groups are in use. */ 90 int pow_receive_groups; 91 92 /* 93 * cvm_oct_poll_queue_stopping - flag to indicate polling should stop. 94 * 95 * Set to one right before cvm_oct_poll_queue is destroyed. 96 */ 97 atomic_t cvm_oct_poll_queue_stopping = ATOMIC_INIT(0); 98 99 /* 100 * Array of every ethernet device owned by this driver indexed by 101 * the ipd input port number. 102 */ 103 struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; 104 105 u64 cvm_oct_tx_poll_interval; 106 107 static void cvm_oct_rx_refill_worker(struct work_struct *work); 108 static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker); 109 110 static void cvm_oct_rx_refill_worker(struct work_struct *work) 111 { 112 /* 113 * FPA 0 may have been drained, try to refill it if we need 114 * more than num_packet_buffers / 2, otherwise normal receive 115 * processing will refill it. If it were drained, no packets 116 * could be received so cvm_oct_napi_poll would never be 117 * invoked to do the refill. 118 */ 119 cvm_oct_rx_refill_pool(num_packet_buffers / 2); 120 121 if (!atomic_read(&cvm_oct_poll_queue_stopping)) 122 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ); 123 } 124 125 static void cvm_oct_periodic_worker(struct work_struct *work) 126 { 127 struct octeon_ethernet *priv = container_of(work, 128 struct octeon_ethernet, 129 port_periodic_work.work); 130 131 if (priv->poll) 132 priv->poll(cvm_oct_device[priv->port]); 133 134 cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats 135 (cvm_oct_device[priv->port]); 136 137 if (!atomic_read(&cvm_oct_poll_queue_stopping)) 138 schedule_delayed_work(&priv->port_periodic_work, HZ); 139 } 140 141 static void cvm_oct_configure_common_hw(void) 142 { 143 /* Setup the FPA */ 144 cvmx_fpa_enable(); 145 cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, 146 num_packet_buffers); 147 cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, 148 num_packet_buffers); 149 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) 150 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, 151 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 1024); 152 153 #ifdef __LITTLE_ENDIAN 154 { 155 union cvmx_ipd_ctl_status ipd_ctl_status; 156 157 ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS); 158 ipd_ctl_status.s.pkt_lend = 1; 159 ipd_ctl_status.s.wqe_lend = 1; 160 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64); 161 } 162 #endif 163 164 cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8); 165 } 166 167 /** 168 * cvm_oct_free_work- Free a work queue entry 169 * 170 * @work_queue_entry: Work queue entry to free 171 * 172 * Returns Zero on success, Negative on failure. 173 */ 174 int cvm_oct_free_work(void *work_queue_entry) 175 { 176 struct cvmx_wqe *work = work_queue_entry; 177 178 int segments = work->word2.s.bufs; 179 union cvmx_buf_ptr segment_ptr = work->packet_ptr; 180 181 while (segments--) { 182 union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *) 183 cvmx_phys_to_ptr(segment_ptr.s.addr - 8); 184 if (unlikely(!segment_ptr.s.i)) 185 cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), 186 segment_ptr.s.pool, 187 CVMX_FPA_PACKET_POOL_SIZE / 128); 188 segment_ptr = next_ptr; 189 } 190 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1); 191 192 return 0; 193 } 194 EXPORT_SYMBOL(cvm_oct_free_work); 195 196 /** 197 * cvm_oct_common_get_stats - get the low level ethernet statistics 198 * @dev: Device to get the statistics from 199 * 200 * Returns Pointer to the statistics 201 */ 202 static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev) 203 { 204 cvmx_pip_port_status_t rx_status; 205 cvmx_pko_port_status_t tx_status; 206 struct octeon_ethernet *priv = netdev_priv(dev); 207 208 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) { 209 if (octeon_is_simulation()) { 210 /* The simulator doesn't support statistics */ 211 memset(&rx_status, 0, sizeof(rx_status)); 212 memset(&tx_status, 0, sizeof(tx_status)); 213 } else { 214 cvmx_pip_get_port_status(priv->port, 1, &rx_status); 215 cvmx_pko_get_port_status(priv->port, 1, &tx_status); 216 } 217 218 dev->stats.rx_packets += rx_status.inb_packets; 219 dev->stats.tx_packets += tx_status.packets; 220 dev->stats.rx_bytes += rx_status.inb_octets; 221 dev->stats.tx_bytes += tx_status.octets; 222 dev->stats.multicast += rx_status.multicast_packets; 223 dev->stats.rx_crc_errors += rx_status.inb_errors; 224 dev->stats.rx_frame_errors += rx_status.fcs_align_err_packets; 225 dev->stats.rx_dropped += rx_status.dropped_packets; 226 } 227 228 return &dev->stats; 229 } 230 231 /** 232 * cvm_oct_common_change_mtu - change the link MTU 233 * @dev: Device to change 234 * @new_mtu: The new MTU 235 * 236 * Returns Zero on success 237 */ 238 static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu) 239 { 240 struct octeon_ethernet *priv = netdev_priv(dev); 241 int interface = INTERFACE(priv->port); 242 #if IS_ENABLED(CONFIG_VLAN_8021Q) 243 int vlan_bytes = VLAN_HLEN; 244 #else 245 int vlan_bytes = 0; 246 #endif 247 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN + vlan_bytes; 248 249 dev->mtu = new_mtu; 250 251 if ((interface < 2) && 252 (cvmx_helper_interface_get_mode(interface) != 253 CVMX_HELPER_INTERFACE_MODE_SPI)) { 254 int index = INDEX(priv->port); 255 /* Add ethernet header and FCS, and VLAN if configured. */ 256 int max_packet = new_mtu + mtu_overhead; 257 258 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || 259 OCTEON_IS_MODEL(OCTEON_CN58XX)) { 260 /* Signal errors on packets larger than the MTU */ 261 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), 262 max_packet); 263 } else { 264 /* 265 * Set the hardware to truncate packets larger 266 * than the MTU and smaller the 64 bytes. 267 */ 268 union cvmx_pip_frm_len_chkx frm_len_chk; 269 270 frm_len_chk.u64 = 0; 271 frm_len_chk.s.minlen = VLAN_ETH_ZLEN; 272 frm_len_chk.s.maxlen = max_packet; 273 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), 274 frm_len_chk.u64); 275 } 276 /* 277 * Set the hardware to truncate packets larger than 278 * the MTU. The jabber register must be set to a 279 * multiple of 8 bytes, so round up. 280 */ 281 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), 282 (max_packet + 7) & ~7u); 283 } 284 return 0; 285 } 286 287 /** 288 * cvm_oct_common_set_multicast_list - set the multicast list 289 * @dev: Device to work on 290 */ 291 static void cvm_oct_common_set_multicast_list(struct net_device *dev) 292 { 293 union cvmx_gmxx_prtx_cfg gmx_cfg; 294 struct octeon_ethernet *priv = netdev_priv(dev); 295 int interface = INTERFACE(priv->port); 296 297 if ((interface < 2) && 298 (cvmx_helper_interface_get_mode(interface) != 299 CVMX_HELPER_INTERFACE_MODE_SPI)) { 300 union cvmx_gmxx_rxx_adr_ctl control; 301 int index = INDEX(priv->port); 302 303 control.u64 = 0; 304 control.s.bcst = 1; /* Allow broadcast MAC addresses */ 305 306 if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) || 307 (dev->flags & IFF_PROMISC)) 308 /* Force accept multicast packets */ 309 control.s.mcst = 2; 310 else 311 /* Force reject multicast packets */ 312 control.s.mcst = 1; 313 314 if (dev->flags & IFF_PROMISC) 315 /* 316 * Reject matches if promisc. Since CAM is 317 * shut off, should accept everything. 318 */ 319 control.s.cam_mode = 0; 320 else 321 /* Filter packets based on the CAM */ 322 control.s.cam_mode = 1; 323 324 gmx_cfg.u64 = 325 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 326 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 327 gmx_cfg.u64 & ~1ull); 328 329 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), 330 control.u64); 331 if (dev->flags & IFF_PROMISC) 332 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN 333 (index, interface), 0); 334 else 335 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN 336 (index, interface), 1); 337 338 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 339 gmx_cfg.u64); 340 } 341 } 342 343 static int cvm_oct_set_mac_filter(struct net_device *dev) 344 { 345 struct octeon_ethernet *priv = netdev_priv(dev); 346 union cvmx_gmxx_prtx_cfg gmx_cfg; 347 int interface = INTERFACE(priv->port); 348 349 if ((interface < 2) && 350 (cvmx_helper_interface_get_mode(interface) != 351 CVMX_HELPER_INTERFACE_MODE_SPI)) { 352 int i; 353 u8 *ptr = dev->dev_addr; 354 u64 mac = 0; 355 int index = INDEX(priv->port); 356 357 for (i = 0; i < 6; i++) 358 mac = (mac << 8) | (u64)ptr[i]; 359 360 gmx_cfg.u64 = 361 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 362 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 363 gmx_cfg.u64 & ~1ull); 364 365 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac); 366 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), 367 ptr[0]); 368 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), 369 ptr[1]); 370 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), 371 ptr[2]); 372 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), 373 ptr[3]); 374 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), 375 ptr[4]); 376 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), 377 ptr[5]); 378 cvm_oct_common_set_multicast_list(dev); 379 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), 380 gmx_cfg.u64); 381 } 382 return 0; 383 } 384 385 /** 386 * cvm_oct_common_set_mac_address - set the hardware MAC address for a device 387 * @dev: The device in question. 388 * @addr: Socket address. 389 * 390 * Returns Zero on success 391 */ 392 static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr) 393 { 394 int r = eth_mac_addr(dev, addr); 395 396 if (r) 397 return r; 398 return cvm_oct_set_mac_filter(dev); 399 } 400 401 /** 402 * cvm_oct_common_init - per network device initialization 403 * @dev: Device to initialize 404 * 405 * Returns Zero on success 406 */ 407 int cvm_oct_common_init(struct net_device *dev) 408 { 409 struct octeon_ethernet *priv = netdev_priv(dev); 410 const u8 *mac = NULL; 411 412 if (priv->of_node) 413 mac = of_get_mac_address(priv->of_node); 414 415 if (!IS_ERR_OR_NULL(mac)) 416 ether_addr_copy(dev->dev_addr, mac); 417 else 418 eth_hw_addr_random(dev); 419 420 /* 421 * Force the interface to use the POW send if always_use_pow 422 * was specified or it is in the pow send list. 423 */ 424 if ((pow_send_group != -1) && 425 (always_use_pow || strstr(pow_send_list, dev->name))) 426 priv->queue = -1; 427 428 if (priv->queue != -1) 429 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; 430 431 /* We do our own locking, Linux doesn't need to */ 432 dev->features |= NETIF_F_LLTX; 433 dev->ethtool_ops = &cvm_oct_ethtool_ops; 434 435 cvm_oct_set_mac_filter(dev); 436 dev_set_mtu(dev, dev->mtu); 437 438 /* 439 * Zero out stats for port so we won't mistakenly show 440 * counters from the bootloader. 441 */ 442 memset(dev->netdev_ops->ndo_get_stats(dev), 0, 443 sizeof(struct net_device_stats)); 444 445 if (dev->netdev_ops->ndo_stop) 446 dev->netdev_ops->ndo_stop(dev); 447 448 return 0; 449 } 450 451 void cvm_oct_common_uninit(struct net_device *dev) 452 { 453 if (dev->phydev) 454 phy_disconnect(dev->phydev); 455 } 456 457 int cvm_oct_common_open(struct net_device *dev, 458 void (*link_poll)(struct net_device *)) 459 { 460 union cvmx_gmxx_prtx_cfg gmx_cfg; 461 struct octeon_ethernet *priv = netdev_priv(dev); 462 int interface = INTERFACE(priv->port); 463 int index = INDEX(priv->port); 464 union cvmx_helper_link_info link_info; 465 int rv; 466 467 rv = cvm_oct_phy_setup_device(dev); 468 if (rv) 469 return rv; 470 471 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); 472 gmx_cfg.s.en = 1; 473 if (octeon_has_feature(OCTEON_FEATURE_PKND)) 474 gmx_cfg.s.pknd = priv->port; 475 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); 476 477 if (octeon_is_simulation()) 478 return 0; 479 480 if (dev->phydev) { 481 int r = phy_read_status(dev->phydev); 482 483 if (r == 0 && dev->phydev->link == 0) 484 netif_carrier_off(dev); 485 cvm_oct_adjust_link(dev); 486 } else { 487 link_info = cvmx_helper_link_get(priv->port); 488 if (!link_info.s.link_up) 489 netif_carrier_off(dev); 490 priv->poll = link_poll; 491 link_poll(dev); 492 } 493 494 return 0; 495 } 496 497 void cvm_oct_link_poll(struct net_device *dev) 498 { 499 struct octeon_ethernet *priv = netdev_priv(dev); 500 union cvmx_helper_link_info link_info; 501 502 link_info = cvmx_helper_link_get(priv->port); 503 if (link_info.u64 == priv->link_info) 504 return; 505 506 if (cvmx_helper_link_set(priv->port, link_info)) 507 link_info.u64 = priv->link_info; 508 else 509 priv->link_info = link_info.u64; 510 511 if (link_info.s.link_up) { 512 if (!netif_carrier_ok(dev)) 513 netif_carrier_on(dev); 514 } else if (netif_carrier_ok(dev)) { 515 netif_carrier_off(dev); 516 } 517 cvm_oct_note_carrier(priv, link_info); 518 } 519 520 static int cvm_oct_xaui_open(struct net_device *dev) 521 { 522 return cvm_oct_common_open(dev, cvm_oct_link_poll); 523 } 524 525 static const struct net_device_ops cvm_oct_npi_netdev_ops = { 526 .ndo_init = cvm_oct_common_init, 527 .ndo_uninit = cvm_oct_common_uninit, 528 .ndo_start_xmit = cvm_oct_xmit, 529 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 530 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 531 .ndo_do_ioctl = cvm_oct_ioctl, 532 .ndo_change_mtu = cvm_oct_common_change_mtu, 533 .ndo_get_stats = cvm_oct_common_get_stats, 534 #ifdef CONFIG_NET_POLL_CONTROLLER 535 .ndo_poll_controller = cvm_oct_poll_controller, 536 #endif 537 }; 538 539 static const struct net_device_ops cvm_oct_xaui_netdev_ops = { 540 .ndo_init = cvm_oct_common_init, 541 .ndo_uninit = cvm_oct_common_uninit, 542 .ndo_open = cvm_oct_xaui_open, 543 .ndo_stop = cvm_oct_common_stop, 544 .ndo_start_xmit = cvm_oct_xmit, 545 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 546 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 547 .ndo_do_ioctl = cvm_oct_ioctl, 548 .ndo_change_mtu = cvm_oct_common_change_mtu, 549 .ndo_get_stats = cvm_oct_common_get_stats, 550 #ifdef CONFIG_NET_POLL_CONTROLLER 551 .ndo_poll_controller = cvm_oct_poll_controller, 552 #endif 553 }; 554 555 static const struct net_device_ops cvm_oct_sgmii_netdev_ops = { 556 .ndo_init = cvm_oct_sgmii_init, 557 .ndo_uninit = cvm_oct_common_uninit, 558 .ndo_open = cvm_oct_sgmii_open, 559 .ndo_stop = cvm_oct_common_stop, 560 .ndo_start_xmit = cvm_oct_xmit, 561 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 562 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 563 .ndo_do_ioctl = cvm_oct_ioctl, 564 .ndo_change_mtu = cvm_oct_common_change_mtu, 565 .ndo_get_stats = cvm_oct_common_get_stats, 566 #ifdef CONFIG_NET_POLL_CONTROLLER 567 .ndo_poll_controller = cvm_oct_poll_controller, 568 #endif 569 }; 570 571 static const struct net_device_ops cvm_oct_spi_netdev_ops = { 572 .ndo_init = cvm_oct_spi_init, 573 .ndo_uninit = cvm_oct_spi_uninit, 574 .ndo_start_xmit = cvm_oct_xmit, 575 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 576 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 577 .ndo_do_ioctl = cvm_oct_ioctl, 578 .ndo_change_mtu = cvm_oct_common_change_mtu, 579 .ndo_get_stats = cvm_oct_common_get_stats, 580 #ifdef CONFIG_NET_POLL_CONTROLLER 581 .ndo_poll_controller = cvm_oct_poll_controller, 582 #endif 583 }; 584 585 static const struct net_device_ops cvm_oct_rgmii_netdev_ops = { 586 .ndo_init = cvm_oct_common_init, 587 .ndo_uninit = cvm_oct_common_uninit, 588 .ndo_open = cvm_oct_rgmii_open, 589 .ndo_stop = cvm_oct_common_stop, 590 .ndo_start_xmit = cvm_oct_xmit, 591 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 592 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 593 .ndo_do_ioctl = cvm_oct_ioctl, 594 .ndo_change_mtu = cvm_oct_common_change_mtu, 595 .ndo_get_stats = cvm_oct_common_get_stats, 596 #ifdef CONFIG_NET_POLL_CONTROLLER 597 .ndo_poll_controller = cvm_oct_poll_controller, 598 #endif 599 }; 600 601 static const struct net_device_ops cvm_oct_pow_netdev_ops = { 602 .ndo_init = cvm_oct_common_init, 603 .ndo_start_xmit = cvm_oct_xmit_pow, 604 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list, 605 .ndo_set_mac_address = cvm_oct_common_set_mac_address, 606 .ndo_do_ioctl = cvm_oct_ioctl, 607 .ndo_change_mtu = cvm_oct_common_change_mtu, 608 .ndo_get_stats = cvm_oct_common_get_stats, 609 #ifdef CONFIG_NET_POLL_CONTROLLER 610 .ndo_poll_controller = cvm_oct_poll_controller, 611 #endif 612 }; 613 614 static struct device_node *cvm_oct_of_get_child 615 (const struct device_node *parent, int reg_val) 616 { 617 struct device_node *node = NULL; 618 int size; 619 const __be32 *addr; 620 621 for (;;) { 622 node = of_get_next_child(parent, node); 623 if (!node) 624 break; 625 addr = of_get_property(node, "reg", &size); 626 if (addr && (be32_to_cpu(*addr) == reg_val)) 627 break; 628 } 629 return node; 630 } 631 632 static struct device_node *cvm_oct_node_for_port(struct device_node *pip, 633 int interface, int port) 634 { 635 struct device_node *ni, *np; 636 637 ni = cvm_oct_of_get_child(pip, interface); 638 if (!ni) 639 return NULL; 640 641 np = cvm_oct_of_get_child(ni, port); 642 of_node_put(ni); 643 644 return np; 645 } 646 647 static void cvm_set_rgmii_delay(struct octeon_ethernet *priv, int iface, 648 int port) 649 { 650 struct device_node *np = priv->of_node; 651 u32 delay_value; 652 bool rx_delay; 653 bool tx_delay; 654 655 /* By default, both RX/TX delay is enabled in 656 * __cvmx_helper_rgmii_enable(). 657 */ 658 rx_delay = true; 659 tx_delay = true; 660 661 if (!of_property_read_u32(np, "rx-delay", &delay_value)) { 662 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value); 663 rx_delay = delay_value > 0; 664 } 665 if (!of_property_read_u32(np, "tx-delay", &delay_value)) { 666 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value); 667 tx_delay = delay_value > 0; 668 } 669 670 if (!rx_delay && !tx_delay) 671 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; 672 else if (!rx_delay) 673 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_RXID; 674 else if (!tx_delay) 675 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_TXID; 676 else 677 priv->phy_mode = PHY_INTERFACE_MODE_RGMII; 678 } 679 680 static int cvm_oct_probe(struct platform_device *pdev) 681 { 682 int num_interfaces; 683 int interface; 684 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; 685 int qos; 686 struct device_node *pip; 687 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN; 688 689 #if IS_ENABLED(CONFIG_VLAN_8021Q) 690 mtu_overhead += VLAN_HLEN; 691 #endif 692 693 pip = pdev->dev.of_node; 694 if (!pip) { 695 pr_err("Error: No 'pip' in /aliases\n"); 696 return -EINVAL; 697 } 698 699 cvm_oct_configure_common_hw(); 700 701 cvmx_helper_initialize_packet_io_global(); 702 703 if (receive_group_order) { 704 if (receive_group_order > 4) 705 receive_group_order = 4; 706 pow_receive_groups = (1 << (1 << receive_group_order)) - 1; 707 } else { 708 pow_receive_groups = BIT(pow_receive_group); 709 } 710 711 /* Change the input group for all ports before input is enabled */ 712 num_interfaces = cvmx_helper_get_number_of_interfaces(); 713 for (interface = 0; interface < num_interfaces; interface++) { 714 int num_ports = cvmx_helper_ports_on_interface(interface); 715 int port; 716 717 for (port = cvmx_helper_get_ipd_port(interface, 0); 718 port < cvmx_helper_get_ipd_port(interface, num_ports); 719 port++) { 720 union cvmx_pip_prt_tagx pip_prt_tagx; 721 722 pip_prt_tagx.u64 = 723 cvmx_read_csr(CVMX_PIP_PRT_TAGX(port)); 724 725 if (receive_group_order) { 726 int tag_mask; 727 728 /* We support only 16 groups at the moment, so 729 * always disable the two additional "hidden" 730 * tag_mask bits on CN68XX. 731 */ 732 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) 733 pip_prt_tagx.u64 |= 0x3ull << 44; 734 735 tag_mask = ~((1 << receive_group_order) - 1); 736 pip_prt_tagx.s.grptagbase = 0; 737 pip_prt_tagx.s.grptagmask = tag_mask; 738 pip_prt_tagx.s.grptag = 1; 739 pip_prt_tagx.s.tag_mode = 0; 740 pip_prt_tagx.s.inc_prt_flag = 1; 741 pip_prt_tagx.s.ip6_dprt_flag = 1; 742 pip_prt_tagx.s.ip4_dprt_flag = 1; 743 pip_prt_tagx.s.ip6_sprt_flag = 1; 744 pip_prt_tagx.s.ip4_sprt_flag = 1; 745 pip_prt_tagx.s.ip6_dst_flag = 1; 746 pip_prt_tagx.s.ip4_dst_flag = 1; 747 pip_prt_tagx.s.ip6_src_flag = 1; 748 pip_prt_tagx.s.ip4_src_flag = 1; 749 pip_prt_tagx.s.grp = 0; 750 } else { 751 pip_prt_tagx.s.grptag = 0; 752 pip_prt_tagx.s.grp = pow_receive_group; 753 } 754 755 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port), 756 pip_prt_tagx.u64); 757 } 758 } 759 760 cvmx_helper_ipd_and_packet_input_enable(); 761 762 memset(cvm_oct_device, 0, sizeof(cvm_oct_device)); 763 764 /* 765 * Initialize the FAU used for counting packet buffers that 766 * need to be freed. 767 */ 768 cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); 769 770 /* Initialize the FAU used for counting tx SKBs that need to be freed */ 771 cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0); 772 773 if ((pow_send_group != -1)) { 774 struct net_device *dev; 775 776 dev = alloc_etherdev(sizeof(struct octeon_ethernet)); 777 if (dev) { 778 /* Initialize the device private structure. */ 779 struct octeon_ethernet *priv = netdev_priv(dev); 780 781 SET_NETDEV_DEV(dev, &pdev->dev); 782 dev->netdev_ops = &cvm_oct_pow_netdev_ops; 783 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; 784 priv->port = CVMX_PIP_NUM_INPUT_PORTS; 785 priv->queue = -1; 786 strscpy(dev->name, "pow%d", sizeof(dev->name)); 787 for (qos = 0; qos < 16; qos++) 788 skb_queue_head_init(&priv->tx_free_list[qos]); 789 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead; 790 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead; 791 792 if (register_netdev(dev) < 0) { 793 pr_err("Failed to register ethernet device for POW\n"); 794 free_netdev(dev); 795 } else { 796 cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev; 797 pr_info("%s: POW send group %d, receive group %d\n", 798 dev->name, pow_send_group, 799 pow_receive_group); 800 } 801 } else { 802 pr_err("Failed to allocate ethernet device for POW\n"); 803 } 804 } 805 806 num_interfaces = cvmx_helper_get_number_of_interfaces(); 807 for (interface = 0; interface < num_interfaces; interface++) { 808 cvmx_helper_interface_mode_t imode = 809 cvmx_helper_interface_get_mode(interface); 810 int num_ports = cvmx_helper_ports_on_interface(interface); 811 int port; 812 int port_index; 813 814 for (port_index = 0, 815 port = cvmx_helper_get_ipd_port(interface, 0); 816 port < cvmx_helper_get_ipd_port(interface, num_ports); 817 port_index++, port++) { 818 struct octeon_ethernet *priv; 819 struct net_device *dev = 820 alloc_etherdev(sizeof(struct octeon_ethernet)); 821 if (!dev) { 822 pr_err("Failed to allocate ethernet device for port %d\n", 823 port); 824 continue; 825 } 826 827 /* Initialize the device private structure. */ 828 SET_NETDEV_DEV(dev, &pdev->dev); 829 priv = netdev_priv(dev); 830 priv->netdev = dev; 831 priv->of_node = cvm_oct_node_for_port(pip, interface, 832 port_index); 833 834 INIT_DELAYED_WORK(&priv->port_periodic_work, 835 cvm_oct_periodic_worker); 836 priv->imode = imode; 837 priv->port = port; 838 priv->queue = cvmx_pko_get_base_queue(priv->port); 839 priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; 840 priv->phy_mode = PHY_INTERFACE_MODE_NA; 841 for (qos = 0; qos < 16; qos++) 842 skb_queue_head_init(&priv->tx_free_list[qos]); 843 for (qos = 0; qos < cvmx_pko_get_num_queues(port); 844 qos++) 845 cvmx_fau_atomic_write32(priv->fau + qos * 4, 0); 846 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead; 847 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead; 848 849 switch (priv->imode) { 850 /* These types don't support ports to IPD/PKO */ 851 case CVMX_HELPER_INTERFACE_MODE_DISABLED: 852 case CVMX_HELPER_INTERFACE_MODE_PCIE: 853 case CVMX_HELPER_INTERFACE_MODE_PICMG: 854 break; 855 856 case CVMX_HELPER_INTERFACE_MODE_NPI: 857 dev->netdev_ops = &cvm_oct_npi_netdev_ops; 858 strscpy(dev->name, "npi%d", sizeof(dev->name)); 859 break; 860 861 case CVMX_HELPER_INTERFACE_MODE_XAUI: 862 dev->netdev_ops = &cvm_oct_xaui_netdev_ops; 863 strscpy(dev->name, "xaui%d", sizeof(dev->name)); 864 break; 865 866 case CVMX_HELPER_INTERFACE_MODE_LOOP: 867 dev->netdev_ops = &cvm_oct_npi_netdev_ops; 868 strscpy(dev->name, "loop%d", sizeof(dev->name)); 869 break; 870 871 case CVMX_HELPER_INTERFACE_MODE_SGMII: 872 priv->phy_mode = PHY_INTERFACE_MODE_SGMII; 873 dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; 874 strscpy(dev->name, "eth%d", sizeof(dev->name)); 875 break; 876 877 case CVMX_HELPER_INTERFACE_MODE_SPI: 878 dev->netdev_ops = &cvm_oct_spi_netdev_ops; 879 strscpy(dev->name, "spi%d", sizeof(dev->name)); 880 break; 881 882 case CVMX_HELPER_INTERFACE_MODE_GMII: 883 priv->phy_mode = PHY_INTERFACE_MODE_GMII; 884 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; 885 strscpy(dev->name, "eth%d", sizeof(dev->name)); 886 break; 887 888 case CVMX_HELPER_INTERFACE_MODE_RGMII: 889 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; 890 strscpy(dev->name, "eth%d", sizeof(dev->name)); 891 cvm_set_rgmii_delay(priv, interface, 892 port_index); 893 break; 894 } 895 896 if (priv->of_node && of_phy_is_fixed_link(priv->of_node)) { 897 if (of_phy_register_fixed_link(priv->of_node)) { 898 netdev_err(dev, "Failed to register fixed link for interface %d, port %d\n", 899 interface, priv->port); 900 dev->netdev_ops = NULL; 901 } 902 } 903 904 if (!dev->netdev_ops) { 905 free_netdev(dev); 906 } else if (register_netdev(dev) < 0) { 907 pr_err("Failed to register ethernet device for interface %d, port %d\n", 908 interface, priv->port); 909 free_netdev(dev); 910 } else { 911 cvm_oct_device[priv->port] = dev; 912 fau -= 913 cvmx_pko_get_num_queues(priv->port) * 914 sizeof(u32); 915 schedule_delayed_work(&priv->port_periodic_work, 916 HZ); 917 } 918 } 919 } 920 921 cvm_oct_tx_initialize(); 922 cvm_oct_rx_initialize(); 923 924 /* 925 * 150 uS: about 10 1500-byte packets at 1GE. 926 */ 927 cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000); 928 929 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ); 930 931 return 0; 932 } 933 934 static int cvm_oct_remove(struct platform_device *pdev) 935 { 936 int port; 937 938 cvmx_ipd_disable(); 939 940 atomic_inc_return(&cvm_oct_poll_queue_stopping); 941 cancel_delayed_work_sync(&cvm_oct_rx_refill_work); 942 943 cvm_oct_rx_shutdown(); 944 cvm_oct_tx_shutdown(); 945 946 cvmx_pko_disable(); 947 948 /* Free the ethernet devices */ 949 for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) { 950 if (cvm_oct_device[port]) { 951 struct net_device *dev = cvm_oct_device[port]; 952 struct octeon_ethernet *priv = netdev_priv(dev); 953 954 cancel_delayed_work_sync(&priv->port_periodic_work); 955 956 cvm_oct_tx_shutdown_dev(dev); 957 unregister_netdev(dev); 958 free_netdev(dev); 959 cvm_oct_device[port] = NULL; 960 } 961 } 962 963 cvmx_pko_shutdown(); 964 965 cvmx_ipd_free_ptr(); 966 967 /* Free the HW pools */ 968 cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, 969 num_packet_buffers); 970 cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, 971 num_packet_buffers); 972 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) 973 cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, 974 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128); 975 return 0; 976 } 977 978 static const struct of_device_id cvm_oct_match[] = { 979 { 980 .compatible = "cavium,octeon-3860-pip", 981 }, 982 {}, 983 }; 984 MODULE_DEVICE_TABLE(of, cvm_oct_match); 985 986 static struct platform_driver cvm_oct_driver = { 987 .probe = cvm_oct_probe, 988 .remove = cvm_oct_remove, 989 .driver = { 990 .name = KBUILD_MODNAME, 991 .of_match_table = cvm_oct_match, 992 }, 993 }; 994 995 module_platform_driver(cvm_oct_driver); 996 997 MODULE_SOFTDEP("pre: mdio-cavium"); 998 MODULE_LICENSE("GPL"); 999 MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>"); 1000 MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver."); 1001