1 /* 2 * NVEC: NVIDIA compliant embedded controller interface 3 * 4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> 5 * 6 * Authors: Pierre-Hugues Husson <phhusson@free.fr> 7 * Ilya Petrov <ilya.muromec@gmail.com> 8 * Marc Dietrich <marvin24@gmx.de> 9 * Julian Andres Klode <jak@jak-linux.org> 10 * 11 * This file is subject to the terms and conditions of the GNU General Public 12 * License. See the file "COPYING" in the main directory of this archive 13 * for more details. 14 * 15 */ 16 17 /* #define DEBUG */ 18 19 #include <asm/irq.h> 20 21 #include <linux/atomic.h> 22 #include <linux/completion.h> 23 #include <linux/interrupt.h> 24 #include <linux/io.h> 25 #include <linux/irq.h> 26 #include <linux/slab.h> 27 #include <linux/gpio.h> 28 #include <linux/serio.h> 29 #include <linux/delay.h> 30 #include <linux/input.h> 31 #include <linux/workqueue.h> 32 #include <linux/clk.h> 33 34 #include <linux/semaphore.h> 35 #include <linux/list.h> 36 #include <linux/notifier.h> 37 #include <linux/platform_device.h> 38 #include <linux/mfd/core.h> 39 40 #include <mach/iomap.h> 41 #include <mach/clk.h> 42 43 #include "nvec.h" 44 45 static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00"; 46 static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01"; 47 static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15"; 48 49 static struct nvec_chip *nvec_power_handle; 50 51 static struct mfd_cell nvec_devices[] = { 52 { 53 .name = "nvec-kbd", 54 .id = 1, 55 }, 56 { 57 .name = "nvec-mouse", 58 .id = 1, 59 }, 60 { 61 .name = "nvec-power", 62 .id = 1, 63 }, 64 { 65 .name = "nvec-power", 66 .id = 2, 67 }, 68 { 69 .name = "nvec-leds", 70 .id = 1, 71 }, 72 }; 73 74 int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb, 75 unsigned int events) 76 { 77 return atomic_notifier_chain_register(&nvec->notifier_list, nb); 78 } 79 EXPORT_SYMBOL_GPL(nvec_register_notifier); 80 81 static int nvec_status_notifier(struct notifier_block *nb, 82 unsigned long event_type, void *data) 83 { 84 unsigned char *msg = (unsigned char *)data; 85 86 if (event_type != NVEC_CNTL) 87 return NOTIFY_DONE; 88 89 printk(KERN_WARNING "unhandled msg type %ld\n", event_type); 90 print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1, 91 msg, msg[1] + 2, true); 92 93 return NOTIFY_OK; 94 } 95 96 static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec) 97 { 98 int i; 99 100 for (i = 0; i < NVEC_POOL_SIZE; i++) { 101 if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) { 102 dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i); 103 return &nvec->msg_pool[i]; 104 } 105 } 106 107 dev_err(nvec->dev, "could not allocate buffer\n"); 108 109 return NULL; 110 } 111 112 static void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg) 113 { 114 if (msg != &nvec->tx_scratch) 115 dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool); 116 atomic_set(&msg->used, 0); 117 } 118 119 /** 120 * nvec_msg_is_event - Return %true if @msg is an event 121 * @msg: A message 122 */ 123 static bool nvec_msg_is_event(struct nvec_msg *msg) 124 { 125 return msg->data[0] >> 7; 126 } 127 128 /** 129 * nvec_msg_size - Get the size of a message 130 * @msg: The message to get the size for 131 * 132 * This only works for received messages, not for outgoing messages. 133 */ 134 static size_t nvec_msg_size(struct nvec_msg *msg) 135 { 136 bool is_event = nvec_msg_is_event(msg); 137 int event_length = (msg->data[0] & 0x60) >> 5; 138 139 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */ 140 if (!is_event || event_length == NVEC_VAR_SIZE) 141 return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0; 142 else if (event_length == NVEC_2BYTES) 143 return 2; 144 else if (event_length == NVEC_3BYTES) 145 return 3; 146 else 147 return 0; 148 } 149 150 static void nvec_gpio_set_value(struct nvec_chip *nvec, int value) 151 { 152 dev_dbg(nvec->dev, "GPIO changed from %u to %u\n", 153 gpio_get_value(nvec->gpio), value); 154 gpio_set_value(nvec->gpio, value); 155 } 156 157 void nvec_write_async(struct nvec_chip *nvec, const unsigned char *data, 158 short size) 159 { 160 struct nvec_msg *msg; 161 unsigned long flags; 162 163 msg = nvec_msg_alloc(nvec); 164 msg->data[0] = size; 165 memcpy(msg->data + 1, data, size); 166 msg->size = size + 1; 167 168 spin_lock_irqsave(&nvec->tx_lock, flags); 169 list_add_tail(&msg->node, &nvec->tx_data); 170 spin_unlock_irqrestore(&nvec->tx_lock, flags); 171 172 queue_work(nvec->wq, &nvec->tx_work); 173 } 174 EXPORT_SYMBOL(nvec_write_async); 175 176 struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec, 177 const unsigned char *data, short size) 178 { 179 struct nvec_msg *msg; 180 181 mutex_lock(&nvec->sync_write_mutex); 182 183 nvec->sync_write_pending = (data[1] << 8) + data[0]; 184 nvec_write_async(nvec, data, size); 185 186 dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n", 187 nvec->sync_write_pending); 188 if (!(wait_for_completion_timeout(&nvec->sync_write, 189 msecs_to_jiffies(2000)))) { 190 dev_warn(nvec->dev, "timeout waiting for sync write to complete\n"); 191 mutex_unlock(&nvec->sync_write_mutex); 192 return NULL; 193 } 194 195 dev_dbg(nvec->dev, "nvec_sync_write: pong!\n"); 196 197 msg = nvec->last_sync_msg; 198 199 mutex_unlock(&nvec->sync_write_mutex); 200 201 return msg; 202 } 203 EXPORT_SYMBOL(nvec_write_sync); 204 205 /* TX worker */ 206 static void nvec_request_master(struct work_struct *work) 207 { 208 struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work); 209 unsigned long flags; 210 long err; 211 struct nvec_msg *msg; 212 213 spin_lock_irqsave(&nvec->tx_lock, flags); 214 while (!list_empty(&nvec->tx_data)) { 215 msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node); 216 spin_unlock_irqrestore(&nvec->tx_lock, flags); 217 nvec_gpio_set_value(nvec, 0); 218 err = wait_for_completion_interruptible_timeout( 219 &nvec->ec_transfer, msecs_to_jiffies(5000)); 220 221 if (err == 0) { 222 dev_warn(nvec->dev, "timeout waiting for ec transfer\n"); 223 nvec_gpio_set_value(nvec, 1); 224 msg->pos = 0; 225 } 226 227 spin_lock_irqsave(&nvec->tx_lock, flags); 228 229 if (err > 0) { 230 list_del_init(&msg->node); 231 nvec_msg_free(nvec, msg); 232 } 233 } 234 spin_unlock_irqrestore(&nvec->tx_lock, flags); 235 } 236 237 static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg) 238 { 239 if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) { 240 dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n", 241 msg->data[0], msg->data[1], msg->data[2], msg->data[3]); 242 return -EINVAL; 243 } 244 245 if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5) 246 print_hex_dump(KERN_WARNING, "ec system event ", 247 DUMP_PREFIX_NONE, 16, 1, msg->data, 248 msg->data[1] + 2, true); 249 250 atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f, 251 msg->data); 252 253 return 0; 254 } 255 256 /* RX worker */ 257 static void nvec_dispatch(struct work_struct *work) 258 { 259 struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work); 260 unsigned long flags; 261 struct nvec_msg *msg; 262 263 spin_lock_irqsave(&nvec->rx_lock, flags); 264 while (!list_empty(&nvec->rx_data)) { 265 msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node); 266 list_del_init(&msg->node); 267 spin_unlock_irqrestore(&nvec->rx_lock, flags); 268 269 if (nvec->sync_write_pending == 270 (msg->data[2] << 8) + msg->data[0]) { 271 dev_dbg(nvec->dev, "sync write completed!\n"); 272 nvec->sync_write_pending = 0; 273 nvec->last_sync_msg = msg; 274 complete(&nvec->sync_write); 275 } else { 276 parse_msg(nvec, msg); 277 nvec_msg_free(nvec, msg); 278 } 279 spin_lock_irqsave(&nvec->rx_lock, flags); 280 } 281 spin_unlock_irqrestore(&nvec->rx_lock, flags); 282 } 283 284 static void nvec_tx_completed(struct nvec_chip *nvec) 285 { 286 /* We got an END_TRANS, let's skip this, maybe there's an event */ 287 if (nvec->tx->pos != nvec->tx->size) { 288 dev_err(nvec->dev, "premature END_TRANS, resending\n"); 289 nvec->tx->pos = 0; 290 nvec_gpio_set_value(nvec, 0); 291 } else { 292 nvec->state = 0; 293 } 294 } 295 296 static void nvec_rx_completed(struct nvec_chip *nvec) 297 { 298 if (nvec->rx->pos != nvec_msg_size(nvec->rx)) 299 dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n", 300 (uint) nvec_msg_size(nvec->rx), 301 (uint) nvec->rx->pos); 302 303 spin_lock(&nvec->rx_lock); 304 305 /* add the received data to the work list 306 and move the ring buffer pointer to the next entry */ 307 list_add_tail(&nvec->rx->node, &nvec->rx_data); 308 309 spin_unlock(&nvec->rx_lock); 310 311 nvec->state = 0; 312 313 if (!nvec_msg_is_event(nvec->rx)) 314 complete(&nvec->ec_transfer); 315 316 queue_work(nvec->wq, &nvec->rx_work); 317 } 318 319 /** 320 * nvec_invalid_flags - Send an error message about invalid flags and jump 321 * @nvec: The nvec device 322 * @status: The status flags 323 * @reset: Whether we shall jump to state 0. 324 */ 325 static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status, 326 bool reset) 327 { 328 dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n", 329 status, nvec->state); 330 if (reset) 331 nvec->state = 0; 332 } 333 334 /** 335 * nvec_tx_set - Set the message to transfer (nvec->tx) 336 */ 337 static void nvec_tx_set(struct nvec_chip *nvec) 338 { 339 spin_lock(&nvec->tx_lock); 340 if (list_empty(&nvec->tx_data)) { 341 dev_err(nvec->dev, "empty tx - sending no-op\n"); 342 memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3); 343 nvec->tx_scratch.size = 3; 344 nvec->tx_scratch.pos = 0; 345 nvec->tx = &nvec->tx_scratch; 346 list_add_tail(&nvec->tx->node, &nvec->tx_data); 347 } else { 348 nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg, 349 node); 350 nvec->tx->pos = 0; 351 } 352 spin_unlock(&nvec->tx_lock); 353 354 dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n", 355 (uint)nvec->tx->size, nvec->tx->data[1]); 356 } 357 358 /** 359 * nvec_interrupt - Interrupt handler 360 * @irq: The IRQ 361 * @dev: The nvec device 362 */ 363 static irqreturn_t nvec_interrupt(int irq, void *dev) 364 { 365 unsigned long status; 366 unsigned int received = 0; 367 unsigned char to_send = 0xff; 368 const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW; 369 struct nvec_chip *nvec = dev; 370 unsigned int state = nvec->state; 371 372 status = readl(nvec->base + I2C_SL_STATUS); 373 374 /* Filter out some errors */ 375 if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) { 376 dev_err(nvec->dev, "unexpected irq mask %lx\n", status); 377 return IRQ_HANDLED; 378 } 379 if ((status & I2C_SL_IRQ) == 0) { 380 dev_err(nvec->dev, "Spurious IRQ\n"); 381 return IRQ_HANDLED; 382 } 383 384 /* The EC did not request a read, so it send us something, read it */ 385 if ((status & RNW) == 0) { 386 received = readl(nvec->base + I2C_SL_RCVD); 387 if (status & RCVD) 388 writel(0, nvec->base + I2C_SL_RCVD); 389 } 390 391 if (status == (I2C_SL_IRQ | RCVD)) 392 nvec->state = 0; 393 394 switch (nvec->state) { 395 case 0: /* Verify that its a transfer start, the rest later */ 396 if (status != (I2C_SL_IRQ | RCVD)) 397 nvec_invalid_flags(nvec, status, false); 398 break; 399 case 1: /* command byte */ 400 if (status != I2C_SL_IRQ) { 401 nvec_invalid_flags(nvec, status, true); 402 } else { 403 nvec->rx = nvec_msg_alloc(nvec); 404 nvec->rx->data[0] = received; 405 nvec->rx->pos = 1; 406 nvec->state = 2; 407 } 408 break; 409 case 2: /* first byte after command */ 410 if (status == (I2C_SL_IRQ | RNW | RCVD)) { 411 udelay(33); 412 if (nvec->rx->data[0] != 0x01) { 413 dev_err(nvec->dev, 414 "Read without prior read command\n"); 415 nvec->state = 0; 416 break; 417 } 418 nvec_msg_free(nvec, nvec->rx); 419 nvec->state = 3; 420 nvec_tx_set(nvec); 421 BUG_ON(nvec->tx->size < 1); 422 to_send = nvec->tx->data[0]; 423 nvec->tx->pos = 1; 424 } else if (status == (I2C_SL_IRQ)) { 425 BUG_ON(nvec->rx == NULL); 426 nvec->rx->data[1] = received; 427 nvec->rx->pos = 2; 428 nvec->state = 4; 429 } else { 430 nvec_invalid_flags(nvec, status, true); 431 } 432 break; 433 case 3: /* EC does a block read, we transmit data */ 434 if (status & END_TRANS) { 435 nvec_tx_completed(nvec); 436 } else if ((status & RNW) == 0 || (status & RCVD)) { 437 nvec_invalid_flags(nvec, status, true); 438 } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) { 439 to_send = nvec->tx->data[nvec->tx->pos++]; 440 } else { 441 dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n", 442 nvec->tx, 443 (uint) (nvec->tx ? nvec->tx->pos : 0), 444 (uint) (nvec->tx ? nvec->tx->size : 0)); 445 nvec->state = 0; 446 } 447 break; 448 case 4: /* EC does some write, we read the data */ 449 if ((status & (END_TRANS | RNW)) == END_TRANS) 450 nvec_rx_completed(nvec); 451 else if (status & (RNW | RCVD)) 452 nvec_invalid_flags(nvec, status, true); 453 else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE) 454 nvec->rx->data[nvec->rx->pos++] = received; 455 else 456 dev_err(nvec->dev, 457 "RX buffer overflow on %p: " 458 "Trying to write byte %u of %u\n", 459 nvec->rx, nvec->rx->pos, NVEC_MSG_SIZE); 460 break; 461 default: 462 nvec->state = 0; 463 } 464 465 /* If we are told that a new transfer starts, verify it */ 466 if ((status & (RCVD | RNW)) == RCVD) { 467 if (received != nvec->i2c_addr) 468 dev_err(nvec->dev, 469 "received address 0x%02x, expected 0x%02x\n", 470 received, nvec->i2c_addr); 471 nvec->state = 1; 472 } 473 474 /* Send data if requested, but not on end of transmission */ 475 if ((status & (RNW | END_TRANS)) == RNW) 476 writel(to_send, nvec->base + I2C_SL_RCVD); 477 478 /* If we have send the first byte */ 479 if (status == (I2C_SL_IRQ | RNW | RCVD)) 480 nvec_gpio_set_value(nvec, 1); 481 482 dev_dbg(nvec->dev, 483 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n", 484 (status & RNW) == 0 ? "received" : "R=", 485 received, 486 (status & (RNW | END_TRANS)) ? "sent" : "S=", 487 to_send, 488 state, 489 status & END_TRANS ? " END_TRANS" : "", 490 status & RCVD ? " RCVD" : "", 491 status & RNW ? " RNW" : ""); 492 493 return IRQ_HANDLED; 494 } 495 496 static void tegra_init_i2c_slave(struct nvec_chip *nvec) 497 { 498 u32 val; 499 500 clk_enable(nvec->i2c_clk); 501 502 tegra_periph_reset_assert(nvec->i2c_clk); 503 udelay(2); 504 tegra_periph_reset_deassert(nvec->i2c_clk); 505 506 val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN | 507 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); 508 writel(val, nvec->base + I2C_CNFG); 509 510 clk_set_rate(nvec->i2c_clk, 8 * 80000); 511 512 writel(I2C_SL_NEWL, nvec->base + I2C_SL_CNFG); 513 writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT); 514 515 writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1); 516 writel(0, nvec->base + I2C_SL_ADDR2); 517 518 enable_irq(nvec->irq); 519 520 clk_disable(nvec->i2c_clk); 521 } 522 523 static void nvec_disable_i2c_slave(struct nvec_chip *nvec) 524 { 525 disable_irq(nvec->irq); 526 writel(I2C_SL_NEWL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); 527 clk_disable(nvec->i2c_clk); 528 } 529 530 static void nvec_power_off(void) 531 { 532 nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3); 533 nvec_write_async(nvec_power_handle, "\x04\x01", 2); 534 } 535 536 static int __devinit tegra_nvec_probe(struct platform_device *pdev) 537 { 538 int err, ret; 539 struct clk *i2c_clk; 540 struct nvec_platform_data *pdata = pdev->dev.platform_data; 541 struct nvec_chip *nvec; 542 struct nvec_msg *msg; 543 struct resource *res; 544 struct resource *iomem; 545 void __iomem *base; 546 547 nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL); 548 if (nvec == NULL) { 549 dev_err(&pdev->dev, "failed to reserve memory\n"); 550 return -ENOMEM; 551 } 552 platform_set_drvdata(pdev, nvec); 553 nvec->dev = &pdev->dev; 554 nvec->gpio = pdata->gpio; 555 nvec->i2c_addr = pdata->i2c_addr; 556 557 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 558 if (!res) { 559 dev_err(&pdev->dev, "no mem resource?\n"); 560 return -ENODEV; 561 } 562 563 iomem = request_mem_region(res->start, resource_size(res), pdev->name); 564 if (!iomem) { 565 dev_err(&pdev->dev, "I2C region already claimed\n"); 566 return -EBUSY; 567 } 568 569 base = ioremap(iomem->start, resource_size(iomem)); 570 if (!base) { 571 dev_err(&pdev->dev, "Can't ioremap I2C region\n"); 572 return -ENOMEM; 573 } 574 575 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 576 if (!res) { 577 dev_err(&pdev->dev, "no irq resource?\n"); 578 ret = -ENODEV; 579 goto err_iounmap; 580 } 581 582 i2c_clk = clk_get_sys("tegra-i2c.2", NULL); 583 if (IS_ERR(i2c_clk)) { 584 dev_err(nvec->dev, "failed to get controller clock\n"); 585 goto err_iounmap; 586 } 587 588 nvec->base = base; 589 nvec->irq = res->start; 590 nvec->i2c_clk = i2c_clk; 591 nvec->rx = &nvec->msg_pool[0]; 592 593 /* Set the gpio to low when we've got something to say */ 594 err = gpio_request(nvec->gpio, "nvec gpio"); 595 if (err < 0) 596 dev_err(nvec->dev, "couldn't request gpio\n"); 597 598 ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list); 599 600 init_completion(&nvec->sync_write); 601 init_completion(&nvec->ec_transfer); 602 mutex_init(&nvec->sync_write_mutex); 603 spin_lock_init(&nvec->tx_lock); 604 spin_lock_init(&nvec->rx_lock); 605 INIT_LIST_HEAD(&nvec->rx_data); 606 INIT_LIST_HEAD(&nvec->tx_data); 607 INIT_WORK(&nvec->rx_work, nvec_dispatch); 608 INIT_WORK(&nvec->tx_work, nvec_request_master); 609 nvec->wq = alloc_workqueue("nvec", WQ_NON_REENTRANT, 2); 610 611 err = request_irq(nvec->irq, nvec_interrupt, 0, "nvec", nvec); 612 if (err) { 613 dev_err(nvec->dev, "couldn't request irq\n"); 614 goto failed; 615 } 616 disable_irq(nvec->irq); 617 618 tegra_init_i2c_slave(nvec); 619 620 clk_enable(i2c_clk); 621 622 gpio_direction_output(nvec->gpio, 1); 623 gpio_set_value(nvec->gpio, 1); 624 625 /* enable event reporting */ 626 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 627 sizeof(EC_ENABLE_EVENT_REPORTING)); 628 629 nvec->nvec_status_notifier.notifier_call = nvec_status_notifier; 630 nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0); 631 632 nvec_power_handle = nvec; 633 pm_power_off = nvec_power_off; 634 635 /* Get Firmware Version */ 636 msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION, 637 sizeof(EC_GET_FIRMWARE_VERSION)); 638 639 if (msg) { 640 dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n", 641 msg->data[4], msg->data[5], msg->data[6], msg->data[7]); 642 643 nvec_msg_free(nvec, msg); 644 } 645 646 ret = mfd_add_devices(nvec->dev, -1, nvec_devices, 647 ARRAY_SIZE(nvec_devices), base, 0); 648 if (ret) 649 dev_err(nvec->dev, "error adding subdevices\n"); 650 651 /* unmute speakers? */ 652 nvec_write_async(nvec, "\x0d\x10\x59\x95", 4); 653 654 /* enable lid switch event */ 655 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7); 656 657 /* enable power button event */ 658 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7); 659 660 return 0; 661 662 err_iounmap: 663 iounmap(base); 664 failed: 665 kfree(nvec); 666 return -ENOMEM; 667 } 668 669 static int __devexit tegra_nvec_remove(struct platform_device *pdev) 670 { 671 struct nvec_chip *nvec = platform_get_drvdata(pdev); 672 673 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 674 mfd_remove_devices(nvec->dev); 675 free_irq(nvec->irq, &nvec_interrupt); 676 iounmap(nvec->base); 677 gpio_free(nvec->gpio); 678 destroy_workqueue(nvec->wq); 679 kfree(nvec); 680 681 return 0; 682 } 683 684 #ifdef CONFIG_PM 685 686 static int tegra_nvec_suspend(struct platform_device *pdev, pm_message_t state) 687 { 688 struct nvec_chip *nvec = platform_get_drvdata(pdev); 689 690 dev_dbg(nvec->dev, "suspending\n"); 691 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 692 nvec_write_async(nvec, "\x04\x02", 2); 693 nvec_disable_i2c_slave(nvec); 694 695 return 0; 696 } 697 698 static int tegra_nvec_resume(struct platform_device *pdev) 699 { 700 struct nvec_chip *nvec = platform_get_drvdata(pdev); 701 702 dev_dbg(nvec->dev, "resuming\n"); 703 tegra_init_i2c_slave(nvec); 704 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3); 705 706 return 0; 707 } 708 709 #else 710 #define tegra_nvec_suspend NULL 711 #define tegra_nvec_resume NULL 712 #endif 713 714 static struct platform_driver nvec_device_driver = { 715 .probe = tegra_nvec_probe, 716 .remove = __devexit_p(tegra_nvec_remove), 717 .suspend = tegra_nvec_suspend, 718 .resume = tegra_nvec_resume, 719 .driver = { 720 .name = "nvec", 721 .owner = THIS_MODULE, 722 } 723 }; 724 725 static int __init tegra_nvec_init(void) 726 { 727 return platform_driver_register(&nvec_device_driver); 728 } 729 730 module_init(tegra_nvec_init); 731 732 MODULE_ALIAS("platform:nvec"); 733 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface"); 734 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>"); 735 MODULE_LICENSE("GPL"); 736