1 /* 2 * NVEC: NVIDIA compliant embedded controller interface 3 * 4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> 5 * 6 * Authors: Pierre-Hugues Husson <phhusson@free.fr> 7 * Ilya Petrov <ilya.muromec@gmail.com> 8 * Marc Dietrich <marvin24@gmx.de> 9 * Julian Andres Klode <jak@jak-linux.org> 10 * 11 * This file is subject to the terms and conditions of the GNU General Public 12 * License. See the file "COPYING" in the main directory of this archive 13 * for more details. 14 * 15 */ 16 17 /* #define DEBUG */ 18 19 #include <asm/irq.h> 20 21 #include <linux/atomic.h> 22 #include <linux/completion.h> 23 #include <linux/interrupt.h> 24 #include <linux/io.h> 25 #include <linux/irq.h> 26 #include <linux/slab.h> 27 #include <linux/gpio.h> 28 #include <linux/serio.h> 29 #include <linux/delay.h> 30 #include <linux/input.h> 31 #include <linux/workqueue.h> 32 #include <linux/clk.h> 33 34 #include <linux/semaphore.h> 35 #include <linux/list.h> 36 #include <linux/notifier.h> 37 #include <linux/platform_device.h> 38 #include <linux/mfd/core.h> 39 40 #include <mach/iomap.h> 41 #include <mach/clk.h> 42 43 #include "nvec.h" 44 45 #define I2C_CNFG 0x00 46 #define I2C_CNFG_PACKET_MODE_EN (1<<10) 47 #define I2C_CNFG_NEW_MASTER_SFM (1<<11) 48 #define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12 49 50 #define I2C_SL_CNFG 0x20 51 #define I2C_SL_NEWL (1<<2) 52 #define I2C_SL_NACK (1<<1) 53 #define I2C_SL_RESP (1<<0) 54 #define I2C_SL_IRQ (1<<3) 55 #define END_TRANS (1<<4) 56 #define RCVD (1<<2) 57 #define RNW (1<<1) 58 59 #define I2C_SL_RCVD 0x24 60 #define I2C_SL_STATUS 0x28 61 #define I2C_SL_ADDR1 0x2c 62 #define I2C_SL_ADDR2 0x30 63 #define I2C_SL_DELAY_COUNT 0x3c 64 65 static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00"; 66 static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01"; 67 static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15"; 68 69 static struct nvec_chip *nvec_power_handle; 70 71 static struct mfd_cell nvec_devices[] = { 72 { 73 .name = "nvec-kbd", 74 .id = 1, 75 }, 76 { 77 .name = "nvec-mouse", 78 .id = 1, 79 }, 80 { 81 .name = "nvec-power", 82 .id = 1, 83 }, 84 { 85 .name = "nvec-power", 86 .id = 2, 87 }, 88 { 89 .name = "nvec-leds", 90 .id = 1, 91 }, 92 }; 93 94 /** 95 * nvec_register_notifier - Register a notifier with nvec 96 * @nvec: A &struct nvec_chip 97 * @nb: The notifier block to register 98 * 99 * Registers a notifier with @nvec. The notifier will be added to an atomic 100 * notifier chain that is called for all received messages except those that 101 * correspond to a request initiated by nvec_write_sync(). 102 */ 103 int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb, 104 unsigned int events) 105 { 106 return atomic_notifier_chain_register(&nvec->notifier_list, nb); 107 } 108 EXPORT_SYMBOL_GPL(nvec_register_notifier); 109 110 /** 111 * nvec_status_notifier - The final notifier 112 * 113 * Prints a message about control events not handled in the notifier 114 * chain. 115 */ 116 static int nvec_status_notifier(struct notifier_block *nb, 117 unsigned long event_type, void *data) 118 { 119 unsigned char *msg = (unsigned char *)data; 120 121 if (event_type != NVEC_CNTL) 122 return NOTIFY_DONE; 123 124 printk(KERN_WARNING "unhandled msg type %ld\n", event_type); 125 print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1, 126 msg, msg[1] + 2, true); 127 128 return NOTIFY_OK; 129 } 130 131 /** 132 * nvec_msg_alloc: 133 * @nvec: A &struct nvec_chip 134 * 135 * Allocate a single &struct nvec_msg object from the message pool of 136 * @nvec. The result shall be passed to nvec_msg_free() if no longer 137 * used. 138 */ 139 static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec) 140 { 141 int i; 142 143 for (i = 0; i < NVEC_POOL_SIZE; i++) { 144 if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) { 145 dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i); 146 return &nvec->msg_pool[i]; 147 } 148 } 149 150 dev_err(nvec->dev, "could not allocate buffer\n"); 151 152 return NULL; 153 } 154 155 /** 156 * nvec_msg_free: 157 * @nvec: A &struct nvec_chip 158 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec) 159 * 160 * Free the given message 161 */ 162 static void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg) 163 { 164 if (msg != &nvec->tx_scratch) 165 dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool); 166 atomic_set(&msg->used, 0); 167 } 168 169 /** 170 * nvec_msg_is_event - Return %true if @msg is an event 171 * @msg: A message 172 */ 173 static bool nvec_msg_is_event(struct nvec_msg *msg) 174 { 175 return msg->data[0] >> 7; 176 } 177 178 /** 179 * nvec_msg_size - Get the size of a message 180 * @msg: The message to get the size for 181 * 182 * This only works for received messages, not for outgoing messages. 183 */ 184 static size_t nvec_msg_size(struct nvec_msg *msg) 185 { 186 bool is_event = nvec_msg_is_event(msg); 187 int event_length = (msg->data[0] & 0x60) >> 5; 188 189 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */ 190 if (!is_event || event_length == NVEC_VAR_SIZE) 191 return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0; 192 else if (event_length == NVEC_2BYTES) 193 return 2; 194 else if (event_length == NVEC_3BYTES) 195 return 3; 196 else 197 return 0; 198 } 199 200 /** 201 * nvec_gpio_set_value - Set the GPIO value 202 * @nvec: A &struct nvec_chip 203 * @value: The value to write (0 or 1) 204 * 205 * Like gpio_set_value(), but generating debugging information 206 */ 207 static void nvec_gpio_set_value(struct nvec_chip *nvec, int value) 208 { 209 dev_dbg(nvec->dev, "GPIO changed from %u to %u\n", 210 gpio_get_value(nvec->gpio), value); 211 gpio_set_value(nvec->gpio, value); 212 } 213 214 /** 215 * nvec_write_async - Asynchronously write a message to NVEC 216 * @nvec: An nvec_chip instance 217 * @data: The message data, starting with the request type 218 * @size: The size of @data 219 * 220 * Queue a single message to be transferred to the embedded controller 221 * and return immediately. 222 * 223 * Returns: 0 on success, a negative error code on failure. If a failure 224 * occured, the nvec driver may print an error. 225 */ 226 int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data, 227 short size) 228 { 229 struct nvec_msg *msg; 230 unsigned long flags; 231 232 msg = nvec_msg_alloc(nvec); 233 if (msg == NULL) 234 return -ENOMEM; 235 236 msg->data[0] = size; 237 memcpy(msg->data + 1, data, size); 238 msg->size = size + 1; 239 240 spin_lock_irqsave(&nvec->tx_lock, flags); 241 list_add_tail(&msg->node, &nvec->tx_data); 242 spin_unlock_irqrestore(&nvec->tx_lock, flags); 243 244 queue_work(nvec->wq, &nvec->tx_work); 245 246 return 0; 247 } 248 EXPORT_SYMBOL(nvec_write_async); 249 250 /** 251 * nvec_write_sync - Write a message to nvec and read the response 252 * @nvec: An &struct nvec_chip 253 * @data: The data to write 254 * @size: The size of @data 255 * 256 * This is similar to nvec_write_async(), but waits for the 257 * request to be answered before returning. This function 258 * uses a mutex and can thus not be called from e.g. 259 * interrupt handlers. 260 * 261 * Returns: A pointer to the response message on success, 262 * %NULL on failure. 263 */ 264 struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec, 265 const unsigned char *data, short size) 266 { 267 struct nvec_msg *msg; 268 269 mutex_lock(&nvec->sync_write_mutex); 270 271 nvec->sync_write_pending = (data[1] << 8) + data[0]; 272 273 if (nvec_write_async(nvec, data, size) < 0) 274 return NULL; 275 276 dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n", 277 nvec->sync_write_pending); 278 if (!(wait_for_completion_timeout(&nvec->sync_write, 279 msecs_to_jiffies(2000)))) { 280 dev_warn(nvec->dev, "timeout waiting for sync write to complete\n"); 281 mutex_unlock(&nvec->sync_write_mutex); 282 return NULL; 283 } 284 285 dev_dbg(nvec->dev, "nvec_sync_write: pong!\n"); 286 287 msg = nvec->last_sync_msg; 288 289 mutex_unlock(&nvec->sync_write_mutex); 290 291 return msg; 292 } 293 EXPORT_SYMBOL(nvec_write_sync); 294 295 /** 296 * nvec_request_master - Process outgoing messages 297 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip) 298 * 299 * Processes all outgoing requests by sending the request and awaiting the 300 * response, then continuing with the next request. Once a request has a 301 * matching response, it will be freed and removed from the list. 302 */ 303 static void nvec_request_master(struct work_struct *work) 304 { 305 struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work); 306 unsigned long flags; 307 long err; 308 struct nvec_msg *msg; 309 310 spin_lock_irqsave(&nvec->tx_lock, flags); 311 while (!list_empty(&nvec->tx_data)) { 312 msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node); 313 spin_unlock_irqrestore(&nvec->tx_lock, flags); 314 nvec_gpio_set_value(nvec, 0); 315 err = wait_for_completion_interruptible_timeout( 316 &nvec->ec_transfer, msecs_to_jiffies(5000)); 317 318 if (err == 0) { 319 dev_warn(nvec->dev, "timeout waiting for ec transfer\n"); 320 nvec_gpio_set_value(nvec, 1); 321 msg->pos = 0; 322 } 323 324 spin_lock_irqsave(&nvec->tx_lock, flags); 325 326 if (err > 0) { 327 list_del_init(&msg->node); 328 nvec_msg_free(nvec, msg); 329 } 330 } 331 spin_unlock_irqrestore(&nvec->tx_lock, flags); 332 } 333 334 /** 335 * parse_msg - Print some information and call the notifiers on an RX message 336 * @nvec: A &struct nvec_chip 337 * @msg: A message received by @nvec 338 * 339 * Paarse some pieces of the message and then call the chain of notifiers 340 * registered via nvec_register_notifier. 341 */ 342 static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg) 343 { 344 if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) { 345 dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n", 346 msg->data[0], msg->data[1], msg->data[2], msg->data[3]); 347 return -EINVAL; 348 } 349 350 if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5) 351 print_hex_dump(KERN_WARNING, "ec system event ", 352 DUMP_PREFIX_NONE, 16, 1, msg->data, 353 msg->data[1] + 2, true); 354 355 atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f, 356 msg->data); 357 358 return 0; 359 } 360 361 /** 362 * nvec_dispatch - Process messages received from the EC 363 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip) 364 * 365 * Process messages previously received from the EC and put into the RX 366 * queue of the &struct nvec_chip instance associated with @work. 367 */ 368 static void nvec_dispatch(struct work_struct *work) 369 { 370 struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work); 371 unsigned long flags; 372 struct nvec_msg *msg; 373 374 spin_lock_irqsave(&nvec->rx_lock, flags); 375 while (!list_empty(&nvec->rx_data)) { 376 msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node); 377 list_del_init(&msg->node); 378 spin_unlock_irqrestore(&nvec->rx_lock, flags); 379 380 if (nvec->sync_write_pending == 381 (msg->data[2] << 8) + msg->data[0]) { 382 dev_dbg(nvec->dev, "sync write completed!\n"); 383 nvec->sync_write_pending = 0; 384 nvec->last_sync_msg = msg; 385 complete(&nvec->sync_write); 386 } else { 387 parse_msg(nvec, msg); 388 nvec_msg_free(nvec, msg); 389 } 390 spin_lock_irqsave(&nvec->rx_lock, flags); 391 } 392 spin_unlock_irqrestore(&nvec->rx_lock, flags); 393 } 394 395 /** 396 * nvec_tx_completed - Complete the current transfer 397 * @nvec: A &struct nvec_chip 398 * 399 * This is called when we have received an END_TRANS on a TX transfer. 400 */ 401 static void nvec_tx_completed(struct nvec_chip *nvec) 402 { 403 /* We got an END_TRANS, let's skip this, maybe there's an event */ 404 if (nvec->tx->pos != nvec->tx->size) { 405 dev_err(nvec->dev, "premature END_TRANS, resending\n"); 406 nvec->tx->pos = 0; 407 nvec_gpio_set_value(nvec, 0); 408 } else { 409 nvec->state = 0; 410 } 411 } 412 413 /** 414 * nvec_rx_completed - Complete the current transfer 415 * @nvec: A &struct nvec_chip 416 * 417 * This is called when we have received an END_TRANS on a RX transfer. 418 */ 419 static void nvec_rx_completed(struct nvec_chip *nvec) 420 { 421 if (nvec->rx->pos != nvec_msg_size(nvec->rx)) 422 dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n", 423 (uint) nvec_msg_size(nvec->rx), 424 (uint) nvec->rx->pos); 425 426 spin_lock(&nvec->rx_lock); 427 428 /* add the received data to the work list 429 and move the ring buffer pointer to the next entry */ 430 list_add_tail(&nvec->rx->node, &nvec->rx_data); 431 432 spin_unlock(&nvec->rx_lock); 433 434 nvec->state = 0; 435 436 if (!nvec_msg_is_event(nvec->rx)) 437 complete(&nvec->ec_transfer); 438 439 queue_work(nvec->wq, &nvec->rx_work); 440 } 441 442 /** 443 * nvec_invalid_flags - Send an error message about invalid flags and jump 444 * @nvec: The nvec device 445 * @status: The status flags 446 * @reset: Whether we shall jump to state 0. 447 */ 448 static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status, 449 bool reset) 450 { 451 dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n", 452 status, nvec->state); 453 if (reset) 454 nvec->state = 0; 455 } 456 457 /** 458 * nvec_tx_set - Set the message to transfer (nvec->tx) 459 * @nvec: A &struct nvec_chip 460 * 461 * Gets the first entry from the tx_data list of @nvec and sets the 462 * tx member to it. If the tx_data list is empty, this uses the 463 * tx_scratch message to send a no operation message. 464 */ 465 static void nvec_tx_set(struct nvec_chip *nvec) 466 { 467 spin_lock(&nvec->tx_lock); 468 if (list_empty(&nvec->tx_data)) { 469 dev_err(nvec->dev, "empty tx - sending no-op\n"); 470 memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3); 471 nvec->tx_scratch.size = 3; 472 nvec->tx_scratch.pos = 0; 473 nvec->tx = &nvec->tx_scratch; 474 list_add_tail(&nvec->tx->node, &nvec->tx_data); 475 } else { 476 nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg, 477 node); 478 nvec->tx->pos = 0; 479 } 480 spin_unlock(&nvec->tx_lock); 481 482 dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n", 483 (uint)nvec->tx->size, nvec->tx->data[1]); 484 } 485 486 /** 487 * nvec_interrupt - Interrupt handler 488 * @irq: The IRQ 489 * @dev: The nvec device 490 * 491 * Interrupt handler that fills our RX buffers and empties our TX 492 * buffers. This uses a finite state machine with ridiculous amounts 493 * of error checking, in order to be fairly reliable. 494 */ 495 static irqreturn_t nvec_interrupt(int irq, void *dev) 496 { 497 unsigned long status; 498 unsigned int received = 0; 499 unsigned char to_send = 0xff; 500 const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW; 501 struct nvec_chip *nvec = dev; 502 unsigned int state = nvec->state; 503 504 status = readl(nvec->base + I2C_SL_STATUS); 505 506 /* Filter out some errors */ 507 if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) { 508 dev_err(nvec->dev, "unexpected irq mask %lx\n", status); 509 return IRQ_HANDLED; 510 } 511 if ((status & I2C_SL_IRQ) == 0) { 512 dev_err(nvec->dev, "Spurious IRQ\n"); 513 return IRQ_HANDLED; 514 } 515 516 /* The EC did not request a read, so it send us something, read it */ 517 if ((status & RNW) == 0) { 518 received = readl(nvec->base + I2C_SL_RCVD); 519 if (status & RCVD) 520 writel(0, nvec->base + I2C_SL_RCVD); 521 } 522 523 if (status == (I2C_SL_IRQ | RCVD)) 524 nvec->state = 0; 525 526 switch (nvec->state) { 527 case 0: /* Verify that its a transfer start, the rest later */ 528 if (status != (I2C_SL_IRQ | RCVD)) 529 nvec_invalid_flags(nvec, status, false); 530 break; 531 case 1: /* command byte */ 532 if (status != I2C_SL_IRQ) { 533 nvec_invalid_flags(nvec, status, true); 534 } else { 535 nvec->rx = nvec_msg_alloc(nvec); 536 nvec->rx->data[0] = received; 537 nvec->rx->pos = 1; 538 nvec->state = 2; 539 } 540 break; 541 case 2: /* first byte after command */ 542 if (status == (I2C_SL_IRQ | RNW | RCVD)) { 543 udelay(33); 544 if (nvec->rx->data[0] != 0x01) { 545 dev_err(nvec->dev, 546 "Read without prior read command\n"); 547 nvec->state = 0; 548 break; 549 } 550 nvec_msg_free(nvec, nvec->rx); 551 nvec->state = 3; 552 nvec_tx_set(nvec); 553 BUG_ON(nvec->tx->size < 1); 554 to_send = nvec->tx->data[0]; 555 nvec->tx->pos = 1; 556 } else if (status == (I2C_SL_IRQ)) { 557 BUG_ON(nvec->rx == NULL); 558 nvec->rx->data[1] = received; 559 nvec->rx->pos = 2; 560 nvec->state = 4; 561 } else { 562 nvec_invalid_flags(nvec, status, true); 563 } 564 break; 565 case 3: /* EC does a block read, we transmit data */ 566 if (status & END_TRANS) { 567 nvec_tx_completed(nvec); 568 } else if ((status & RNW) == 0 || (status & RCVD)) { 569 nvec_invalid_flags(nvec, status, true); 570 } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) { 571 to_send = nvec->tx->data[nvec->tx->pos++]; 572 } else { 573 dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n", 574 nvec->tx, 575 (uint) (nvec->tx ? nvec->tx->pos : 0), 576 (uint) (nvec->tx ? nvec->tx->size : 0)); 577 nvec->state = 0; 578 } 579 break; 580 case 4: /* EC does some write, we read the data */ 581 if ((status & (END_TRANS | RNW)) == END_TRANS) 582 nvec_rx_completed(nvec); 583 else if (status & (RNW | RCVD)) 584 nvec_invalid_flags(nvec, status, true); 585 else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE) 586 nvec->rx->data[nvec->rx->pos++] = received; 587 else 588 dev_err(nvec->dev, 589 "RX buffer overflow on %p: " 590 "Trying to write byte %u of %u\n", 591 nvec->rx, nvec->rx->pos, NVEC_MSG_SIZE); 592 break; 593 default: 594 nvec->state = 0; 595 } 596 597 /* If we are told that a new transfer starts, verify it */ 598 if ((status & (RCVD | RNW)) == RCVD) { 599 if (received != nvec->i2c_addr) 600 dev_err(nvec->dev, 601 "received address 0x%02x, expected 0x%02x\n", 602 received, nvec->i2c_addr); 603 nvec->state = 1; 604 } 605 606 /* Send data if requested, but not on end of transmission */ 607 if ((status & (RNW | END_TRANS)) == RNW) 608 writel(to_send, nvec->base + I2C_SL_RCVD); 609 610 /* If we have send the first byte */ 611 if (status == (I2C_SL_IRQ | RNW | RCVD)) 612 nvec_gpio_set_value(nvec, 1); 613 614 dev_dbg(nvec->dev, 615 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n", 616 (status & RNW) == 0 ? "received" : "R=", 617 received, 618 (status & (RNW | END_TRANS)) ? "sent" : "S=", 619 to_send, 620 state, 621 status & END_TRANS ? " END_TRANS" : "", 622 status & RCVD ? " RCVD" : "", 623 status & RNW ? " RNW" : ""); 624 625 return IRQ_HANDLED; 626 } 627 628 static void tegra_init_i2c_slave(struct nvec_chip *nvec) 629 { 630 u32 val; 631 632 clk_enable(nvec->i2c_clk); 633 634 tegra_periph_reset_assert(nvec->i2c_clk); 635 udelay(2); 636 tegra_periph_reset_deassert(nvec->i2c_clk); 637 638 val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN | 639 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); 640 writel(val, nvec->base + I2C_CNFG); 641 642 clk_set_rate(nvec->i2c_clk, 8 * 80000); 643 644 writel(I2C_SL_NEWL, nvec->base + I2C_SL_CNFG); 645 writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT); 646 647 writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1); 648 writel(0, nvec->base + I2C_SL_ADDR2); 649 650 enable_irq(nvec->irq); 651 652 clk_disable(nvec->i2c_clk); 653 } 654 655 static void nvec_disable_i2c_slave(struct nvec_chip *nvec) 656 { 657 disable_irq(nvec->irq); 658 writel(I2C_SL_NEWL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); 659 clk_disable(nvec->i2c_clk); 660 } 661 662 static void nvec_power_off(void) 663 { 664 nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3); 665 nvec_write_async(nvec_power_handle, "\x04\x01", 2); 666 } 667 668 static int __devinit tegra_nvec_probe(struct platform_device *pdev) 669 { 670 int err, ret; 671 struct clk *i2c_clk; 672 struct nvec_platform_data *pdata = pdev->dev.platform_data; 673 struct nvec_chip *nvec; 674 struct nvec_msg *msg; 675 struct resource *res; 676 struct resource *iomem; 677 void __iomem *base; 678 679 nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL); 680 if (nvec == NULL) { 681 dev_err(&pdev->dev, "failed to reserve memory\n"); 682 return -ENOMEM; 683 } 684 platform_set_drvdata(pdev, nvec); 685 nvec->dev = &pdev->dev; 686 nvec->gpio = pdata->gpio; 687 nvec->i2c_addr = pdata->i2c_addr; 688 689 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 690 if (!res) { 691 dev_err(&pdev->dev, "no mem resource?\n"); 692 return -ENODEV; 693 } 694 695 iomem = request_mem_region(res->start, resource_size(res), pdev->name); 696 if (!iomem) { 697 dev_err(&pdev->dev, "I2C region already claimed\n"); 698 return -EBUSY; 699 } 700 701 base = ioremap(iomem->start, resource_size(iomem)); 702 if (!base) { 703 dev_err(&pdev->dev, "Can't ioremap I2C region\n"); 704 return -ENOMEM; 705 } 706 707 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 708 if (!res) { 709 dev_err(&pdev->dev, "no irq resource?\n"); 710 ret = -ENODEV; 711 goto err_iounmap; 712 } 713 714 i2c_clk = clk_get_sys("tegra-i2c.2", NULL); 715 if (IS_ERR(i2c_clk)) { 716 dev_err(nvec->dev, "failed to get controller clock\n"); 717 goto err_iounmap; 718 } 719 720 nvec->base = base; 721 nvec->irq = res->start; 722 nvec->i2c_clk = i2c_clk; 723 nvec->rx = &nvec->msg_pool[0]; 724 725 /* Set the gpio to low when we've got something to say */ 726 err = gpio_request(nvec->gpio, "nvec gpio"); 727 if (err < 0) 728 dev_err(nvec->dev, "couldn't request gpio\n"); 729 730 ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list); 731 732 init_completion(&nvec->sync_write); 733 init_completion(&nvec->ec_transfer); 734 mutex_init(&nvec->sync_write_mutex); 735 spin_lock_init(&nvec->tx_lock); 736 spin_lock_init(&nvec->rx_lock); 737 INIT_LIST_HEAD(&nvec->rx_data); 738 INIT_LIST_HEAD(&nvec->tx_data); 739 INIT_WORK(&nvec->rx_work, nvec_dispatch); 740 INIT_WORK(&nvec->tx_work, nvec_request_master); 741 nvec->wq = alloc_workqueue("nvec", WQ_NON_REENTRANT, 2); 742 743 err = request_irq(nvec->irq, nvec_interrupt, 0, "nvec", nvec); 744 if (err) { 745 dev_err(nvec->dev, "couldn't request irq\n"); 746 goto failed; 747 } 748 disable_irq(nvec->irq); 749 750 tegra_init_i2c_slave(nvec); 751 752 clk_enable(i2c_clk); 753 754 gpio_direction_output(nvec->gpio, 1); 755 gpio_set_value(nvec->gpio, 1); 756 757 /* enable event reporting */ 758 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 759 sizeof(EC_ENABLE_EVENT_REPORTING)); 760 761 nvec->nvec_status_notifier.notifier_call = nvec_status_notifier; 762 nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0); 763 764 nvec_power_handle = nvec; 765 pm_power_off = nvec_power_off; 766 767 /* Get Firmware Version */ 768 msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION, 769 sizeof(EC_GET_FIRMWARE_VERSION)); 770 771 if (msg) { 772 dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n", 773 msg->data[4], msg->data[5], msg->data[6], msg->data[7]); 774 775 nvec_msg_free(nvec, msg); 776 } 777 778 ret = mfd_add_devices(nvec->dev, -1, nvec_devices, 779 ARRAY_SIZE(nvec_devices), base, 0); 780 if (ret) 781 dev_err(nvec->dev, "error adding subdevices\n"); 782 783 /* unmute speakers? */ 784 nvec_write_async(nvec, "\x0d\x10\x59\x95", 4); 785 786 /* enable lid switch event */ 787 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7); 788 789 /* enable power button event */ 790 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7); 791 792 return 0; 793 794 err_iounmap: 795 iounmap(base); 796 failed: 797 kfree(nvec); 798 return -ENOMEM; 799 } 800 801 static int __devexit tegra_nvec_remove(struct platform_device *pdev) 802 { 803 struct nvec_chip *nvec = platform_get_drvdata(pdev); 804 805 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 806 mfd_remove_devices(nvec->dev); 807 free_irq(nvec->irq, &nvec_interrupt); 808 iounmap(nvec->base); 809 gpio_free(nvec->gpio); 810 destroy_workqueue(nvec->wq); 811 kfree(nvec); 812 813 return 0; 814 } 815 816 #ifdef CONFIG_PM 817 818 static int tegra_nvec_suspend(struct platform_device *pdev, pm_message_t state) 819 { 820 struct nvec_chip *nvec = platform_get_drvdata(pdev); 821 822 dev_dbg(nvec->dev, "suspending\n"); 823 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 824 nvec_write_async(nvec, "\x04\x02", 2); 825 nvec_disable_i2c_slave(nvec); 826 827 return 0; 828 } 829 830 static int tegra_nvec_resume(struct platform_device *pdev) 831 { 832 struct nvec_chip *nvec = platform_get_drvdata(pdev); 833 834 dev_dbg(nvec->dev, "resuming\n"); 835 tegra_init_i2c_slave(nvec); 836 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3); 837 838 return 0; 839 } 840 841 #else 842 #define tegra_nvec_suspend NULL 843 #define tegra_nvec_resume NULL 844 #endif 845 846 static struct platform_driver nvec_device_driver = { 847 .probe = tegra_nvec_probe, 848 .remove = __devexit_p(tegra_nvec_remove), 849 .suspend = tegra_nvec_suspend, 850 .resume = tegra_nvec_resume, 851 .driver = { 852 .name = "nvec", 853 .owner = THIS_MODULE, 854 } 855 }; 856 857 static int __init tegra_nvec_init(void) 858 { 859 return platform_driver_register(&nvec_device_driver); 860 } 861 862 module_init(tegra_nvec_init); 863 864 MODULE_ALIAS("platform:nvec"); 865 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface"); 866 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>"); 867 MODULE_LICENSE("GPL"); 868