1 /* 2 * NVEC: NVIDIA compliant embedded controller interface 3 * 4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> 5 * 6 * Authors: Pierre-Hugues Husson <phhusson@free.fr> 7 * Ilya Petrov <ilya.muromec@gmail.com> 8 * Marc Dietrich <marvin24@gmx.de> 9 * Julian Andres Klode <jak@jak-linux.org> 10 * 11 * This file is subject to the terms and conditions of the GNU General Public 12 * License. See the file "COPYING" in the main directory of this archive 13 * for more details. 14 * 15 */ 16 17 /* #define DEBUG */ 18 19 #include <asm/irq.h> 20 21 #include <linux/atomic.h> 22 #include <linux/completion.h> 23 #include <linux/interrupt.h> 24 #include <linux/io.h> 25 #include <linux/irq.h> 26 #include <linux/slab.h> 27 #include <linux/gpio.h> 28 #include <linux/serio.h> 29 #include <linux/delay.h> 30 #include <linux/input.h> 31 #include <linux/workqueue.h> 32 #include <linux/clk.h> 33 34 #include <linux/semaphore.h> 35 #include <linux/list.h> 36 #include <linux/notifier.h> 37 #include <linux/platform_device.h> 38 #include <linux/mfd/core.h> 39 40 #include <mach/iomap.h> 41 #include <mach/clk.h> 42 43 #include "nvec.h" 44 45 #define I2C_CNFG 0x00 46 #define I2C_CNFG_PACKET_MODE_EN (1<<10) 47 #define I2C_CNFG_NEW_MASTER_SFM (1<<11) 48 #define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12 49 50 #define I2C_SL_CNFG 0x20 51 #define I2C_SL_NEWL (1<<2) 52 #define I2C_SL_NACK (1<<1) 53 #define I2C_SL_RESP (1<<0) 54 #define I2C_SL_IRQ (1<<3) 55 #define END_TRANS (1<<4) 56 #define RCVD (1<<2) 57 #define RNW (1<<1) 58 59 #define I2C_SL_RCVD 0x24 60 #define I2C_SL_STATUS 0x28 61 #define I2C_SL_ADDR1 0x2c 62 #define I2C_SL_ADDR2 0x30 63 #define I2C_SL_DELAY_COUNT 0x3c 64 65 static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00"; 66 static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01"; 67 static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15"; 68 69 static struct nvec_chip *nvec_power_handle; 70 71 static struct mfd_cell nvec_devices[] = { 72 { 73 .name = "nvec-kbd", 74 .id = 1, 75 }, 76 { 77 .name = "nvec-mouse", 78 .id = 1, 79 }, 80 { 81 .name = "nvec-power", 82 .id = 1, 83 }, 84 { 85 .name = "nvec-power", 86 .id = 2, 87 }, 88 { 89 .name = "nvec-leds", 90 .id = 1, 91 }, 92 }; 93 94 /** 95 * nvec_register_notifier - Register a notifier with nvec 96 * @nvec: A &struct nvec_chip 97 * @nb: The notifier block to register 98 * 99 * Registers a notifier with @nvec. The notifier will be added to an atomic 100 * notifier chain that is called for all received messages except those that 101 * correspond to a request initiated by nvec_write_sync(). 102 */ 103 int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb, 104 unsigned int events) 105 { 106 return atomic_notifier_chain_register(&nvec->notifier_list, nb); 107 } 108 EXPORT_SYMBOL_GPL(nvec_register_notifier); 109 110 /** 111 * nvec_status_notifier - The final notifier 112 * 113 * Prints a message about control events not handled in the notifier 114 * chain. 115 */ 116 static int nvec_status_notifier(struct notifier_block *nb, 117 unsigned long event_type, void *data) 118 { 119 unsigned char *msg = (unsigned char *)data; 120 121 if (event_type != NVEC_CNTL) 122 return NOTIFY_DONE; 123 124 printk(KERN_WARNING "unhandled msg type %ld\n", event_type); 125 print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1, 126 msg, msg[1] + 2, true); 127 128 return NOTIFY_OK; 129 } 130 131 /** 132 * nvec_msg_alloc: 133 * @nvec: A &struct nvec_chip 134 * 135 * Allocate a single &struct nvec_msg object from the message pool of 136 * @nvec. The result shall be passed to nvec_msg_free() if no longer 137 * used. 138 */ 139 static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec) 140 { 141 int i; 142 143 for (i = 0; i < NVEC_POOL_SIZE; i++) { 144 if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) { 145 dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i); 146 return &nvec->msg_pool[i]; 147 } 148 } 149 150 dev_err(nvec->dev, "could not allocate buffer\n"); 151 152 return NULL; 153 } 154 155 /** 156 * nvec_msg_free: 157 * @nvec: A &struct nvec_chip 158 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec) 159 * 160 * Free the given message 161 */ 162 inline void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg) 163 { 164 if (msg != &nvec->tx_scratch) 165 dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool); 166 atomic_set(&msg->used, 0); 167 } 168 EXPORT_SYMBOL_GPL(nvec_msg_free); 169 170 /** 171 * nvec_msg_is_event - Return %true if @msg is an event 172 * @msg: A message 173 */ 174 static bool nvec_msg_is_event(struct nvec_msg *msg) 175 { 176 return msg->data[0] >> 7; 177 } 178 179 /** 180 * nvec_msg_size - Get the size of a message 181 * @msg: The message to get the size for 182 * 183 * This only works for received messages, not for outgoing messages. 184 */ 185 static size_t nvec_msg_size(struct nvec_msg *msg) 186 { 187 bool is_event = nvec_msg_is_event(msg); 188 int event_length = (msg->data[0] & 0x60) >> 5; 189 190 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */ 191 if (!is_event || event_length == NVEC_VAR_SIZE) 192 return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0; 193 else if (event_length == NVEC_2BYTES) 194 return 2; 195 else if (event_length == NVEC_3BYTES) 196 return 3; 197 else 198 return 0; 199 } 200 201 /** 202 * nvec_gpio_set_value - Set the GPIO value 203 * @nvec: A &struct nvec_chip 204 * @value: The value to write (0 or 1) 205 * 206 * Like gpio_set_value(), but generating debugging information 207 */ 208 static void nvec_gpio_set_value(struct nvec_chip *nvec, int value) 209 { 210 dev_dbg(nvec->dev, "GPIO changed from %u to %u\n", 211 gpio_get_value(nvec->gpio), value); 212 gpio_set_value(nvec->gpio, value); 213 } 214 215 /** 216 * nvec_write_async - Asynchronously write a message to NVEC 217 * @nvec: An nvec_chip instance 218 * @data: The message data, starting with the request type 219 * @size: The size of @data 220 * 221 * Queue a single message to be transferred to the embedded controller 222 * and return immediately. 223 * 224 * Returns: 0 on success, a negative error code on failure. If a failure 225 * occured, the nvec driver may print an error. 226 */ 227 int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data, 228 short size) 229 { 230 struct nvec_msg *msg; 231 unsigned long flags; 232 233 msg = nvec_msg_alloc(nvec); 234 if (msg == NULL) 235 return -ENOMEM; 236 237 msg->data[0] = size; 238 memcpy(msg->data + 1, data, size); 239 msg->size = size + 1; 240 241 spin_lock_irqsave(&nvec->tx_lock, flags); 242 list_add_tail(&msg->node, &nvec->tx_data); 243 spin_unlock_irqrestore(&nvec->tx_lock, flags); 244 245 queue_work(nvec->wq, &nvec->tx_work); 246 247 return 0; 248 } 249 EXPORT_SYMBOL(nvec_write_async); 250 251 /** 252 * nvec_write_sync - Write a message to nvec and read the response 253 * @nvec: An &struct nvec_chip 254 * @data: The data to write 255 * @size: The size of @data 256 * 257 * This is similar to nvec_write_async(), but waits for the 258 * request to be answered before returning. This function 259 * uses a mutex and can thus not be called from e.g. 260 * interrupt handlers. 261 * 262 * Returns: A pointer to the response message on success, 263 * %NULL on failure. Free with nvec_msg_free() once no longer 264 * used. 265 */ 266 struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec, 267 const unsigned char *data, short size) 268 { 269 struct nvec_msg *msg; 270 271 mutex_lock(&nvec->sync_write_mutex); 272 273 nvec->sync_write_pending = (data[1] << 8) + data[0]; 274 275 if (nvec_write_async(nvec, data, size) < 0) 276 return NULL; 277 278 dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n", 279 nvec->sync_write_pending); 280 if (!(wait_for_completion_timeout(&nvec->sync_write, 281 msecs_to_jiffies(2000)))) { 282 dev_warn(nvec->dev, "timeout waiting for sync write to complete\n"); 283 mutex_unlock(&nvec->sync_write_mutex); 284 return NULL; 285 } 286 287 dev_dbg(nvec->dev, "nvec_sync_write: pong!\n"); 288 289 msg = nvec->last_sync_msg; 290 291 mutex_unlock(&nvec->sync_write_mutex); 292 293 return msg; 294 } 295 EXPORT_SYMBOL(nvec_write_sync); 296 297 /** 298 * nvec_request_master - Process outgoing messages 299 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip) 300 * 301 * Processes all outgoing requests by sending the request and awaiting the 302 * response, then continuing with the next request. Once a request has a 303 * matching response, it will be freed and removed from the list. 304 */ 305 static void nvec_request_master(struct work_struct *work) 306 { 307 struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work); 308 unsigned long flags; 309 long err; 310 struct nvec_msg *msg; 311 312 spin_lock_irqsave(&nvec->tx_lock, flags); 313 while (!list_empty(&nvec->tx_data)) { 314 msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node); 315 spin_unlock_irqrestore(&nvec->tx_lock, flags); 316 nvec_gpio_set_value(nvec, 0); 317 err = wait_for_completion_interruptible_timeout( 318 &nvec->ec_transfer, msecs_to_jiffies(5000)); 319 320 if (err == 0) { 321 dev_warn(nvec->dev, "timeout waiting for ec transfer\n"); 322 nvec_gpio_set_value(nvec, 1); 323 msg->pos = 0; 324 } 325 326 spin_lock_irqsave(&nvec->tx_lock, flags); 327 328 if (err > 0) { 329 list_del_init(&msg->node); 330 nvec_msg_free(nvec, msg); 331 } 332 } 333 spin_unlock_irqrestore(&nvec->tx_lock, flags); 334 } 335 336 /** 337 * parse_msg - Print some information and call the notifiers on an RX message 338 * @nvec: A &struct nvec_chip 339 * @msg: A message received by @nvec 340 * 341 * Paarse some pieces of the message and then call the chain of notifiers 342 * registered via nvec_register_notifier. 343 */ 344 static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg) 345 { 346 if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) { 347 dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n", 348 msg->data[0], msg->data[1], msg->data[2], msg->data[3]); 349 return -EINVAL; 350 } 351 352 if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5) 353 print_hex_dump(KERN_WARNING, "ec system event ", 354 DUMP_PREFIX_NONE, 16, 1, msg->data, 355 msg->data[1] + 2, true); 356 357 atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f, 358 msg->data); 359 360 return 0; 361 } 362 363 /** 364 * nvec_dispatch - Process messages received from the EC 365 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip) 366 * 367 * Process messages previously received from the EC and put into the RX 368 * queue of the &struct nvec_chip instance associated with @work. 369 */ 370 static void nvec_dispatch(struct work_struct *work) 371 { 372 struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work); 373 unsigned long flags; 374 struct nvec_msg *msg; 375 376 spin_lock_irqsave(&nvec->rx_lock, flags); 377 while (!list_empty(&nvec->rx_data)) { 378 msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node); 379 list_del_init(&msg->node); 380 spin_unlock_irqrestore(&nvec->rx_lock, flags); 381 382 if (nvec->sync_write_pending == 383 (msg->data[2] << 8) + msg->data[0]) { 384 dev_dbg(nvec->dev, "sync write completed!\n"); 385 nvec->sync_write_pending = 0; 386 nvec->last_sync_msg = msg; 387 complete(&nvec->sync_write); 388 } else { 389 parse_msg(nvec, msg); 390 nvec_msg_free(nvec, msg); 391 } 392 spin_lock_irqsave(&nvec->rx_lock, flags); 393 } 394 spin_unlock_irqrestore(&nvec->rx_lock, flags); 395 } 396 397 /** 398 * nvec_tx_completed - Complete the current transfer 399 * @nvec: A &struct nvec_chip 400 * 401 * This is called when we have received an END_TRANS on a TX transfer. 402 */ 403 static void nvec_tx_completed(struct nvec_chip *nvec) 404 { 405 /* We got an END_TRANS, let's skip this, maybe there's an event */ 406 if (nvec->tx->pos != nvec->tx->size) { 407 dev_err(nvec->dev, "premature END_TRANS, resending\n"); 408 nvec->tx->pos = 0; 409 nvec_gpio_set_value(nvec, 0); 410 } else { 411 nvec->state = 0; 412 } 413 } 414 415 /** 416 * nvec_rx_completed - Complete the current transfer 417 * @nvec: A &struct nvec_chip 418 * 419 * This is called when we have received an END_TRANS on a RX transfer. 420 */ 421 static void nvec_rx_completed(struct nvec_chip *nvec) 422 { 423 if (nvec->rx->pos != nvec_msg_size(nvec->rx)) 424 dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n", 425 (uint) nvec_msg_size(nvec->rx), 426 (uint) nvec->rx->pos); 427 428 spin_lock(&nvec->rx_lock); 429 430 /* add the received data to the work list 431 and move the ring buffer pointer to the next entry */ 432 list_add_tail(&nvec->rx->node, &nvec->rx_data); 433 434 spin_unlock(&nvec->rx_lock); 435 436 nvec->state = 0; 437 438 if (!nvec_msg_is_event(nvec->rx)) 439 complete(&nvec->ec_transfer); 440 441 queue_work(nvec->wq, &nvec->rx_work); 442 } 443 444 /** 445 * nvec_invalid_flags - Send an error message about invalid flags and jump 446 * @nvec: The nvec device 447 * @status: The status flags 448 * @reset: Whether we shall jump to state 0. 449 */ 450 static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status, 451 bool reset) 452 { 453 dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n", 454 status, nvec->state); 455 if (reset) 456 nvec->state = 0; 457 } 458 459 /** 460 * nvec_tx_set - Set the message to transfer (nvec->tx) 461 * @nvec: A &struct nvec_chip 462 * 463 * Gets the first entry from the tx_data list of @nvec and sets the 464 * tx member to it. If the tx_data list is empty, this uses the 465 * tx_scratch message to send a no operation message. 466 */ 467 static void nvec_tx_set(struct nvec_chip *nvec) 468 { 469 spin_lock(&nvec->tx_lock); 470 if (list_empty(&nvec->tx_data)) { 471 dev_err(nvec->dev, "empty tx - sending no-op\n"); 472 memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3); 473 nvec->tx_scratch.size = 3; 474 nvec->tx_scratch.pos = 0; 475 nvec->tx = &nvec->tx_scratch; 476 list_add_tail(&nvec->tx->node, &nvec->tx_data); 477 } else { 478 nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg, 479 node); 480 nvec->tx->pos = 0; 481 } 482 spin_unlock(&nvec->tx_lock); 483 484 dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n", 485 (uint)nvec->tx->size, nvec->tx->data[1]); 486 } 487 488 /** 489 * nvec_interrupt - Interrupt handler 490 * @irq: The IRQ 491 * @dev: The nvec device 492 * 493 * Interrupt handler that fills our RX buffers and empties our TX 494 * buffers. This uses a finite state machine with ridiculous amounts 495 * of error checking, in order to be fairly reliable. 496 */ 497 static irqreturn_t nvec_interrupt(int irq, void *dev) 498 { 499 unsigned long status; 500 unsigned int received = 0; 501 unsigned char to_send = 0xff; 502 const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW; 503 struct nvec_chip *nvec = dev; 504 unsigned int state = nvec->state; 505 506 status = readl(nvec->base + I2C_SL_STATUS); 507 508 /* Filter out some errors */ 509 if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) { 510 dev_err(nvec->dev, "unexpected irq mask %lx\n", status); 511 return IRQ_HANDLED; 512 } 513 if ((status & I2C_SL_IRQ) == 0) { 514 dev_err(nvec->dev, "Spurious IRQ\n"); 515 return IRQ_HANDLED; 516 } 517 518 /* The EC did not request a read, so it send us something, read it */ 519 if ((status & RNW) == 0) { 520 received = readl(nvec->base + I2C_SL_RCVD); 521 if (status & RCVD) 522 writel(0, nvec->base + I2C_SL_RCVD); 523 } 524 525 if (status == (I2C_SL_IRQ | RCVD)) 526 nvec->state = 0; 527 528 switch (nvec->state) { 529 case 0: /* Verify that its a transfer start, the rest later */ 530 if (status != (I2C_SL_IRQ | RCVD)) 531 nvec_invalid_flags(nvec, status, false); 532 break; 533 case 1: /* command byte */ 534 if (status != I2C_SL_IRQ) { 535 nvec_invalid_flags(nvec, status, true); 536 } else { 537 nvec->rx = nvec_msg_alloc(nvec); 538 nvec->rx->data[0] = received; 539 nvec->rx->pos = 1; 540 nvec->state = 2; 541 } 542 break; 543 case 2: /* first byte after command */ 544 if (status == (I2C_SL_IRQ | RNW | RCVD)) { 545 udelay(33); 546 if (nvec->rx->data[0] != 0x01) { 547 dev_err(nvec->dev, 548 "Read without prior read command\n"); 549 nvec->state = 0; 550 break; 551 } 552 nvec_msg_free(nvec, nvec->rx); 553 nvec->state = 3; 554 nvec_tx_set(nvec); 555 BUG_ON(nvec->tx->size < 1); 556 to_send = nvec->tx->data[0]; 557 nvec->tx->pos = 1; 558 } else if (status == (I2C_SL_IRQ)) { 559 BUG_ON(nvec->rx == NULL); 560 nvec->rx->data[1] = received; 561 nvec->rx->pos = 2; 562 nvec->state = 4; 563 } else { 564 nvec_invalid_flags(nvec, status, true); 565 } 566 break; 567 case 3: /* EC does a block read, we transmit data */ 568 if (status & END_TRANS) { 569 nvec_tx_completed(nvec); 570 } else if ((status & RNW) == 0 || (status & RCVD)) { 571 nvec_invalid_flags(nvec, status, true); 572 } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) { 573 to_send = nvec->tx->data[nvec->tx->pos++]; 574 } else { 575 dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n", 576 nvec->tx, 577 (uint) (nvec->tx ? nvec->tx->pos : 0), 578 (uint) (nvec->tx ? nvec->tx->size : 0)); 579 nvec->state = 0; 580 } 581 break; 582 case 4: /* EC does some write, we read the data */ 583 if ((status & (END_TRANS | RNW)) == END_TRANS) 584 nvec_rx_completed(nvec); 585 else if (status & (RNW | RCVD)) 586 nvec_invalid_flags(nvec, status, true); 587 else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE) 588 nvec->rx->data[nvec->rx->pos++] = received; 589 else 590 dev_err(nvec->dev, 591 "RX buffer overflow on %p: " 592 "Trying to write byte %u of %u\n", 593 nvec->rx, nvec->rx->pos, NVEC_MSG_SIZE); 594 break; 595 default: 596 nvec->state = 0; 597 } 598 599 /* If we are told that a new transfer starts, verify it */ 600 if ((status & (RCVD | RNW)) == RCVD) { 601 if (received != nvec->i2c_addr) 602 dev_err(nvec->dev, 603 "received address 0x%02x, expected 0x%02x\n", 604 received, nvec->i2c_addr); 605 nvec->state = 1; 606 } 607 608 /* Send data if requested, but not on end of transmission */ 609 if ((status & (RNW | END_TRANS)) == RNW) 610 writel(to_send, nvec->base + I2C_SL_RCVD); 611 612 /* If we have send the first byte */ 613 if (status == (I2C_SL_IRQ | RNW | RCVD)) 614 nvec_gpio_set_value(nvec, 1); 615 616 dev_dbg(nvec->dev, 617 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n", 618 (status & RNW) == 0 ? "received" : "R=", 619 received, 620 (status & (RNW | END_TRANS)) ? "sent" : "S=", 621 to_send, 622 state, 623 status & END_TRANS ? " END_TRANS" : "", 624 status & RCVD ? " RCVD" : "", 625 status & RNW ? " RNW" : ""); 626 627 return IRQ_HANDLED; 628 } 629 630 static void tegra_init_i2c_slave(struct nvec_chip *nvec) 631 { 632 u32 val; 633 634 clk_enable(nvec->i2c_clk); 635 636 tegra_periph_reset_assert(nvec->i2c_clk); 637 udelay(2); 638 tegra_periph_reset_deassert(nvec->i2c_clk); 639 640 val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN | 641 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); 642 writel(val, nvec->base + I2C_CNFG); 643 644 clk_set_rate(nvec->i2c_clk, 8 * 80000); 645 646 writel(I2C_SL_NEWL, nvec->base + I2C_SL_CNFG); 647 writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT); 648 649 writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1); 650 writel(0, nvec->base + I2C_SL_ADDR2); 651 652 enable_irq(nvec->irq); 653 654 clk_disable(nvec->i2c_clk); 655 } 656 657 static void nvec_disable_i2c_slave(struct nvec_chip *nvec) 658 { 659 disable_irq(nvec->irq); 660 writel(I2C_SL_NEWL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); 661 clk_disable(nvec->i2c_clk); 662 } 663 664 static void nvec_power_off(void) 665 { 666 nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3); 667 nvec_write_async(nvec_power_handle, "\x04\x01", 2); 668 } 669 670 static int __devinit tegra_nvec_probe(struct platform_device *pdev) 671 { 672 int err, ret; 673 struct clk *i2c_clk; 674 struct nvec_platform_data *pdata = pdev->dev.platform_data; 675 struct nvec_chip *nvec; 676 struct nvec_msg *msg; 677 struct resource *res; 678 struct resource *iomem; 679 void __iomem *base; 680 681 nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL); 682 if (nvec == NULL) { 683 dev_err(&pdev->dev, "failed to reserve memory\n"); 684 return -ENOMEM; 685 } 686 platform_set_drvdata(pdev, nvec); 687 nvec->dev = &pdev->dev; 688 nvec->gpio = pdata->gpio; 689 nvec->i2c_addr = pdata->i2c_addr; 690 691 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 692 if (!res) { 693 dev_err(&pdev->dev, "no mem resource?\n"); 694 return -ENODEV; 695 } 696 697 iomem = request_mem_region(res->start, resource_size(res), pdev->name); 698 if (!iomem) { 699 dev_err(&pdev->dev, "I2C region already claimed\n"); 700 return -EBUSY; 701 } 702 703 base = ioremap(iomem->start, resource_size(iomem)); 704 if (!base) { 705 dev_err(&pdev->dev, "Can't ioremap I2C region\n"); 706 return -ENOMEM; 707 } 708 709 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 710 if (!res) { 711 dev_err(&pdev->dev, "no irq resource?\n"); 712 ret = -ENODEV; 713 goto err_iounmap; 714 } 715 716 i2c_clk = clk_get_sys("tegra-i2c.2", NULL); 717 if (IS_ERR(i2c_clk)) { 718 dev_err(nvec->dev, "failed to get controller clock\n"); 719 goto err_iounmap; 720 } 721 722 nvec->base = base; 723 nvec->irq = res->start; 724 nvec->i2c_clk = i2c_clk; 725 nvec->rx = &nvec->msg_pool[0]; 726 727 /* Set the gpio to low when we've got something to say */ 728 err = gpio_request(nvec->gpio, "nvec gpio"); 729 if (err < 0) 730 dev_err(nvec->dev, "couldn't request gpio\n"); 731 732 ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list); 733 734 init_completion(&nvec->sync_write); 735 init_completion(&nvec->ec_transfer); 736 mutex_init(&nvec->sync_write_mutex); 737 spin_lock_init(&nvec->tx_lock); 738 spin_lock_init(&nvec->rx_lock); 739 INIT_LIST_HEAD(&nvec->rx_data); 740 INIT_LIST_HEAD(&nvec->tx_data); 741 INIT_WORK(&nvec->rx_work, nvec_dispatch); 742 INIT_WORK(&nvec->tx_work, nvec_request_master); 743 nvec->wq = alloc_workqueue("nvec", WQ_NON_REENTRANT, 2); 744 745 err = request_irq(nvec->irq, nvec_interrupt, 0, "nvec", nvec); 746 if (err) { 747 dev_err(nvec->dev, "couldn't request irq\n"); 748 goto failed; 749 } 750 disable_irq(nvec->irq); 751 752 tegra_init_i2c_slave(nvec); 753 754 clk_enable(i2c_clk); 755 756 gpio_direction_output(nvec->gpio, 1); 757 gpio_set_value(nvec->gpio, 1); 758 759 /* enable event reporting */ 760 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 761 sizeof(EC_ENABLE_EVENT_REPORTING)); 762 763 nvec->nvec_status_notifier.notifier_call = nvec_status_notifier; 764 nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0); 765 766 nvec_power_handle = nvec; 767 pm_power_off = nvec_power_off; 768 769 /* Get Firmware Version */ 770 msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION, 771 sizeof(EC_GET_FIRMWARE_VERSION)); 772 773 if (msg) { 774 dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n", 775 msg->data[4], msg->data[5], msg->data[6], msg->data[7]); 776 777 nvec_msg_free(nvec, msg); 778 } 779 780 ret = mfd_add_devices(nvec->dev, -1, nvec_devices, 781 ARRAY_SIZE(nvec_devices), base, 0); 782 if (ret) 783 dev_err(nvec->dev, "error adding subdevices\n"); 784 785 /* unmute speakers? */ 786 nvec_write_async(nvec, "\x0d\x10\x59\x95", 4); 787 788 /* enable lid switch event */ 789 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7); 790 791 /* enable power button event */ 792 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7); 793 794 return 0; 795 796 err_iounmap: 797 iounmap(base); 798 failed: 799 kfree(nvec); 800 return -ENOMEM; 801 } 802 803 static int __devexit tegra_nvec_remove(struct platform_device *pdev) 804 { 805 struct nvec_chip *nvec = platform_get_drvdata(pdev); 806 807 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 808 mfd_remove_devices(nvec->dev); 809 free_irq(nvec->irq, &nvec_interrupt); 810 iounmap(nvec->base); 811 gpio_free(nvec->gpio); 812 destroy_workqueue(nvec->wq); 813 kfree(nvec); 814 815 return 0; 816 } 817 818 #ifdef CONFIG_PM 819 820 static int tegra_nvec_suspend(struct platform_device *pdev, pm_message_t state) 821 { 822 struct nvec_chip *nvec = platform_get_drvdata(pdev); 823 824 dev_dbg(nvec->dev, "suspending\n"); 825 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3); 826 nvec_write_async(nvec, "\x04\x02", 2); 827 nvec_disable_i2c_slave(nvec); 828 829 return 0; 830 } 831 832 static int tegra_nvec_resume(struct platform_device *pdev) 833 { 834 struct nvec_chip *nvec = platform_get_drvdata(pdev); 835 836 dev_dbg(nvec->dev, "resuming\n"); 837 tegra_init_i2c_slave(nvec); 838 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3); 839 840 return 0; 841 } 842 843 #else 844 #define tegra_nvec_suspend NULL 845 #define tegra_nvec_resume NULL 846 #endif 847 848 static struct platform_driver nvec_device_driver = { 849 .probe = tegra_nvec_probe, 850 .remove = __devexit_p(tegra_nvec_remove), 851 .suspend = tegra_nvec_suspend, 852 .resume = tegra_nvec_resume, 853 .driver = { 854 .name = "nvec", 855 .owner = THIS_MODULE, 856 } 857 }; 858 859 static int __init tegra_nvec_init(void) 860 { 861 return platform_driver_register(&nvec_device_driver); 862 } 863 864 module_init(tegra_nvec_init); 865 866 MODULE_ALIAS("platform:nvec"); 867 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface"); 868 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>"); 869 MODULE_LICENSE("GPL"); 870