1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Cedrus VPU driver 4 * 5 * Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net> 6 */ 7 8 /* 9 * VP8 in Cedrus shares same engine as H264. 10 * 11 * Note that it seems necessary to call bitstream parsing functions, 12 * to parse frame header, otherwise decoded image is garbage. This is 13 * contrary to what is driver supposed to do. However, values are not 14 * really used, so this might be acceptable. It's possible that bitstream 15 * parsing functions set some internal VPU state, which is later necessary 16 * for proper decoding. Biggest suspect is "VP8 probs update" trigger. 17 */ 18 19 #include <linux/delay.h> 20 #include <linux/types.h> 21 22 #include <media/videobuf2-dma-contig.h> 23 24 #include "cedrus.h" 25 #include "cedrus_hw.h" 26 #include "cedrus_regs.h" 27 28 #define CEDRUS_ENTROPY_PROBS_SIZE 0x2400 29 #define VP8_PROB_HALF 128 30 #define QUANT_DELTA_COUNT 5 31 32 /* 33 * This table comes from the concatenation of k_coeff_entropy_update_probs, 34 * kf_ymode_prob, default_mv_context, etc. It is provided in this form in 35 * order to avoid computing it every time the driver is initialised, and is 36 * suitable for direct consumption by the hardware. 37 */ 38 static const u8 prob_table_init[] = { 39 /* k_coeff_entropy_update_probs */ 40 /* block 0 */ 41 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 42 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 43 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 44 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 45 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 46 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 47 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 48 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 49 50 0xB0, 0xF6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 51 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 52 0xDF, 0xF1, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 53 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 54 0xF9, 0xFD, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 55 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 58 59 0xFF, 0xF4, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 60 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 61 0xEA, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 62 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 63 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 64 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 67 68 0xFF, 0xF6, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 69 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 70 0xEF, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 71 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 72 0xFE, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 73 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 76 77 0xFF, 0xF8, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 78 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 79 0xFB, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 80 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 81 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 82 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 85 86 0xFF, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 87 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 88 0xFB, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 89 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 90 0xFE, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 91 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 94 95 0xFF, 0xFE, 0xFD, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 96 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 97 0xFA, 0xFF, 0xFE, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 98 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 99 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 100 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 103 104 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 105 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 106 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 107 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 108 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 109 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 110 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 112 113 /* block 1 */ 114 0xD9, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 115 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 116 0xE1, 0xFC, 0xF1, 0xFD, 0xFF, 0xFF, 0xFE, 0xFF, 117 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 118 0xEA, 0xFA, 0xF1, 0xFA, 0xFD, 0xFF, 0xFD, 0xFE, 119 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 122 123 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 124 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 125 0xDF, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 126 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 127 0xEE, 0xFD, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 128 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 131 132 0xFF, 0xF8, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 133 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 134 0xF9, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 135 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 136 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 137 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 140 141 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 142 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 143 0xF7, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 144 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 145 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 146 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 147 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 149 150 0xFF, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 151 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 152 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 153 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 154 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 155 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 158 159 0xFF, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 160 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 161 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 162 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 163 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 164 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 165 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 167 168 0xFF, 0xFE, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 169 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 170 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 171 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 172 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 173 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 174 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 176 177 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 178 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 179 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 180 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 181 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 182 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 185 186 /* block 2 */ 187 0xBA, 0xFB, 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 188 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 189 0xEA, 0xFB, 0xF4, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 190 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 191 0xFB, 0xFB, 0xF3, 0xFD, 0xFE, 0xFF, 0xFE, 0xFF, 192 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 194 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 195 196 0xFF, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 197 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 198 0xEC, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 199 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 200 0xFB, 0xFD, 0xFD, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 201 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 204 205 0xFF, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 206 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 207 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 208 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 209 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 210 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 211 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 212 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 213 214 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 215 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 216 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 217 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 218 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 219 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 220 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 221 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 222 223 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 224 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 225 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 226 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 227 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 228 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 229 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 230 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 231 232 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 233 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 234 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 235 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 236 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 237 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 238 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 239 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 240 241 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 242 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 243 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 244 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 245 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 246 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 247 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 248 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 249 250 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 251 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 252 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 253 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 254 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 255 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 256 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 257 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 258 259 /* block 3 */ 260 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 261 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 262 0xFA, 0xFE, 0xFC, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 263 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 264 0xF8, 0xFE, 0xF9, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 265 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 266 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 267 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 268 269 0xFF, 0xFD, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 270 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 271 0xF6, 0xFD, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 272 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 273 0xFC, 0xFE, 0xFB, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 274 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 275 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 276 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 277 278 0xFF, 0xFE, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 279 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 280 0xF8, 0xFE, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 281 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 282 0xFD, 0xFF, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 283 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 284 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 285 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 286 287 0xFF, 0xFB, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 288 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 289 0xF5, 0xFB, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 290 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 291 0xFD, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 292 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 293 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 294 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 295 296 0xFF, 0xFB, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 297 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 298 0xFC, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 299 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 300 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 301 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 302 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 303 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 304 305 0xFF, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 306 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 307 0xF9, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 308 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 309 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 310 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 311 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 312 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 313 314 0xFF, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 315 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 316 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 317 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 318 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 319 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 320 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 321 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 322 323 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 324 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 325 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 326 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 327 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 328 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 329 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 330 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 331 332 /* kf_y_mode_probs */ 333 0x91, 0x9C, 0xA3, 0x80, 0x00, 0x00, 0x00, 0x00, 334 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 336 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 337 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 338 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 339 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 340 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 341 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 343 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 345 346 /* split_mv_probs */ 347 0x6E, 0x6F, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 348 349 /* bmode_prob */ 350 0x78, 0x5A, 0x4F, 0x85, 0x57, 0x55, 0x50, 0x6F, 351 0x97, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 352 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 353 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 354 355 /* sub_mv_ref_prob */ 356 0x93, 0x88, 0x12, 0x00, 357 0x6A, 0x91, 0x01, 0x00, 358 0xB3, 0x79, 0x01, 0x00, 359 0xDF, 0x01, 0x22, 0x00, 360 0xD0, 0x01, 0x01, 0x00, 361 0x00, 0x00, 0x00, 0x00, 362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 363 364 /* mv_counts_to_probs */ 365 0x07, 0x01, 0x01, 0x8F, 366 0x0E, 0x12, 0x0E, 0x6B, 367 0x87, 0x40, 0x39, 0x44, 368 0x3C, 0x38, 0x80, 0x41, 369 0x9F, 0x86, 0x80, 0x22, 370 0xEA, 0xBC, 0x80, 0x1C, 371 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 372 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 373 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 374 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 375 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 376 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 377 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 378 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 379 380 /* kf_y_mode_tree */ 381 0x84, 0x02, 0x04, 0x06, 0x80, 0x81, 0x82, 0x83, 382 383 /* y_mode_tree */ 384 0x80, 0x02, 0x04, 0x06, 0x81, 0x82, 0x83, 0x84, 385 386 /* uv_mode_tree */ 387 0x80, 0x02, 0x81, 0x04, 0x82, 0x83, 0x00, 0x00, 388 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 389 0x00, 0x00, 390 391 /* small_mv_tree */ 392 0x02, 0x08, 0x04, 0x06, 0x80, 0x81, 0x82, 0x83, 393 0x0A, 0x0C, 0x84, 0x85, 0x86, 0x87, 0x00, 0x00, 394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 395 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 396 397 /* small_mv_tree again */ 398 0x02, 0x08, 0x04, 0x06, 0x80, 0x81, 0x82, 0x83, 399 0x0A, 0x0C, 0x84, 0x85, 0x86, 0x87, 0x00, 0x00, 400 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 401 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 402 403 /* split_mv_tree */ 404 0x83, 0x02, 0x82, 0x04, 0x80, 0x81, 0x00, 0x00, 405 406 /* b_mode_tree */ 407 0x80, 0x02, 0x81, 0x04, 0x82, 0x06, 0x08, 0x0C, 408 0x83, 0x0A, 0x85, 0x86, 0x84, 0x0E, 0x87, 0x10, 409 0x88, 0x89, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 410 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 411 412 /* submv_ref_tree */ 413 0x8A, 0x02, 0x8B, 0x04, 0x8C, 0x8D, 0x00, 0x00, 414 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 415 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 416 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 417 418 /* mv_ref_tree */ 419 0x87, 0x02, 0x85, 0x04, 0x86, 0x06, 0x88, 0x89, 420 }; 421 422 /* 423 * This table is a copy of k_mv_entropy_update_probs from the VP8 424 * specification. 425 * 426 * FIXME: If any other driver uses it, we can consider moving 427 * this table so it can be shared. 428 */ 429 static const u8 k_mv_entropy_update_probs[2][V4L2_VP8_MV_PROB_CNT] = { 430 { 237, 246, 253, 253, 254, 254, 254, 254, 254, 431 254, 254, 254, 254, 254, 250, 250, 252, 254, 254 }, 432 { 231, 243, 245, 253, 254, 254, 254, 254, 254, 433 254, 254, 254, 254, 254, 251, 251, 254, 254, 254 } 434 }; 435 436 static uint8_t read_bits(struct cedrus_dev *dev, unsigned int bits_count, 437 unsigned int probability) 438 { 439 cedrus_write(dev, VE_H264_TRIGGER_TYPE, 440 VE_H264_TRIGGER_TYPE_VP8_GET_BITS | 441 VE_H264_TRIGGER_TYPE_BIN_LENS(bits_count) | 442 VE_H264_TRIGGER_TYPE_PROBABILITY(probability)); 443 444 cedrus_wait_for(dev, VE_H264_STATUS, VE_H264_STATUS_VLD_BUSY); 445 446 return cedrus_read(dev, VE_H264_BASIC_BITS); 447 } 448 449 static void get_delta_q(struct cedrus_dev *dev) 450 { 451 if (read_bits(dev, 1, VP8_PROB_HALF)) { 452 read_bits(dev, 4, VP8_PROB_HALF); 453 read_bits(dev, 1, VP8_PROB_HALF); 454 } 455 } 456 457 static void process_segmentation_info(struct cedrus_dev *dev) 458 { 459 int update, i; 460 461 update = read_bits(dev, 1, VP8_PROB_HALF); 462 463 if (read_bits(dev, 1, VP8_PROB_HALF)) { 464 read_bits(dev, 1, VP8_PROB_HALF); 465 466 for (i = 0; i < 4; i++) 467 if (read_bits(dev, 1, VP8_PROB_HALF)) { 468 read_bits(dev, 7, VP8_PROB_HALF); 469 read_bits(dev, 1, VP8_PROB_HALF); 470 } 471 472 for (i = 0; i < 4; i++) 473 if (read_bits(dev, 1, VP8_PROB_HALF)) { 474 read_bits(dev, 6, VP8_PROB_HALF); 475 read_bits(dev, 1, VP8_PROB_HALF); 476 } 477 } 478 479 if (update) 480 for (i = 0; i < 3; i++) 481 if (read_bits(dev, 1, VP8_PROB_HALF)) 482 read_bits(dev, 8, VP8_PROB_HALF); 483 } 484 485 static void process_ref_lf_delta_info(struct cedrus_dev *dev) 486 { 487 if (read_bits(dev, 1, VP8_PROB_HALF)) { 488 int i; 489 490 for (i = 0; i < 4; i++) 491 if (read_bits(dev, 1, VP8_PROB_HALF)) { 492 read_bits(dev, 6, VP8_PROB_HALF); 493 read_bits(dev, 1, VP8_PROB_HALF); 494 } 495 496 for (i = 0; i < 4; i++) 497 if (read_bits(dev, 1, VP8_PROB_HALF)) { 498 read_bits(dev, 6, VP8_PROB_HALF); 499 read_bits(dev, 1, VP8_PROB_HALF); 500 } 501 } 502 } 503 504 static void process_ref_frame_info(struct cedrus_dev *dev) 505 { 506 u8 refresh_golden_frame = read_bits(dev, 1, VP8_PROB_HALF); 507 u8 refresh_alt_ref_frame = read_bits(dev, 1, VP8_PROB_HALF); 508 509 if (!refresh_golden_frame) 510 read_bits(dev, 2, VP8_PROB_HALF); 511 512 if (!refresh_alt_ref_frame) 513 read_bits(dev, 2, VP8_PROB_HALF); 514 515 read_bits(dev, 1, VP8_PROB_HALF); 516 read_bits(dev, 1, VP8_PROB_HALF); 517 } 518 519 static void cedrus_irq_clear(struct cedrus_dev *dev) 520 { 521 cedrus_write(dev, VE_H264_STATUS, 522 VE_H264_STATUS_INT_MASK); 523 } 524 525 static void cedrus_read_header(struct cedrus_dev *dev, 526 const struct v4l2_ctrl_vp8_frame *slice) 527 { 528 int i, j; 529 530 if (V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) { 531 read_bits(dev, 1, VP8_PROB_HALF); 532 read_bits(dev, 1, VP8_PROB_HALF); 533 } 534 535 if (read_bits(dev, 1, VP8_PROB_HALF)) 536 process_segmentation_info(dev); 537 538 read_bits(dev, 1, VP8_PROB_HALF); 539 read_bits(dev, 6, VP8_PROB_HALF); 540 read_bits(dev, 3, VP8_PROB_HALF); 541 542 if (read_bits(dev, 1, VP8_PROB_HALF)) 543 process_ref_lf_delta_info(dev); 544 545 read_bits(dev, 2, VP8_PROB_HALF); 546 547 /* y_ac_qi */ 548 read_bits(dev, 7, VP8_PROB_HALF); 549 550 /* Parses y_dc_delta, y2_dc_delta, etc. */ 551 for (i = 0; i < QUANT_DELTA_COUNT; i++) 552 get_delta_q(dev); 553 554 if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) 555 process_ref_frame_info(dev); 556 557 read_bits(dev, 1, VP8_PROB_HALF); 558 559 if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) 560 read_bits(dev, 1, VP8_PROB_HALF); 561 562 cedrus_write(dev, VE_H264_TRIGGER_TYPE, VE_H264_TRIGGER_TYPE_VP8_UPDATE_COEF); 563 cedrus_wait_for(dev, VE_H264_STATUS, VE_H264_STATUS_VP8_UPPROB_BUSY); 564 cedrus_irq_clear(dev); 565 566 if (read_bits(dev, 1, VP8_PROB_HALF)) 567 read_bits(dev, 8, VP8_PROB_HALF); 568 569 if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) { 570 read_bits(dev, 8, VP8_PROB_HALF); 571 read_bits(dev, 8, VP8_PROB_HALF); 572 read_bits(dev, 8, VP8_PROB_HALF); 573 574 if (read_bits(dev, 1, VP8_PROB_HALF)) { 575 read_bits(dev, 8, VP8_PROB_HALF); 576 read_bits(dev, 8, VP8_PROB_HALF); 577 read_bits(dev, 8, VP8_PROB_HALF); 578 read_bits(dev, 8, VP8_PROB_HALF); 579 } 580 581 if (read_bits(dev, 1, VP8_PROB_HALF)) { 582 read_bits(dev, 8, VP8_PROB_HALF); 583 read_bits(dev, 8, VP8_PROB_HALF); 584 read_bits(dev, 8, VP8_PROB_HALF); 585 } 586 587 for (i = 0; i < 2; i++) 588 for (j = 0; j < V4L2_VP8_MV_PROB_CNT; j++) 589 if (read_bits(dev, 1, k_mv_entropy_update_probs[i][j])) 590 read_bits(dev, 7, VP8_PROB_HALF); 591 } 592 } 593 594 static void cedrus_vp8_update_probs(const struct v4l2_ctrl_vp8_frame *slice, 595 u8 *prob_table) 596 { 597 int i, j, k; 598 599 memcpy(&prob_table[0x1008], slice->entropy.y_mode_probs, 600 sizeof(slice->entropy.y_mode_probs)); 601 memcpy(&prob_table[0x1010], slice->entropy.uv_mode_probs, 602 sizeof(slice->entropy.uv_mode_probs)); 603 604 memcpy(&prob_table[0x1018], slice->segment.segment_probs, 605 sizeof(slice->segment.segment_probs)); 606 607 prob_table[0x101c] = slice->prob_skip_false; 608 prob_table[0x101d] = slice->prob_intra; 609 prob_table[0x101e] = slice->prob_last; 610 prob_table[0x101f] = slice->prob_gf; 611 612 memcpy(&prob_table[0x1020], slice->entropy.mv_probs[0], 613 V4L2_VP8_MV_PROB_CNT); 614 memcpy(&prob_table[0x1040], slice->entropy.mv_probs[1], 615 V4L2_VP8_MV_PROB_CNT); 616 617 for (i = 0; i < 4; ++i) 618 for (j = 0; j < 8; ++j) 619 for (k = 0; k < 3; ++k) 620 memcpy(&prob_table[i * 512 + j * 64 + k * 16], 621 slice->entropy.coeff_probs[i][j][k], 11); 622 } 623 624 static enum cedrus_irq_status 625 cedrus_vp8_irq_status(struct cedrus_ctx *ctx) 626 { 627 struct cedrus_dev *dev = ctx->dev; 628 u32 reg = cedrus_read(dev, VE_H264_STATUS); 629 630 if (reg & (VE_H264_STATUS_DECODE_ERR_INT | 631 VE_H264_STATUS_VLD_DATA_REQ_INT)) 632 return CEDRUS_IRQ_ERROR; 633 634 if (reg & VE_H264_CTRL_SLICE_DECODE_INT) 635 return CEDRUS_IRQ_OK; 636 637 return CEDRUS_IRQ_NONE; 638 } 639 640 static void cedrus_vp8_irq_clear(struct cedrus_ctx *ctx) 641 { 642 cedrus_irq_clear(ctx->dev); 643 } 644 645 static void cedrus_vp8_irq_disable(struct cedrus_ctx *ctx) 646 { 647 struct cedrus_dev *dev = ctx->dev; 648 u32 reg = cedrus_read(dev, VE_H264_CTRL); 649 650 cedrus_write(dev, VE_H264_CTRL, 651 reg & ~VE_H264_CTRL_INT_MASK); 652 } 653 654 static int cedrus_vp8_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) 655 { 656 const struct v4l2_ctrl_vp8_frame *slice = run->vp8.frame_params; 657 struct vb2_queue *cap_q = &ctx->fh.m2m_ctx->cap_q_ctx.q; 658 struct vb2_buffer *src_buf = &run->src->vb2_buf; 659 struct cedrus_dev *dev = ctx->dev; 660 dma_addr_t luma_addr, chroma_addr; 661 dma_addr_t src_buf_addr; 662 int header_size; 663 u32 reg; 664 665 cedrus_engine_enable(ctx); 666 667 cedrus_write(dev, VE_H264_CTRL, VE_H264_CTRL_VP8); 668 669 cedrus_vp8_update_probs(slice, ctx->codec.vp8.entropy_probs_buf); 670 671 reg = slice->first_part_size * 8; 672 cedrus_write(dev, VE_VP8_FIRST_DATA_PART_LEN, reg); 673 674 header_size = V4L2_VP8_FRAME_IS_KEY_FRAME(slice) ? 10 : 3; 675 676 reg = slice->first_part_size + header_size; 677 cedrus_write(dev, VE_VP8_PART_SIZE_OFFSET, reg); 678 679 reg = vb2_plane_size(src_buf, 0) * 8; 680 cedrus_write(dev, VE_H264_VLD_LEN, reg); 681 682 /* 683 * FIXME: There is a problem if frame header is skipped (adding 684 * first_part_header_bits to offset). It seems that functions 685 * for parsing bitstreams change internal state of VPU in some 686 * way that can't be otherwise set. Maybe this can be bypassed 687 * by somehow fixing probability table buffer? 688 */ 689 reg = header_size * 8; 690 cedrus_write(dev, VE_H264_VLD_OFFSET, reg); 691 692 src_buf_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); 693 cedrus_write(dev, VE_H264_VLD_END, 694 src_buf_addr + vb2_get_plane_payload(src_buf, 0)); 695 cedrus_write(dev, VE_H264_VLD_ADDR, 696 VE_H264_VLD_ADDR_VAL(src_buf_addr) | 697 VE_H264_VLD_ADDR_FIRST | VE_H264_VLD_ADDR_VALID | 698 VE_H264_VLD_ADDR_LAST); 699 700 cedrus_write(dev, VE_H264_TRIGGER_TYPE, 701 VE_H264_TRIGGER_TYPE_INIT_SWDEC); 702 703 cedrus_write(dev, VE_VP8_ENTROPY_PROBS_ADDR, 704 ctx->codec.vp8.entropy_probs_buf_dma); 705 706 reg = 0; 707 switch (slice->version) { 708 case 1: 709 reg |= VE_VP8_PPS_FILTER_TYPE_SIMPLE; 710 reg |= VE_VP8_PPS_BILINEAR_MC_FILTER; 711 break; 712 case 2: 713 reg |= VE_VP8_PPS_LPF_DISABLE; 714 reg |= VE_VP8_PPS_BILINEAR_MC_FILTER; 715 break; 716 case 3: 717 reg |= VE_VP8_PPS_LPF_DISABLE; 718 reg |= VE_VP8_PPS_FULL_PIXEL; 719 break; 720 } 721 if (slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_UPDATE_MAP) 722 reg |= VE_VP8_PPS_UPDATE_MB_SEGMENTATION_MAP; 723 if (!(slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_DELTA_VALUE_MODE)) 724 reg |= VE_VP8_PPS_MB_SEGMENT_ABS_DELTA; 725 if (slice->segment.flags & V4L2_VP8_SEGMENT_FLAG_ENABLED) 726 reg |= VE_VP8_PPS_SEGMENTATION_ENABLE; 727 if (ctx->codec.vp8.last_filter_type) 728 reg |= VE_VP8_PPS_LAST_LOOP_FILTER_SIMPLE; 729 reg |= VE_VP8_PPS_SHARPNESS_LEVEL(slice->lf.sharpness_level); 730 if (slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE) 731 reg |= VE_VP8_PPS_LOOP_FILTER_SIMPLE; 732 reg |= VE_VP8_PPS_LOOP_FILTER_LEVEL(slice->lf.level); 733 if (slice->lf.flags & V4L2_VP8_LF_ADJ_ENABLE) 734 reg |= VE_VP8_PPS_MODE_REF_LF_DELTA_ENABLE; 735 if (slice->lf.flags & V4L2_VP8_LF_DELTA_UPDATE) 736 reg |= VE_VP8_PPS_MODE_REF_LF_DELTA_UPDATE; 737 reg |= VE_VP8_PPS_TOKEN_PARTITION(ilog2(slice->num_dct_parts)); 738 if (slice->flags & V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF) 739 reg |= VE_VP8_PPS_MB_NO_COEFF_SKIP; 740 reg |= VE_VP8_PPS_RELOAD_ENTROPY_PROBS; 741 if (slice->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN) 742 reg |= VE_VP8_PPS_GOLDEN_SIGN_BIAS; 743 if (slice->flags & V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT) 744 reg |= VE_VP8_PPS_ALTREF_SIGN_BIAS; 745 if (ctx->codec.vp8.last_frame_p_type) 746 reg |= VE_VP8_PPS_LAST_PIC_TYPE_P_FRAME; 747 reg |= VE_VP8_PPS_LAST_SHARPNESS_LEVEL(ctx->codec.vp8.last_sharpness_level); 748 if (!(slice->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME)) 749 reg |= VE_VP8_PPS_PIC_TYPE_P_FRAME; 750 cedrus_write(dev, VE_VP8_PPS, reg); 751 752 cedrus_read_header(dev, slice); 753 754 /* reset registers changed by HW */ 755 cedrus_write(dev, VE_H264_CUR_MB_NUM, 0); 756 cedrus_write(dev, VE_H264_MB_ADDR, 0); 757 cedrus_write(dev, VE_H264_ERROR_CASE, 0); 758 759 reg = 0; 760 reg |= VE_VP8_QP_INDEX_DELTA_UVAC(slice->quant.uv_ac_delta); 761 reg |= VE_VP8_QP_INDEX_DELTA_UVDC(slice->quant.uv_dc_delta); 762 reg |= VE_VP8_QP_INDEX_DELTA_Y2AC(slice->quant.y2_ac_delta); 763 reg |= VE_VP8_QP_INDEX_DELTA_Y2DC(slice->quant.y2_dc_delta); 764 reg |= VE_VP8_QP_INDEX_DELTA_Y1DC(slice->quant.y_dc_delta); 765 reg |= VE_VP8_QP_INDEX_DELTA_BASE_QINDEX(slice->quant.y_ac_qi); 766 cedrus_write(dev, VE_VP8_QP_INDEX_DELTA, reg); 767 768 reg = 0; 769 reg |= VE_VP8_FSIZE_WIDTH(slice->width); 770 reg |= VE_VP8_FSIZE_HEIGHT(slice->height); 771 cedrus_write(dev, VE_VP8_FSIZE, reg); 772 773 reg = 0; 774 reg |= VE_VP8_PICSIZE_WIDTH(slice->width); 775 reg |= VE_VP8_PICSIZE_HEIGHT(slice->height); 776 cedrus_write(dev, VE_VP8_PICSIZE, reg); 777 778 reg = 0; 779 reg |= VE_VP8_SEGMENT3(slice->segment.quant_update[3]); 780 reg |= VE_VP8_SEGMENT2(slice->segment.quant_update[2]); 781 reg |= VE_VP8_SEGMENT1(slice->segment.quant_update[1]); 782 reg |= VE_VP8_SEGMENT0(slice->segment.quant_update[0]); 783 cedrus_write(dev, VE_VP8_SEGMENT_FEAT_MB_LV0, reg); 784 785 reg = 0; 786 reg |= VE_VP8_SEGMENT3(slice->segment.lf_update[3]); 787 reg |= VE_VP8_SEGMENT2(slice->segment.lf_update[2]); 788 reg |= VE_VP8_SEGMENT1(slice->segment.lf_update[1]); 789 reg |= VE_VP8_SEGMENT0(slice->segment.lf_update[0]); 790 cedrus_write(dev, VE_VP8_SEGMENT_FEAT_MB_LV1, reg); 791 792 reg = 0; 793 reg |= VE_VP8_LF_DELTA3(slice->lf.ref_frm_delta[3]); 794 reg |= VE_VP8_LF_DELTA2(slice->lf.ref_frm_delta[2]); 795 reg |= VE_VP8_LF_DELTA1(slice->lf.ref_frm_delta[1]); 796 reg |= VE_VP8_LF_DELTA0(slice->lf.ref_frm_delta[0]); 797 cedrus_write(dev, VE_VP8_REF_LF_DELTA, reg); 798 799 reg = 0; 800 reg |= VE_VP8_LF_DELTA3(slice->lf.mb_mode_delta[3]); 801 reg |= VE_VP8_LF_DELTA2(slice->lf.mb_mode_delta[2]); 802 reg |= VE_VP8_LF_DELTA1(slice->lf.mb_mode_delta[1]); 803 reg |= VE_VP8_LF_DELTA0(slice->lf.mb_mode_delta[0]); 804 cedrus_write(dev, VE_VP8_MODE_LF_DELTA, reg); 805 806 luma_addr = cedrus_dst_buf_addr(ctx, &run->dst->vb2_buf, 0); 807 chroma_addr = cedrus_dst_buf_addr(ctx, &run->dst->vb2_buf, 1); 808 cedrus_write(dev, VE_VP8_REC_LUMA, luma_addr); 809 cedrus_write(dev, VE_VP8_REC_CHROMA, chroma_addr); 810 811 cedrus_write_ref_buf_addr(ctx, cap_q, slice->last_frame_ts, 812 VE_VP8_FWD_LUMA, VE_VP8_FWD_CHROMA); 813 cedrus_write_ref_buf_addr(ctx, cap_q, slice->golden_frame_ts, 814 VE_VP8_BWD_LUMA, VE_VP8_BWD_CHROMA); 815 cedrus_write_ref_buf_addr(ctx, cap_q, slice->alt_frame_ts, 816 VE_VP8_ALT_LUMA, VE_VP8_ALT_CHROMA); 817 818 cedrus_write(dev, VE_H264_CTRL, VE_H264_CTRL_VP8 | 819 VE_H264_CTRL_DECODE_ERR_INT | 820 VE_H264_CTRL_SLICE_DECODE_INT); 821 822 if (slice->lf.level) { 823 ctx->codec.vp8.last_filter_type = 824 !!(slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE); 825 ctx->codec.vp8.last_frame_p_type = 826 !V4L2_VP8_FRAME_IS_KEY_FRAME(slice); 827 ctx->codec.vp8.last_sharpness_level = 828 slice->lf.sharpness_level; 829 } 830 831 return 0; 832 } 833 834 static int cedrus_vp8_start(struct cedrus_ctx *ctx) 835 { 836 struct cedrus_dev *dev = ctx->dev; 837 838 ctx->codec.vp8.entropy_probs_buf = 839 dma_alloc_coherent(dev->dev, CEDRUS_ENTROPY_PROBS_SIZE, 840 &ctx->codec.vp8.entropy_probs_buf_dma, 841 GFP_KERNEL); 842 if (!ctx->codec.vp8.entropy_probs_buf) 843 return -ENOMEM; 844 845 /* 846 * This offset has been discovered by reverse engineering, we don’t know 847 * what it actually means. 848 */ 849 memcpy(&ctx->codec.vp8.entropy_probs_buf[2048], 850 prob_table_init, sizeof(prob_table_init)); 851 852 return 0; 853 } 854 855 static void cedrus_vp8_stop(struct cedrus_ctx *ctx) 856 { 857 struct cedrus_dev *dev = ctx->dev; 858 859 cedrus_engine_disable(dev); 860 861 dma_free_coherent(dev->dev, CEDRUS_ENTROPY_PROBS_SIZE, 862 ctx->codec.vp8.entropy_probs_buf, 863 ctx->codec.vp8.entropy_probs_buf_dma); 864 } 865 866 static void cedrus_vp8_trigger(struct cedrus_ctx *ctx) 867 { 868 struct cedrus_dev *dev = ctx->dev; 869 870 cedrus_write(dev, VE_H264_TRIGGER_TYPE, 871 VE_H264_TRIGGER_TYPE_VP8_SLICE_DECODE); 872 } 873 874 struct cedrus_dec_ops cedrus_dec_ops_vp8 = { 875 .irq_clear = cedrus_vp8_irq_clear, 876 .irq_disable = cedrus_vp8_irq_disable, 877 .irq_status = cedrus_vp8_irq_status, 878 .setup = cedrus_vp8_setup, 879 .start = cedrus_vp8_start, 880 .stop = cedrus_vp8_stop, 881 .trigger = cedrus_vp8_trigger, 882 }; 883