1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cedrus VPU driver
4  *
5  * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com>
6  * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com>
7  * Copyright (C) 2018 Bootlin
8  *
9  * Based on the vim2m driver, that is:
10  *
11  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
12  * Pawel Osciak, <pawel@osciak.com>
13  * Marek Szyprowski, <m.szyprowski@samsung.com>
14  */
15 
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-ioctl.h>
18 #include <media/v4l2-event.h>
19 #include <media/v4l2-mem2mem.h>
20 
21 #include "cedrus.h"
22 #include "cedrus_dec.h"
23 #include "cedrus_hw.h"
24 
25 void cedrus_device_run(void *priv)
26 {
27 	struct cedrus_ctx *ctx = priv;
28 	struct cedrus_dev *dev = ctx->dev;
29 	struct cedrus_run run = {};
30 	struct media_request *src_req;
31 
32 	run.src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
33 	run.dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
34 
35 	/* Apply request(s) controls if needed. */
36 	src_req = run.src->vb2_buf.req_obj.req;
37 
38 	if (src_req)
39 		v4l2_ctrl_request_setup(src_req, &ctx->hdl);
40 
41 	switch (ctx->src_fmt.pixelformat) {
42 	case V4L2_PIX_FMT_MPEG2_SLICE:
43 		run.mpeg2.sequence = cedrus_find_control_data(ctx,
44 			V4L2_CID_STATELESS_MPEG2_SEQUENCE);
45 		run.mpeg2.picture = cedrus_find_control_data(ctx,
46 			V4L2_CID_STATELESS_MPEG2_PICTURE);
47 		run.mpeg2.quantisation = cedrus_find_control_data(ctx,
48 			V4L2_CID_STATELESS_MPEG2_QUANTISATION);
49 		break;
50 
51 	case V4L2_PIX_FMT_H264_SLICE:
52 		run.h264.decode_params = cedrus_find_control_data(ctx,
53 			V4L2_CID_STATELESS_H264_DECODE_PARAMS);
54 		run.h264.pps = cedrus_find_control_data(ctx,
55 			V4L2_CID_STATELESS_H264_PPS);
56 		run.h264.scaling_matrix = cedrus_find_control_data(ctx,
57 			V4L2_CID_STATELESS_H264_SCALING_MATRIX);
58 		run.h264.slice_params = cedrus_find_control_data(ctx,
59 			V4L2_CID_STATELESS_H264_SLICE_PARAMS);
60 		run.h264.sps = cedrus_find_control_data(ctx,
61 			V4L2_CID_STATELESS_H264_SPS);
62 		run.h264.pred_weights = cedrus_find_control_data(ctx,
63 			V4L2_CID_STATELESS_H264_PRED_WEIGHTS);
64 		break;
65 
66 	case V4L2_PIX_FMT_HEVC_SLICE:
67 		run.h265.sps = cedrus_find_control_data(ctx,
68 			V4L2_CID_MPEG_VIDEO_HEVC_SPS);
69 		run.h265.pps = cedrus_find_control_data(ctx,
70 			V4L2_CID_MPEG_VIDEO_HEVC_PPS);
71 		run.h265.slice_params = cedrus_find_control_data(ctx,
72 			V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS);
73 		run.h265.decode_params = cedrus_find_control_data(ctx,
74 			V4L2_CID_MPEG_VIDEO_HEVC_DECODE_PARAMS);
75 		break;
76 
77 	case V4L2_PIX_FMT_VP8_FRAME:
78 		run.vp8.frame_params = cedrus_find_control_data(ctx,
79 			V4L2_CID_STATELESS_VP8_FRAME);
80 		break;
81 
82 	default:
83 		break;
84 	}
85 
86 	v4l2_m2m_buf_copy_metadata(run.src, run.dst, true);
87 
88 	cedrus_dst_format_set(dev, &ctx->dst_fmt);
89 
90 	dev->dec_ops[ctx->current_codec]->setup(ctx, &run);
91 
92 	/* Complete request(s) controls if needed. */
93 
94 	if (src_req)
95 		v4l2_ctrl_request_complete(src_req, &ctx->hdl);
96 
97 	dev->dec_ops[ctx->current_codec]->trigger(ctx);
98 }
99