1fc96d58cSSergio Aguirre /*
2fc96d58cSSergio Aguirre  * TI OMAP4 ISS V4L2 Driver - Generic video node
3fc96d58cSSergio Aguirre  *
4fc96d58cSSergio Aguirre  * Copyright (C) 2012 Texas Instruments, Inc.
5fc96d58cSSergio Aguirre  *
6fc96d58cSSergio Aguirre  * Author: Sergio Aguirre <sergio.a.aguirre@gmail.com>
7fc96d58cSSergio Aguirre  *
8fc96d58cSSergio Aguirre  * This program is free software; you can redistribute it and/or modify
9fc96d58cSSergio Aguirre  * it under the terms of the GNU General Public License as published by
10fc96d58cSSergio Aguirre  * the Free Software Foundation; either version 2 of the License, or
11fc96d58cSSergio Aguirre  * (at your option) any later version.
12fc96d58cSSergio Aguirre  */
13fc96d58cSSergio Aguirre 
14fc96d58cSSergio Aguirre #ifndef OMAP4_ISS_VIDEO_H
15fc96d58cSSergio Aguirre #define OMAP4_ISS_VIDEO_H
16fc96d58cSSergio Aguirre 
17fc96d58cSSergio Aguirre #include <linux/v4l2-mediabus.h>
18fc96d58cSSergio Aguirre #include <media/media-entity.h>
19fc96d58cSSergio Aguirre #include <media/v4l2-dev.h>
20fc96d58cSSergio Aguirre #include <media/v4l2-fh.h>
21fc96d58cSSergio Aguirre #include <media/videobuf2-core.h>
22fc96d58cSSergio Aguirre #include <media/videobuf2-dma-contig.h>
23fc96d58cSSergio Aguirre 
24fc96d58cSSergio Aguirre #define ISS_VIDEO_DRIVER_NAME		"issvideo"
25fc96d58cSSergio Aguirre #define ISS_VIDEO_DRIVER_VERSION	"0.0.2"
26fc96d58cSSergio Aguirre 
27fc96d58cSSergio Aguirre struct iss_device;
28fc96d58cSSergio Aguirre struct iss_video;
29fc96d58cSSergio Aguirre struct v4l2_mbus_framefmt;
30fc96d58cSSergio Aguirre struct v4l2_pix_format;
31fc96d58cSSergio Aguirre 
32fc96d58cSSergio Aguirre /*
33fc96d58cSSergio Aguirre  * struct iss_format_info - ISS media bus format information
34fc96d58cSSergio Aguirre  * @code: V4L2 media bus format code
35fc96d58cSSergio Aguirre  * @truncated: V4L2 media bus format code for the same format truncated to 10
36fc96d58cSSergio Aguirre  *	bits. Identical to @code if the format is 10 bits wide or less.
37fc96d58cSSergio Aguirre  * @uncompressed: V4L2 media bus format code for the corresponding uncompressed
38fc96d58cSSergio Aguirre  *	format. Identical to @code if the format is not DPCM compressed.
39fc96d58cSSergio Aguirre  * @flavor: V4L2 media bus format code for the same pixel layout but
40fc96d58cSSergio Aguirre  *	shifted to be 8 bits per pixel. =0 if format is not shiftable.
41fc96d58cSSergio Aguirre  * @pixelformat: V4L2 pixel format FCC identifier
42fc96d58cSSergio Aguirre  * @bpp: Bits per pixel
43a1d4eab0SLaurent Pinchart  * @description: Human-readable format description
44fc96d58cSSergio Aguirre  */
45fc96d58cSSergio Aguirre struct iss_format_info {
46fc96d58cSSergio Aguirre 	enum v4l2_mbus_pixelcode code;
47fc96d58cSSergio Aguirre 	enum v4l2_mbus_pixelcode truncated;
48fc96d58cSSergio Aguirre 	enum v4l2_mbus_pixelcode uncompressed;
49fc96d58cSSergio Aguirre 	enum v4l2_mbus_pixelcode flavor;
50fc96d58cSSergio Aguirre 	u32 pixelformat;
51fc96d58cSSergio Aguirre 	unsigned int bpp;
52a1d4eab0SLaurent Pinchart 	const char *description;
53fc96d58cSSergio Aguirre };
54fc96d58cSSergio Aguirre 
55fc96d58cSSergio Aguirre enum iss_pipeline_stream_state {
56fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM_STOPPED = 0,
57fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM_CONTINUOUS = 1,
58fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM_SINGLESHOT = 2,
59fc96d58cSSergio Aguirre };
60fc96d58cSSergio Aguirre 
61fc96d58cSSergio Aguirre enum iss_pipeline_state {
62fc96d58cSSergio Aguirre 	/* The stream has been started on the input video node. */
63fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM_INPUT = 1,
64fc96d58cSSergio Aguirre 	/* The stream has been started on the output video node. */
65fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM_OUTPUT = (1 << 1),
66fc96d58cSSergio Aguirre 	/* At least one buffer is queued on the input video node. */
67fc96d58cSSergio Aguirre 	ISS_PIPELINE_QUEUE_INPUT = (1 << 2),
68fc96d58cSSergio Aguirre 	/* At least one buffer is queued on the output video node. */
69fc96d58cSSergio Aguirre 	ISS_PIPELINE_QUEUE_OUTPUT = (1 << 3),
70fc96d58cSSergio Aguirre 	/* The input entity is idle, ready to be started. */
71fc96d58cSSergio Aguirre 	ISS_PIPELINE_IDLE_INPUT = (1 << 4),
72fc96d58cSSergio Aguirre 	/* The output entity is idle, ready to be started. */
73fc96d58cSSergio Aguirre 	ISS_PIPELINE_IDLE_OUTPUT = (1 << 5),
74fc96d58cSSergio Aguirre 	/* The pipeline is currently streaming. */
75fc96d58cSSergio Aguirre 	ISS_PIPELINE_STREAM = (1 << 6),
76fc96d58cSSergio Aguirre };
77fc96d58cSSergio Aguirre 
78fc96d58cSSergio Aguirre /*
79fc96d58cSSergio Aguirre  * struct iss_pipeline - An OMAP4 ISS hardware pipeline
80f3632ba8SLaurent Pinchart  * @entities: Bitmask of entities in the pipeline (indexed by entity ID)
81fc96d58cSSergio Aguirre  * @error: A hardware error occurred during capture
82fc96d58cSSergio Aguirre  */
83fc96d58cSSergio Aguirre struct iss_pipeline {
84fc96d58cSSergio Aguirre 	struct media_pipeline pipe;
85fc96d58cSSergio Aguirre 	spinlock_t lock;		/* Pipeline state and queue flags */
86fc96d58cSSergio Aguirre 	unsigned int state;
87fc96d58cSSergio Aguirre 	enum iss_pipeline_stream_state stream_state;
88fc96d58cSSergio Aguirre 	struct iss_video *input;
89fc96d58cSSergio Aguirre 	struct iss_video *output;
90f3632ba8SLaurent Pinchart 	unsigned int entities;
91fc96d58cSSergio Aguirre 	atomic_t frame_number;
92fc96d58cSSergio Aguirre 	bool do_propagation; /* of frame number */
93fc96d58cSSergio Aguirre 	bool error;
94fc96d58cSSergio Aguirre 	struct v4l2_fract max_timeperframe;
95fc96d58cSSergio Aguirre 	struct v4l2_subdev *external;
96fc96d58cSSergio Aguirre 	unsigned int external_rate;
97fc96d58cSSergio Aguirre 	int external_bpp;
98fc96d58cSSergio Aguirre };
99fc96d58cSSergio Aguirre 
100fc96d58cSSergio Aguirre #define to_iss_pipeline(__e) \
101fc96d58cSSergio Aguirre 	container_of((__e)->pipe, struct iss_pipeline, pipe)
102fc96d58cSSergio Aguirre 
103fc96d58cSSergio Aguirre static inline int iss_pipeline_ready(struct iss_pipeline *pipe)
104fc96d58cSSergio Aguirre {
105fc96d58cSSergio Aguirre 	return pipe->state == (ISS_PIPELINE_STREAM_INPUT |
106fc96d58cSSergio Aguirre 			       ISS_PIPELINE_STREAM_OUTPUT |
107fc96d58cSSergio Aguirre 			       ISS_PIPELINE_QUEUE_INPUT |
108fc96d58cSSergio Aguirre 			       ISS_PIPELINE_QUEUE_OUTPUT |
109fc96d58cSSergio Aguirre 			       ISS_PIPELINE_IDLE_INPUT |
110fc96d58cSSergio Aguirre 			       ISS_PIPELINE_IDLE_OUTPUT);
111fc96d58cSSergio Aguirre }
112fc96d58cSSergio Aguirre 
113fc96d58cSSergio Aguirre /*
114fc96d58cSSergio Aguirre  * struct iss_buffer - ISS buffer
115fc96d58cSSergio Aguirre  * @buffer: ISS video buffer
116fc96d58cSSergio Aguirre  * @iss_addr: Physical address of the buffer.
117fc96d58cSSergio Aguirre  */
118fc96d58cSSergio Aguirre struct iss_buffer {
119fc96d58cSSergio Aguirre 	/* common v4l buffer stuff -- must be first */
120fc96d58cSSergio Aguirre 	struct vb2_buffer	vb;
121fc96d58cSSergio Aguirre 	struct list_head	list;
122fc96d58cSSergio Aguirre 	dma_addr_t iss_addr;
123fc96d58cSSergio Aguirre };
124fc96d58cSSergio Aguirre 
125fc96d58cSSergio Aguirre #define to_iss_buffer(buf)	container_of(buf, struct iss_buffer, buffer)
126fc96d58cSSergio Aguirre 
127fc96d58cSSergio Aguirre enum iss_video_dmaqueue_flags {
128fc96d58cSSergio Aguirre 	/* Set if DMA queue becomes empty when ISS_PIPELINE_STREAM_CONTINUOUS */
129fc96d58cSSergio Aguirre 	ISS_VIDEO_DMAQUEUE_UNDERRUN = (1 << 0),
130fc96d58cSSergio Aguirre 	/* Set when queuing buffer to an empty DMA queue */
131fc96d58cSSergio Aguirre 	ISS_VIDEO_DMAQUEUE_QUEUED = (1 << 1),
132fc96d58cSSergio Aguirre };
133fc96d58cSSergio Aguirre 
134fc96d58cSSergio Aguirre #define iss_video_dmaqueue_flags_clr(video)	\
135fc96d58cSSergio Aguirre 			({ (video)->dmaqueue_flags = 0; })
136fc96d58cSSergio Aguirre 
137fc96d58cSSergio Aguirre /*
138fc96d58cSSergio Aguirre  * struct iss_video_operations - ISS video operations
139fc96d58cSSergio Aguirre  * @queue:	Resume streaming when a buffer is queued. Called on VIDIOC_QBUF
140fc96d58cSSergio Aguirre  *		if there was no buffer previously queued.
141fc96d58cSSergio Aguirre  */
142fc96d58cSSergio Aguirre struct iss_video_operations {
143fc96d58cSSergio Aguirre 	int(*queue)(struct iss_video *video, struct iss_buffer *buffer);
144fc96d58cSSergio Aguirre };
145fc96d58cSSergio Aguirre 
146fc96d58cSSergio Aguirre struct iss_video {
147fc96d58cSSergio Aguirre 	struct video_device video;
148fc96d58cSSergio Aguirre 	enum v4l2_buf_type type;
149fc96d58cSSergio Aguirre 	struct media_pad pad;
150fc96d58cSSergio Aguirre 
151fc96d58cSSergio Aguirre 	struct mutex mutex;		/* format and crop settings */
152fc96d58cSSergio Aguirre 	atomic_t active;
153fc96d58cSSergio Aguirre 
154fc96d58cSSergio Aguirre 	struct iss_device *iss;
155fc96d58cSSergio Aguirre 
156fc96d58cSSergio Aguirre 	unsigned int capture_mem;
157fc96d58cSSergio Aguirre 	unsigned int bpl_alignment;	/* alignment value */
158fc96d58cSSergio Aguirre 	unsigned int bpl_zero_padding;	/* whether the alignment is optional */
159fc96d58cSSergio Aguirre 	unsigned int bpl_max;		/* maximum bytes per line value */
160fc96d58cSSergio Aguirre 	unsigned int bpl_value;		/* bytes per line value */
161fc96d58cSSergio Aguirre 	unsigned int bpl_padding;	/* padding at end of line */
162fc96d58cSSergio Aguirre 
163fc96d58cSSergio Aguirre 	/* Pipeline state */
164fc96d58cSSergio Aguirre 	struct iss_pipeline pipe;
165fc96d58cSSergio Aguirre 	struct mutex stream_lock;	/* pipeline and stream states */
166112da085SLaurent Pinchart 	bool error;
167fc96d58cSSergio Aguirre 
168fc96d58cSSergio Aguirre 	/* Video buffers queue */
169fc96d58cSSergio Aguirre 	struct vb2_queue *queue;
170112da085SLaurent Pinchart 	spinlock_t qlock;		/* protects dmaqueue and error */
171fc96d58cSSergio Aguirre 	struct list_head dmaqueue;
172fc96d58cSSergio Aguirre 	enum iss_video_dmaqueue_flags dmaqueue_flags;
173fc96d58cSSergio Aguirre 	struct vb2_alloc_ctx *alloc_ctx;
174fc96d58cSSergio Aguirre 
175fc96d58cSSergio Aguirre 	const struct iss_video_operations *ops;
176fc96d58cSSergio Aguirre };
177fc96d58cSSergio Aguirre 
178fc96d58cSSergio Aguirre #define to_iss_video(vdev)	container_of(vdev, struct iss_video, video)
179fc96d58cSSergio Aguirre 
180fc96d58cSSergio Aguirre struct iss_video_fh {
181fc96d58cSSergio Aguirre 	struct v4l2_fh vfh;
182fc96d58cSSergio Aguirre 	struct iss_video *video;
183fc96d58cSSergio Aguirre 	struct vb2_queue queue;
184fc96d58cSSergio Aguirre 	struct v4l2_format format;
185fc96d58cSSergio Aguirre 	struct v4l2_fract timeperframe;
186fc96d58cSSergio Aguirre };
187fc96d58cSSergio Aguirre 
188fc96d58cSSergio Aguirre #define to_iss_video_fh(fh)	container_of(fh, struct iss_video_fh, vfh)
189fc96d58cSSergio Aguirre #define iss_video_queue_to_iss_video_fh(q) \
190fc96d58cSSergio Aguirre 				container_of(q, struct iss_video_fh, queue)
191fc96d58cSSergio Aguirre 
192fc96d58cSSergio Aguirre int omap4iss_video_init(struct iss_video *video, const char *name);
193fc96d58cSSergio Aguirre void omap4iss_video_cleanup(struct iss_video *video);
194fc96d58cSSergio Aguirre int omap4iss_video_register(struct iss_video *video,
195fc96d58cSSergio Aguirre 			    struct v4l2_device *vdev);
196fc96d58cSSergio Aguirre void omap4iss_video_unregister(struct iss_video *video);
197fc96d58cSSergio Aguirre struct iss_buffer *omap4iss_video_buffer_next(struct iss_video *video);
198112da085SLaurent Pinchart void omap4iss_video_cancel_stream(struct iss_video *video);
199fc96d58cSSergio Aguirre struct media_pad *omap4iss_video_remote_pad(struct iss_video *video);
200fc96d58cSSergio Aguirre 
201fc96d58cSSergio Aguirre const struct iss_format_info *
202fc96d58cSSergio Aguirre omap4iss_video_format_info(enum v4l2_mbus_pixelcode code);
203fc96d58cSSergio Aguirre 
204fc96d58cSSergio Aguirre #endif /* OMAP4_ISS_VIDEO_H */
205