1 /* 2 * Support for Intel Camera Imaging ISP subsystem. 3 * Copyright (c) 2015, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #include "gdc_device.h" /* gdc_lut_store(), ... */ 16 #include "isp.h" /* ISP_VEC_ELEMBITS */ 17 #include "vamem.h" 18 #if !defined(HAS_NO_HMEM) 19 #ifndef __INLINE_HMEM__ 20 #define __INLINE_HMEM__ 21 #endif 22 #include "hmem.h" 23 #endif /* !defined(HAS_NO_HMEM) */ 24 #define IA_CSS_INCLUDE_PARAMETERS 25 #define IA_CSS_INCLUDE_ACC_PARAMETERS 26 27 #include "sh_css_params.h" 28 #include "ia_css_queue.h" 29 #include "sw_event_global.h" /* Event IDs */ 30 31 #include "platform_support.h" 32 #include "assert_support.h" 33 #include "misc_support.h" /* NOT_USED */ 34 #include "math_support.h" /* max(), min() EVEN_FLOOR()*/ 35 36 #include "ia_css_stream.h" 37 #include "sh_css_params_internal.h" 38 #include "sh_css_param_shading.h" 39 #include "sh_css_param_dvs.h" 40 #include "ia_css_refcount.h" 41 #include "sh_css_internal.h" 42 #include "ia_css_control.h" 43 #include "ia_css_shading.h" 44 #include "sh_css_defs.h" 45 #include "sh_css_sp.h" 46 #include "ia_css_pipeline.h" 47 #include "ia_css_debug.h" 48 #include "memory_access.h" 49 #if 0 /* FIXME */ 50 #include "memory_realloc.h" 51 #endif 52 #include "ia_css_isp_param.h" 53 #include "ia_css_isp_params.h" 54 #include "ia_css_mipi.h" 55 #include "ia_css_morph.h" 56 #include "ia_css_host_data.h" 57 #include "ia_css_pipe.h" 58 #include "ia_css_pipe_binarydesc.h" 59 #if 0 60 #include "ia_css_system_ctrl.h" 61 #endif 62 63 /* Include all kernel host interfaces for ISP1 */ 64 65 #include "anr/anr_1.0/ia_css_anr.host.h" 66 #include "cnr/cnr_1.0/ia_css_cnr.host.h" 67 #include "csc/csc_1.0/ia_css_csc.host.h" 68 #include "de/de_1.0/ia_css_de.host.h" 69 #include "dp/dp_1.0/ia_css_dp.host.h" 70 #include "bnr/bnr_1.0/ia_css_bnr.host.h" 71 #include "dvs/dvs_1.0/ia_css_dvs.host.h" 72 #include "fpn/fpn_1.0/ia_css_fpn.host.h" 73 #include "gc/gc_1.0/ia_css_gc.host.h" 74 #include "macc/macc_1.0/ia_css_macc.host.h" 75 #include "ctc/ctc_1.0/ia_css_ctc.host.h" 76 #include "ob/ob_1.0/ia_css_ob.host.h" 77 #include "raw/raw_1.0/ia_css_raw.host.h" 78 #include "fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" 79 #include "s3a/s3a_1.0/ia_css_s3a.host.h" 80 #include "sc/sc_1.0/ia_css_sc.host.h" 81 #include "sdis/sdis_1.0/ia_css_sdis.host.h" 82 #include "tnr/tnr_1.0/ia_css_tnr.host.h" 83 #include "uds/uds_1.0/ia_css_uds_param.h" 84 #include "wb/wb_1.0/ia_css_wb.host.h" 85 #include "ynr/ynr_1.0/ia_css_ynr.host.h" 86 #include "xnr/xnr_1.0/ia_css_xnr.host.h" 87 88 /* Include additional kernel host interfaces for ISP2 */ 89 90 #include "aa/aa_2/ia_css_aa2.host.h" 91 #include "anr/anr_2/ia_css_anr2.host.h" 92 #include "bh/bh_2/ia_css_bh.host.h" 93 #include "cnr/cnr_2/ia_css_cnr2.host.h" 94 #include "ctc/ctc1_5/ia_css_ctc1_5.host.h" 95 #include "de/de_2/ia_css_de2.host.h" 96 #include "gc/gc_2/ia_css_gc2.host.h" 97 #include "sdis/sdis_2/ia_css_sdis2.host.h" 98 #include "ynr/ynr_2/ia_css_ynr2.host.h" 99 #include "fc/fc_1.0/ia_css_formats.host.h" 100 101 #include "xnr/xnr_3.0/ia_css_xnr3.host.h" 102 103 #if defined(HAS_OUTPUT_SYSTEM) 104 #include <components/output_system/sc_output_system_1.0/host/output_system.host.h> 105 #endif 106 107 #include "sh_css_frac.h" 108 #include "ia_css_bufq.h" 109 110 #define FPNTBL_BYTES(binary) \ 111 (sizeof(char) * (binary)->in_frame_info.res.height * \ 112 (binary)->in_frame_info.padded_width) 113 114 #ifndef ISP2401 115 116 #define SCTBL_BYTES(binary) \ 117 (sizeof(unsigned short) * (binary)->sctbl_height * \ 118 (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) 119 120 #else 121 122 #define SCTBL_BYTES(binary) \ 123 (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ 124 /* height should be the larger height between new api and legacy api */ \ 125 (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) 126 127 #endif 128 129 #define MORPH_PLANE_BYTES(binary) \ 130 (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ 131 (binary)->morph_tbl_height) 132 133 /* We keep a second copy of the ptr struct for the SP to access. 134 Again, this would not be necessary on the chip. */ 135 static hrt_vaddress sp_ddr_ptrs; 136 137 /* sp group address on DDR */ 138 static hrt_vaddress xmem_sp_group_ptrs; 139 140 static hrt_vaddress xmem_sp_stage_ptrs[IA_CSS_PIPE_ID_NUM] 141 [SH_CSS_MAX_STAGES]; 142 static hrt_vaddress xmem_isp_stage_ptrs[IA_CSS_PIPE_ID_NUM] 143 [SH_CSS_MAX_STAGES]; 144 145 static hrt_vaddress default_gdc_lut; 146 static int interleaved_lut_temp[4][HRT_GDC_N]; 147 148 /* END DO NOT MOVE INTO VIMALS_WORLD */ 149 150 /* Digital Zoom lookup table. See documentation for more details about the 151 * contents of this table. 152 */ 153 #if defined(HAS_GDC_VERSION_2) 154 #if defined(CONFIG_CSI2_PLUS) 155 /* 156 * Coefficients from 157 * Css_Mizuchi/regressions/20140424_0930/all/applications/common/gdc_v2_common/lut.h 158 */ 159 160 static const int zoom_table[4][HRT_GDC_N] = { 161 { 162 0, 0, 0, 0, 0, 0, 0, 0, 163 0, 0, 0, 0, 0, 0, 0, 0, 164 0, 0, 0, 0, 0, 0, 0, -1, 165 -1, -1, -1, -1, -1, -1, -1, -1, 166 -1, -2, -2, -2, -2, -2, -2, -2, 167 -3, -3, -3, -3, -3, -3, -3, -4, 168 -4, -4, -4, -4, -5, -5, -5, -5, 169 -5, -5, -6, -6, -6, -6, -7, -7, 170 -7, -7, -7, -8, -8, -8, -8, -9, 171 -9, -9, -9, -10, -10, -10, -10, -11, 172 -11, -11, -12, -12, -12, -12, -13, -13, 173 -13, -14, -14, -14, -15, -15, -15, -15, 174 -16, -16, -16, -17, -17, -17, -18, -18, 175 -18, -19, -19, -20, -20, -20, -21, -21, 176 -21, -22, -22, -22, -23, -23, -24, -24, 177 -24, -25, -25, -25, -26, -26, -27, -27, 178 -28, -28, -28, -29, -29, -30, -30, -30, 179 -31, -31, -32, -32, -33, -33, -33, -34, 180 -34, -35, -35, -36, -36, -37, -37, -37, 181 -38, -38, -39, -39, -40, -40, -41, -41, 182 -42, -42, -43, -43, -44, -44, -45, -45, 183 -46, -46, -47, -47, -48, -48, -49, -49, 184 -50, -50, -51, -51, -52, -52, -53, -53, 185 -54, -54, -55, -55, -56, -56, -57, -57, 186 -58, -59, -59, -60, -60, -61, -61, -62, 187 -62, -63, -63, -64, -65, -65, -66, -66, 188 -67, -67, -68, -69, -69, -70, -70, -71, 189 -71, -72, -73, -73, -74, -74, -75, -75, 190 -76, -77, -77, -78, -78, -79, -80, -80, 191 -81, -81, -82, -83, -83, -84, -84, -85, 192 -86, -86, -87, -87, -88, -89, -89, -90, 193 -91, -91, -92, -92, -93, -94, -94, -95, 194 -96, -96, -97, -97, -98, -99, -99, -100, 195 -101, -101, -102, -102, -103, -104, -104, -105, 196 -106, -106, -107, -108, -108, -109, -109, -110, 197 -111, -111, -112, -113, -113, -114, -115, -115, 198 -116, -117, -117, -118, -119, -119, -120, -121, 199 -121, -122, -122, -123, -124, -124, -125, -126, 200 -126, -127, -128, -128, -129, -130, -130, -131, 201 -132, -132, -133, -134, -134, -135, -136, -136, 202 -137, -138, -138, -139, -140, -140, -141, -142, 203 -142, -143, -144, -144, -145, -146, -146, -147, 204 -148, -148, -149, -150, -150, -151, -152, -152, 205 -153, -154, -154, -155, -156, -156, -157, -158, 206 -158, -159, -160, -160, -161, -162, -162, -163, 207 -164, -164, -165, -166, -166, -167, -168, -168, 208 -169, -170, -170, -171, -172, -172, -173, -174, 209 -174, -175, -176, -176, -177, -178, -178, -179, 210 -180, -180, -181, -181, -182, -183, -183, -184, 211 -185, -185, -186, -187, -187, -188, -189, -189, 212 -190, -191, -191, -192, -193, -193, -194, -194, 213 -195, -196, -196, -197, -198, -198, -199, -200, 214 -200, -201, -201, -202, -203, -203, -204, -205, 215 -205, -206, -206, -207, -208, -208, -209, -210, 216 -210, -211, -211, -212, -213, -213, -214, -215, 217 -215, -216, -216, -217, -218, -218, -219, -219, 218 -220, -221, -221, -222, -222, -223, -224, -224, 219 -225, -225, -226, -227, -227, -228, -228, -229, 220 -229, -230, -231, -231, -232, -232, -233, -233, 221 -234, -235, -235, -236, -236, -237, -237, -238, 222 -239, -239, -240, -240, -241, -241, -242, -242, 223 -243, -244, -244, -245, -245, -246, -246, -247, 224 -247, -248, -248, -249, -249, -250, -250, -251, 225 -251, -252, -252, -253, -253, -254, -254, -255, 226 -256, -256, -256, -257, -257, -258, -258, -259, 227 -259, -260, -260, -261, -261, -262, -262, -263, 228 -263, -264, -264, -265, -265, -266, -266, -266, 229 -267, -267, -268, -268, -269, -269, -270, -270, 230 -270, -271, -271, -272, -272, -273, -273, -273, 231 -274, -274, -275, -275, -275, -276, -276, -277, 232 -277, -277, -278, -278, -279, -279, -279, -280, 233 -280, -280, -281, -281, -282, -282, -282, -283, 234 -283, -283, -284, -284, -284, -285, -285, -285, 235 -286, -286, -286, -287, -287, -287, -288, -288, 236 -288, -289, -289, -289, -289, -290, -290, -290, 237 -291, -291, -291, -291, -292, -292, -292, -293, 238 -293, -293, -293, -294, -294, -294, -294, -295, 239 -295, -295, -295, -295, -296, -296, -296, -296, 240 -297, -297, -297, -297, -297, -298, -298, -298, 241 -298, -298, -299, -299, -299, -299, -299, -299, 242 -300, -300, -300, -300, -300, -300, -300, -301, 243 -301, -301, -301, -301, -301, -301, -301, -301, 244 -302, -302, -302, -302, -302, -302, -302, -302, 245 -302, -302, -302, -302, -302, -303, -303, -303, 246 -303, -303, -303, -303, -303, -303, -303, -303, 247 -303, -303, -303, -303, -303, -303, -303, -303, 248 -303, -303, -303, -303, -303, -303, -303, -303, 249 -303, -303, -302, -302, -302, -302, -302, -302, 250 -302, -302, -302, -302, -302, -302, -301, -301, 251 -301, -301, -301, -301, -301, -301, -300, -300, 252 -300, -300, -300, -300, -299, -299, -299, -299, 253 -299, -299, -298, -298, -298, -298, -298, -297, 254 -297, -297, -297, -296, -296, -296, -296, -295, 255 -295, -295, -295, -294, -294, -294, -293, -293, 256 -293, -293, -292, -292, -292, -291, -291, -291, 257 -290, -290, -290, -289, -289, -289, -288, -288, 258 -288, -287, -287, -286, -286, -286, -285, -285, 259 -284, -284, -284, -283, -283, -282, -282, -281, 260 -281, -280, -280, -279, -279, -279, -278, -278, 261 -277, -277, -276, -276, -275, -275, -274, -273, 262 -273, -272, -272, -271, -271, -270, -270, -269, 263 -268, -268, -267, -267, -266, -266, -265, -264, 264 -264, -263, -262, -262, -261, -260, -260, -259, 265 -259, -258, -257, -256, -256, -255, -254, -254, 266 -253, -252, -252, -251, -250, -249, -249, -248, 267 -247, -246, -246, -245, -244, -243, -242, -242, 268 -241, -240, -239, -238, -238, -237, -236, -235, 269 -234, -233, -233, -232, -231, -230, -229, -228, 270 -227, -226, -226, -225, -224, -223, -222, -221, 271 -220, -219, -218, -217, -216, -215, -214, -213, 272 -212, -211, -210, -209, -208, -207, -206, -205, 273 -204, -203, -202, -201, -200, -199, -198, -197, 274 -196, -194, -193, -192, -191, -190, -189, -188, 275 -187, -185, -184, -183, -182, -181, -180, -178, 276 -177, -176, -175, -174, -172, -171, -170, -169, 277 -167, -166, -165, -164, -162, -161, -160, -158, 278 -157, -156, -155, -153, -152, -151, -149, -148, 279 -147, -145, -144, -142, -141, -140, -138, -137, 280 -135, -134, -133, -131, -130, -128, -127, -125, 281 -124, -122, -121, -120, -118, -117, -115, -114, 282 -112, -110, -109, -107, -106, -104, -103, -101, 283 -100, -98, -96, -95, -93, -92, -90, -88, 284 -87, -85, -83, -82, -80, -78, -77, -75, 285 -73, -72, -70, -68, -67, -65, -63, -61, 286 -60, -58, -56, -54, -52, -51, -49, -47, 287 -45, -43, -42, -40, -38, -36, -34, -32, 288 -31, -29, -27, -25, -23, -21, -19, -17, 289 -15, -13, -11, -9, -7, -5, -3, -1 290 }, 291 { 292 0, 2, 4, 6, 8, 10, 12, 14, 293 16, 18, 20, 22, 25, 27, 29, 31, 294 33, 36, 38, 40, 43, 45, 47, 50, 295 52, 54, 57, 59, 61, 64, 66, 69, 296 71, 74, 76, 79, 81, 84, 86, 89, 297 92, 94, 97, 99, 102, 105, 107, 110, 298 113, 116, 118, 121, 124, 127, 129, 132, 299 135, 138, 141, 144, 146, 149, 152, 155, 300 158, 161, 164, 167, 170, 173, 176, 179, 301 182, 185, 188, 191, 194, 197, 200, 203, 302 207, 210, 213, 216, 219, 222, 226, 229, 303 232, 235, 239, 242, 245, 248, 252, 255, 304 258, 262, 265, 269, 272, 275, 279, 282, 305 286, 289, 292, 296, 299, 303, 306, 310, 306 313, 317, 321, 324, 328, 331, 335, 338, 307 342, 346, 349, 353, 357, 360, 364, 368, 308 372, 375, 379, 383, 386, 390, 394, 398, 309 402, 405, 409, 413, 417, 421, 425, 429, 310 432, 436, 440, 444, 448, 452, 456, 460, 311 464, 468, 472, 476, 480, 484, 488, 492, 312 496, 500, 504, 508, 512, 516, 521, 525, 313 529, 533, 537, 541, 546, 550, 554, 558, 314 562, 567, 571, 575, 579, 584, 588, 592, 315 596, 601, 605, 609, 614, 618, 622, 627, 316 631, 635, 640, 644, 649, 653, 657, 662, 317 666, 671, 675, 680, 684, 689, 693, 698, 318 702, 707, 711, 716, 720, 725, 729, 734, 319 738, 743, 747, 752, 757, 761, 766, 771, 320 775, 780, 784, 789, 794, 798, 803, 808, 321 813, 817, 822, 827, 831, 836, 841, 846, 322 850, 855, 860, 865, 870, 874, 879, 884, 323 889, 894, 898, 903, 908, 913, 918, 923, 324 928, 932, 937, 942, 947, 952, 957, 962, 325 967, 972, 977, 982, 986, 991, 996, 1001, 326 1006, 1011, 1016, 1021, 1026, 1031, 1036, 1041, 327 1046, 1051, 1056, 1062, 1067, 1072, 1077, 1082, 328 1087, 1092, 1097, 1102, 1107, 1112, 1117, 1122, 329 1128, 1133, 1138, 1143, 1148, 1153, 1158, 1164, 330 1169, 1174, 1179, 1184, 1189, 1195, 1200, 1205, 331 1210, 1215, 1221, 1226, 1231, 1236, 1242, 1247, 332 1252, 1257, 1262, 1268, 1273, 1278, 1284, 1289, 333 1294, 1299, 1305, 1310, 1315, 1321, 1326, 1331, 334 1336, 1342, 1347, 1352, 1358, 1363, 1368, 1374, 335 1379, 1384, 1390, 1395, 1400, 1406, 1411, 1417, 336 1422, 1427, 1433, 1438, 1443, 1449, 1454, 1460, 337 1465, 1470, 1476, 1481, 1487, 1492, 1497, 1503, 338 1508, 1514, 1519, 1525, 1530, 1535, 1541, 1546, 339 1552, 1557, 1563, 1568, 1574, 1579, 1585, 1590, 340 1596, 1601, 1606, 1612, 1617, 1623, 1628, 1634, 341 1639, 1645, 1650, 1656, 1661, 1667, 1672, 1678, 342 1683, 1689, 1694, 1700, 1705, 1711, 1716, 1722, 343 1727, 1733, 1738, 1744, 1749, 1755, 1761, 1766, 344 1772, 1777, 1783, 1788, 1794, 1799, 1805, 1810, 345 1816, 1821, 1827, 1832, 1838, 1844, 1849, 1855, 346 1860, 1866, 1871, 1877, 1882, 1888, 1893, 1899, 347 1905, 1910, 1916, 1921, 1927, 1932, 1938, 1943, 348 1949, 1955, 1960, 1966, 1971, 1977, 1982, 1988, 349 1993, 1999, 2005, 2010, 2016, 2021, 2027, 2032, 350 2038, 2043, 2049, 2055, 2060, 2066, 2071, 2077, 351 2082, 2088, 2093, 2099, 2105, 2110, 2116, 2121, 352 2127, 2132, 2138, 2143, 2149, 2154, 2160, 2165, 353 2171, 2177, 2182, 2188, 2193, 2199, 2204, 2210, 354 2215, 2221, 2226, 2232, 2237, 2243, 2248, 2254, 355 2259, 2265, 2270, 2276, 2281, 2287, 2292, 2298, 356 2304, 2309, 2314, 2320, 2325, 2331, 2336, 2342, 357 2347, 2353, 2358, 2364, 2369, 2375, 2380, 2386, 358 2391, 2397, 2402, 2408, 2413, 2419, 2424, 2429, 359 2435, 2440, 2446, 2451, 2457, 2462, 2467, 2473, 360 2478, 2484, 2489, 2495, 2500, 2505, 2511, 2516, 361 2522, 2527, 2532, 2538, 2543, 2549, 2554, 2559, 362 2565, 2570, 2575, 2581, 2586, 2591, 2597, 2602, 363 2607, 2613, 2618, 2623, 2629, 2634, 2639, 2645, 364 2650, 2655, 2661, 2666, 2671, 2676, 2682, 2687, 365 2692, 2698, 2703, 2708, 2713, 2719, 2724, 2729, 366 2734, 2740, 2745, 2750, 2755, 2760, 2766, 2771, 367 2776, 2781, 2786, 2792, 2797, 2802, 2807, 2812, 368 2817, 2823, 2828, 2833, 2838, 2843, 2848, 2853, 369 2859, 2864, 2869, 2874, 2879, 2884, 2889, 2894, 370 2899, 2904, 2909, 2914, 2919, 2924, 2930, 2935, 371 2940, 2945, 2950, 2955, 2960, 2965, 2970, 2975, 372 2980, 2984, 2989, 2994, 2999, 3004, 3009, 3014, 373 3019, 3024, 3029, 3034, 3039, 3044, 3048, 3053, 374 3058, 3063, 3068, 3073, 3078, 3082, 3087, 3092, 375 3097, 3102, 3106, 3111, 3116, 3121, 3126, 3130, 376 3135, 3140, 3145, 3149, 3154, 3159, 3163, 3168, 377 3173, 3177, 3182, 3187, 3191, 3196, 3201, 3205, 378 3210, 3215, 3219, 3224, 3228, 3233, 3238, 3242, 379 3247, 3251, 3256, 3260, 3265, 3269, 3274, 3279, 380 3283, 3287, 3292, 3296, 3301, 3305, 3310, 3314, 381 3319, 3323, 3327, 3332, 3336, 3341, 3345, 3349, 382 3354, 3358, 3362, 3367, 3371, 3375, 3380, 3384, 383 3388, 3393, 3397, 3401, 3405, 3410, 3414, 3418, 384 3422, 3426, 3431, 3435, 3439, 3443, 3447, 3451, 385 3455, 3460, 3464, 3468, 3472, 3476, 3480, 3484, 386 3488, 3492, 3496, 3500, 3504, 3508, 3512, 3516, 387 3520, 3524, 3528, 3532, 3536, 3540, 3544, 3548, 388 3552, 3555, 3559, 3563, 3567, 3571, 3575, 3578, 389 3582, 3586, 3590, 3593, 3597, 3601, 3605, 3608, 390 3612, 3616, 3619, 3623, 3627, 3630, 3634, 3638, 391 3641, 3645, 3649, 3652, 3656, 3659, 3663, 3666, 392 3670, 3673, 3677, 3680, 3684, 3687, 3691, 3694, 393 3698, 3701, 3704, 3708, 3711, 3714, 3718, 3721, 394 3724, 3728, 3731, 3734, 3738, 3741, 3744, 3747, 395 3751, 3754, 3757, 3760, 3763, 3767, 3770, 3773, 396 3776, 3779, 3782, 3785, 3788, 3791, 3794, 3798, 397 3801, 3804, 3807, 3809, 3812, 3815, 3818, 3821, 398 3824, 3827, 3830, 3833, 3836, 3839, 3841, 3844, 399 3847, 3850, 3853, 3855, 3858, 3861, 3864, 3866, 400 3869, 3872, 3874, 3877, 3880, 3882, 3885, 3887, 401 3890, 3893, 3895, 3898, 3900, 3903, 3905, 3908, 402 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-23, -22, -22, -22, 666 -21, -21, -20, -20, -20, -20, -19, -18, 667 -19, -18, -18, -17, -18, -17, -16, -17, 668 -16, -15, -15, -15, -14, -14, -15, -13, 669 -13, -13, -13, -12, -12, -11, -12, -11, 670 -12, -10, -10, -10, -10, -10, -9, -10, 671 -9, -9, -9, -8, -8, -7, -8, -7, 672 -7, -7, -6, -6, -6, -7, -6, -6, 673 -5, -5, -5, -5, -5, -4, -4, -5, 674 -4, -4, -3, -3, -3, -3, -3, -2, 675 -3, -2, -2, -2, -1, -2, -1, -2, 676 -1, -1, -1, -1, -1, 0, -1, 0, 677 -1, -1, 0, 0, -1, 0, 0, -1, 678 1, 1, 0, 0, 0, 1, 0, 0, 679 0, 0, 0, 0, 0, 0, 0, 0 680 } 681 }; 682 #else /* defined(CONFIG_CSI2_PLUS) */ 683 static const int zoom_table[4][HRT_GDC_N] = { 684 { 685 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 686 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 687 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 688 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 689 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 690 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 691 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 692 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 693 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 694 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 695 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 696 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 697 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 698 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 699 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 700 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 701 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 702 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 703 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 704 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 705 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 706 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 707 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 708 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 709 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 710 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 711 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 712 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 713 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 714 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 715 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 716 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 717 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 718 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 719 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 720 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 721 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 722 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 723 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 724 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 725 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 726 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 727 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 728 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 729 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 730 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 731 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 732 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 733 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 734 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 735 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 736 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 737 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 738 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 739 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 740 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 741 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 742 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 743 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 744 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 745 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 746 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 747 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 748 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 749 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 750 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 751 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 752 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 753 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 754 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 755 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 756 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 757 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 758 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 759 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 760 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 761 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 762 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 763 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 764 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 765 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 766 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 767 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 768 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 769 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 770 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 771 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 772 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 773 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 774 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 775 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 776 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 777 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 778 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 779 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 780 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 781 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 782 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 783 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 784 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 785 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 786 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 787 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 788 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 789 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 790 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 791 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 792 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 793 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 794 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 795 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 796 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 797 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 798 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 799 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 800 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 801 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 802 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 803 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 804 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 805 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 806 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 807 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 808 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 809 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 810 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 811 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 812 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4 813 }, 814 { 815 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 816 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 817 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 818 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 819 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 820 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 821 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 822 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 823 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 824 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 825 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 826 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 827 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 828 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 829 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 830 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 831 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 832 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 833 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 834 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 835 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 836 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 837 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 838 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 839 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 840 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 841 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 842 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 843 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 844 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 845 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 846 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 847 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 848 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 849 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 850 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 851 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 852 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 853 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 854 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 855 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 856 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 857 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 858 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 859 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 860 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 861 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 862 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 863 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 864 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 865 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 866 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 867 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 868 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 869 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 870 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 871 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 872 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 873 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 874 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 875 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 876 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 877 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 878 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 879 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 880 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 881 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 882 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 883 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 884 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 885 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 886 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 887 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 888 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 889 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 890 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 891 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 892 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 893 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 894 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 895 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 896 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 897 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 898 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 899 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 900 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 901 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 902 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 903 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 904 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 905 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 906 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 907 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 908 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 909 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 910 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 911 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 912 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 913 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 914 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 915 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 916 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 917 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 918 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 919 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 920 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 921 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 922 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 923 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 924 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 925 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 926 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 927 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 928 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 929 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 930 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 931 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 932 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 933 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 934 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 935 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 936 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 937 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 938 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 939 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 940 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 941 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 942 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4 943 }, 944 { 945 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 946 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 947 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 948 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 949 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 950 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 951 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 952 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 953 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 954 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 955 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 956 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 957 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 958 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 959 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 960 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 961 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 962 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 963 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 964 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 965 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 966 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 967 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 968 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 969 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 970 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 971 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 972 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 973 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 974 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 975 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 976 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 977 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 978 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 979 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 980 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 981 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 982 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 983 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 984 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 985 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 986 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 987 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 988 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 989 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 990 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 991 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 992 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 993 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 994 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 995 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 996 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 997 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 998 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 999 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 1000 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 1001 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 1002 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 1003 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 1004 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 1005 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 1006 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 1007 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 1008 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 1009 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 1010 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 1011 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 1012 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 1013 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 1014 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 1015 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 1016 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 1017 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 1018 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 1019 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 1020 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 1021 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 1022 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 1023 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 1024 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 1025 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 1026 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 1027 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 1028 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 1029 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 1030 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 1031 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 1032 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 1033 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 1034 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 1035 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 1036 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 1037 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 1038 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 1039 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 1040 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 1041 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 1042 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 1043 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 1044 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 1045 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 1046 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 1047 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 1048 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 1049 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 1050 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 1051 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 1052 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 1053 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 1054 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 1055 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 1056 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 1057 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 1058 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 1059 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 1060 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 1061 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 1062 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 1063 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 1064 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 1065 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 1066 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 1067 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 1068 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 1069 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 1070 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 1071 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 1072 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4 1073 }, 1074 { 1075 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1076 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1077 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1078 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1079 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1080 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1081 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1082 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1083 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1084 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1085 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1086 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1087 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1088 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1089 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 1090 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 1091 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1092 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1093 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1094 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1095 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1096 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1097 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1098 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1099 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1100 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1101 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1102 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1103 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1104 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1105 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1106 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1107 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1108 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1109 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1110 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1111 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1112 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1113 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1114 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1115 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1116 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1117 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1118 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1119 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1120 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1121 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1122 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1123 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1124 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1125 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1126 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1127 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1128 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1129 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1130 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1131 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1132 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1133 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1134 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1135 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1136 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1137 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1138 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1139 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1140 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1141 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1142 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1143 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1144 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1145 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1146 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1147 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1148 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1149 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1150 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1151 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1152 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1153 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1154 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1155 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1156 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1157 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1158 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1159 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1160 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1161 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1162 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1163 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1164 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1165 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1166 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1167 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1168 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1169 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1170 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1171 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1172 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1173 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1174 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1175 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1176 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1177 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1178 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1179 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1180 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1181 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1182 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1183 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1184 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1185 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1186 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1187 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1188 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1189 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1190 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1191 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1192 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1193 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1194 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1195 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1196 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1197 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1198 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1199 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1200 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1201 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1202 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4 1203 } 1204 }; 1205 #endif 1206 #else 1207 #error "sh_css_params.c: GDC version must be \ 1208 one of {GDC_VERSION_2}" 1209 #endif 1210 1211 static const struct ia_css_dz_config default_dz_config = { 1212 HRT_GDC_N, 1213 HRT_GDC_N, 1214 { 1215 \ 1216 {0, 0}, \ 1217 {0, 0}, \ 1218 } 1219 }; 1220 1221 static const struct ia_css_vector default_motion_config = { 1222 0, 1223 0 1224 }; 1225 1226 /* ------ deprecated(bz675) : from ------ */ 1227 static const struct ia_css_shading_settings default_shading_settings = { 1228 1 /* enable shading table conversion in the css 1229 (This matches the legacy way.) */ 1230 }; 1231 1232 /* ------ deprecated(bz675) : to ------ */ 1233 1234 struct ia_css_isp_skc_dvs_statistics { 1235 ia_css_ptr p_data; 1236 }; 1237 1238 static enum ia_css_err 1239 ref_sh_css_ddr_address_map( 1240 struct sh_css_ddr_address_map *map, 1241 struct sh_css_ddr_address_map *out); 1242 1243 static enum ia_css_err 1244 write_ia_css_isp_parameter_set_info_to_ddr( 1245 struct ia_css_isp_parameter_set_info *me, 1246 hrt_vaddress *out); 1247 1248 static enum ia_css_err 1249 free_ia_css_isp_parameter_set_info(hrt_vaddress ptr); 1250 1251 static enum ia_css_err 1252 sh_css_params_write_to_ddr_internal( 1253 struct ia_css_pipe *pipe, 1254 unsigned int pipe_id, 1255 struct ia_css_isp_parameters *params, 1256 const struct ia_css_pipeline_stage *stage, 1257 struct sh_css_ddr_address_map *ddr_map, 1258 struct sh_css_ddr_address_map_size *ddr_map_size); 1259 1260 static enum ia_css_err 1261 sh_css_create_isp_params(struct ia_css_stream *stream, 1262 struct ia_css_isp_parameters **isp_params_out); 1263 1264 static bool 1265 sh_css_init_isp_params_from_global(struct ia_css_stream *stream, 1266 struct ia_css_isp_parameters *params, 1267 bool use_default_config, 1268 struct ia_css_pipe *pipe_in); 1269 1270 static enum ia_css_err 1271 sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, 1272 struct ia_css_isp_parameters *params, 1273 const struct ia_css_isp_config *config, 1274 struct ia_css_pipe *pipe_in); 1275 1276 static enum ia_css_err 1277 sh_css_set_global_isp_config_on_pipe( 1278 struct ia_css_pipe *curr_pipe, 1279 const struct ia_css_isp_config *config, 1280 struct ia_css_pipe *pipe); 1281 1282 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 1283 static enum ia_css_err 1284 sh_css_set_per_frame_isp_config_on_pipe( 1285 struct ia_css_stream *stream, 1286 const struct ia_css_isp_config *config, 1287 struct ia_css_pipe *pipe); 1288 #endif 1289 1290 static enum ia_css_err 1291 sh_css_update_uds_and_crop_info_based_on_zoom_region( 1292 const struct ia_css_binary_info *info, 1293 const struct ia_css_frame_info *in_frame_info, 1294 const struct ia_css_frame_info *out_frame_info, 1295 const struct ia_css_resolution *dvs_env, 1296 const struct ia_css_dz_config *zoom, 1297 const struct ia_css_vector *motion_vector, 1298 struct sh_css_uds_info *uds, /* out */ 1299 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 1300 struct ia_css_resolution pipe_in_res, 1301 bool enable_zoom); 1302 1303 hrt_vaddress 1304 sh_css_params_ddr_address_map(void) 1305 { 1306 return sp_ddr_ptrs; 1307 } 1308 1309 /* **************************************************** 1310 * Each coefficient is stored as 7bits to fit 2 of them into one 1311 * ISP vector element, so we will store 4 coefficents on every 1312 * memory word (32bits) 1313 * 1314 * 0: Coefficient 0 used bits 1315 * 1: Coefficient 1 used bits 1316 * 2: Coefficient 2 used bits 1317 * 3: Coefficient 3 used bits 1318 * x: not used 1319 * 1320 * xx33333332222222 | xx11111110000000 1321 * 1322 * *************************************************** 1323 */ 1324 static struct ia_css_host_data * 1325 convert_allocate_fpntbl(struct ia_css_isp_parameters *params) 1326 { 1327 unsigned int i, j; 1328 short *data_ptr; 1329 struct ia_css_host_data *me; 1330 unsigned int isp_format_data_size; 1331 u32 *isp_format_data_ptr; 1332 1333 assert(params); 1334 1335 data_ptr = params->fpn_config.data; 1336 isp_format_data_size = params->fpn_config.height * params->fpn_config.width * 1337 sizeof(uint32_t); 1338 1339 me = ia_css_host_data_allocate(isp_format_data_size); 1340 1341 if (!me) 1342 return NULL; 1343 1344 isp_format_data_ptr = (uint32_t *)me->address; 1345 1346 for (i = 0; i < params->fpn_config.height; i++) { 1347 for (j = 0; 1348 j < params->fpn_config.width; 1349 j += 4, data_ptr += 4, isp_format_data_ptr++) { 1350 int data = data_ptr[0] << 0 | 1351 data_ptr[1] << 7 | 1352 data_ptr[2] << 16 | 1353 data_ptr[3] << 23; 1354 *isp_format_data_ptr = data; 1355 } 1356 } 1357 return me; 1358 } 1359 1360 static enum ia_css_err 1361 store_fpntbl(struct ia_css_isp_parameters *params, hrt_vaddress ptr) { 1362 struct ia_css_host_data *isp_data; 1363 1364 assert(params); 1365 assert(ptr != mmgr_NULL); 1366 1367 isp_data = convert_allocate_fpntbl(params); 1368 if (!isp_data) 1369 { 1370 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1371 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1372 } 1373 ia_css_params_store_ia_css_host_data(ptr, isp_data); 1374 1375 ia_css_host_data_free(isp_data); 1376 return IA_CSS_SUCCESS; 1377 } 1378 1379 static void 1380 convert_raw_to_fpn(struct ia_css_isp_parameters *params) 1381 { 1382 int maxval = 0; 1383 unsigned int i; 1384 1385 assert(params); 1386 1387 /* Find the maximum value in the table */ 1388 for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) { 1389 int val = params->fpn_config.data[i]; 1390 /* Make sure FPN value can be represented in 13-bit unsigned 1391 * number (ISP precision - 1), but note that actual input range 1392 * depends on precision of input frame data. 1393 */ 1394 if (val < 0) { 1395 /* Checkpatch patch */ 1396 val = 0; 1397 } else if (val >= (1 << 13)) { 1398 /* Checkpatch patch */ 1399 /* MW: BUG, is "13" a system or application property */ 1400 val = (1 << 13) - 1; 1401 } 1402 maxval = max(maxval, val); 1403 } 1404 /* Find the lowest shift value to remap the values in the range 1405 * 0..maxval to 0..2^shiftval*63. 1406 */ 1407 params->fpn_config.shift = 0; 1408 while (maxval > 63) { 1409 /* MW: BUG, is "63" a system or application property */ 1410 maxval >>= 1; 1411 params->fpn_config.shift++; 1412 } 1413 /* Adjust the values in the table for the shift value */ 1414 for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) 1415 ((unsigned short *)params->fpn_config.data)[i] >>= params->fpn_config.shift; 1416 } 1417 1418 static void 1419 ia_css_process_kernel(struct ia_css_stream *stream, 1420 struct ia_css_isp_parameters *params, 1421 void (*process)(unsigned int pipe_id, 1422 const struct ia_css_pipeline_stage *stage, 1423 struct ia_css_isp_parameters *params)) 1424 { 1425 int i; 1426 1427 for (i = 0; i < stream->num_pipes; i++) { 1428 struct ia_css_pipe *pipe = stream->pipes[i]; 1429 struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); 1430 struct ia_css_pipeline_stage *stage; 1431 1432 /* update the other buffers to the pipe specific copies */ 1433 for (stage = pipeline->stages; stage; stage = stage->next) { 1434 if (!stage || !stage->binary) continue; 1435 process(pipeline->pipe_id, stage, params); 1436 } 1437 } 1438 } 1439 1440 static enum ia_css_err 1441 sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, 1442 bool *is_dp_10bpp) { 1443 enum ia_css_err err = IA_CSS_SUCCESS; 1444 /* Currently we check if 10bpp DPC configuration is required based 1445 * on the use case,i.e. if BDS and DPC is both enabled. The more cleaner 1446 * design choice would be to expose the type of DPC (either 10bpp or 13bpp) 1447 * using the binary info, but the current control flow does not allow this 1448 * implementation. (This is because the configuration is set before a 1449 * binary is selected, and the binary info is not available) 1450 */ 1451 if ((!pipe) || (!is_dp_10bpp)) 1452 { 1453 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); 1454 err = IA_CSS_ERR_INTERNAL_ERROR; 1455 } else 1456 { 1457 *is_dp_10bpp = false; 1458 1459 /* check if DPC is enabled from the host */ 1460 if (pipe->config.enable_dpc) { 1461 /*check if BDS is enabled*/ 1462 unsigned int required_bds_factor = SH_CSS_BDS_FACTOR_1_00; 1463 1464 if ((pipe->config.bayer_ds_out_res.width != 0) && 1465 (pipe->config.bayer_ds_out_res.height != 0)) { 1466 if (IA_CSS_SUCCESS == binarydesc_calculate_bds_factor( 1467 pipe->config.input_effective_res, 1468 pipe->config.bayer_ds_out_res, 1469 &required_bds_factor)) { 1470 if (required_bds_factor != SH_CSS_BDS_FACTOR_1_00) { 1471 /*we use 10bpp BDS configuration*/ 1472 *is_dp_10bpp = true; 1473 } 1474 } 1475 } 1476 } 1477 } 1478 1479 return err; 1480 } 1481 1482 enum ia_css_err 1483 sh_css_set_black_frame(struct ia_css_stream *stream, 1484 const struct ia_css_frame *raw_black_frame) { 1485 struct ia_css_isp_parameters *params; 1486 /* this function desperately needs to be moved to the ISP or SP such 1487 * that it can use the DMA. 1488 */ 1489 unsigned int height, width, y, x, k, data; 1490 hrt_vaddress ptr; 1491 1492 assert(stream); 1493 assert(raw_black_frame); 1494 1495 params = stream->isp_params_configs; 1496 height = raw_black_frame->info.res.height; 1497 width = raw_black_frame->info.padded_width, 1498 1499 ptr = raw_black_frame->data 1500 + raw_black_frame->planes.raw.offset; 1501 1502 IA_CSS_ENTER_PRIVATE("black_frame=%p", raw_black_frame); 1503 1504 if (params->fpn_config.data && 1505 (params->fpn_config.width != width || params->fpn_config.height != height)) 1506 { 1507 sh_css_free(params->fpn_config.data); 1508 params->fpn_config.data = NULL; 1509 } 1510 if (!params->fpn_config.data) 1511 { 1512 params->fpn_config.data = sh_css_malloc(height * width * sizeof(short)); 1513 if (!params->fpn_config.data) { 1514 IA_CSS_ERROR("out of memory"); 1515 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1516 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1517 } 1518 params->fpn_config.width = width; 1519 params->fpn_config.height = height; 1520 params->fpn_config.shift = 0; 1521 } 1522 1523 /* store raw to fpntbl */ 1524 for (y = 0; y < height; y++) 1525 { 1526 for (x = 0; x < width; x += (ISP_VEC_NELEMS * 2)) { 1527 int ofs = y * width + x; 1528 1529 for (k = 0; k < ISP_VEC_NELEMS; k += 2) { 1530 mmgr_load(ptr, (void *)(&data), sizeof(int)); 1531 params->fpn_config.data[ofs + 2 * k] = 1532 (short)(data & 0xFFFF); 1533 params->fpn_config.data[ofs + 2 * k + 2] = 1534 (short)((data >> 16) & 0xFFFF); 1535 ptr += sizeof(int); /* byte system address */ 1536 } 1537 for (k = 0; k < ISP_VEC_NELEMS; k += 2) { 1538 mmgr_load(ptr, (void *)(&data), sizeof(int)); 1539 params->fpn_config.data[ofs + 2 * k + 1] = 1540 (short)(data & 0xFFFF); 1541 params->fpn_config.data[ofs + 2 * k + 3] = 1542 (short)((data >> 16) & 0xFFFF); 1543 ptr += sizeof(int); /* byte system address */ 1544 } 1545 } 1546 } 1547 1548 /* raw -> fpn */ 1549 convert_raw_to_fpn(params); 1550 1551 /* overwrite isp parameter */ 1552 ia_css_process_kernel(stream, params, ia_css_kernel_process_param[IA_CSS_FPN_ID]); 1553 1554 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 1555 1556 return IA_CSS_SUCCESS; 1557 } 1558 1559 bool 1560 sh_css_params_set_binning_factor(struct ia_css_stream *stream, 1561 unsigned int binning_fact) 1562 { 1563 struct ia_css_isp_parameters *params; 1564 1565 IA_CSS_ENTER_PRIVATE("void"); 1566 assert(stream); 1567 1568 params = stream->isp_params_configs; 1569 1570 if (params->sensor_binning != binning_fact) { 1571 params->sensor_binning = binning_fact; 1572 params->sc_table_changed = true; 1573 } 1574 1575 IA_CSS_LEAVE_PRIVATE("void"); 1576 1577 return params->sc_table_changed; 1578 } 1579 1580 static void 1581 sh_css_update_shading_table_status(struct ia_css_pipe *pipe, 1582 struct ia_css_isp_parameters *params) 1583 { 1584 if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { 1585 params->sc_table_dirty = true; 1586 params->sc_table_last_pipe_num = pipe->pipe_num; 1587 } 1588 } 1589 1590 static void 1591 sh_css_set_shading_table(struct ia_css_stream *stream, 1592 struct ia_css_isp_parameters *params, 1593 const struct ia_css_shading_table *table) 1594 { 1595 IA_CSS_ENTER_PRIVATE(""); 1596 if (!table) 1597 return; 1598 assert(stream); 1599 1600 if (!table->enable) 1601 table = NULL; 1602 1603 if ((table != params->sc_table) || params->sc_table_dirty) { 1604 params->sc_table = table; 1605 params->sc_table_changed = true; 1606 params->sc_table_dirty = false; 1607 /* Not very clean, this goes to sh_css.c to invalidate the 1608 * shading table for all pipes. Should replaced by a loop 1609 * and a pipe-specific call. 1610 */ 1611 if (!params->output_frame) 1612 sh_css_invalidate_shading_tables(stream); 1613 } 1614 1615 IA_CSS_LEAVE_PRIVATE("void"); 1616 } 1617 1618 void 1619 ia_css_params_store_ia_css_host_data( 1620 hrt_vaddress ddr_addr, 1621 struct ia_css_host_data *data) 1622 { 1623 assert(data); 1624 assert(data->address); 1625 assert(ddr_addr != mmgr_NULL); 1626 1627 IA_CSS_ENTER_PRIVATE(""); 1628 1629 mmgr_store(ddr_addr, 1630 (void *)(data->address), 1631 (size_t)data->size); 1632 1633 IA_CSS_LEAVE_PRIVATE("void"); 1634 } 1635 1636 struct ia_css_host_data * 1637 ia_css_params_alloc_convert_sctbl( 1638 const struct ia_css_pipeline_stage *stage, 1639 const struct ia_css_shading_table *shading_table) 1640 { 1641 const struct ia_css_binary *binary = stage->binary; 1642 struct ia_css_host_data *sctbl; 1643 unsigned int i, j, aligned_width, row_padding; 1644 unsigned int sctbl_size; 1645 short int *ptr; 1646 1647 assert(binary); 1648 assert(shading_table); 1649 1650 IA_CSS_ENTER_PRIVATE(""); 1651 1652 if (!shading_table) { 1653 IA_CSS_LEAVE_PRIVATE("void"); 1654 return NULL; 1655 } 1656 1657 aligned_width = binary->sctbl_aligned_width_per_color; 1658 row_padding = aligned_width - shading_table->width; 1659 sctbl_size = shading_table->height * IA_CSS_SC_NUM_COLORS * aligned_width * 1660 sizeof(short); 1661 1662 sctbl = ia_css_host_data_allocate((size_t)sctbl_size); 1663 1664 if (!sctbl) 1665 return NULL; 1666 ptr = (short int *)sctbl->address; 1667 memset(ptr, 1668 0, 1669 sctbl_size); 1670 1671 for (i = 0; i < shading_table->height; i++) { 1672 for (j = 0; j < IA_CSS_SC_NUM_COLORS; j++) { 1673 memcpy(ptr, 1674 &shading_table->data[j] 1675 [i * shading_table->width], 1676 shading_table->width * sizeof(short)); 1677 ptr += aligned_width; 1678 } 1679 } 1680 1681 IA_CSS_LEAVE_PRIVATE("void"); 1682 return sctbl; 1683 } 1684 1685 enum ia_css_err ia_css_params_store_sctbl( 1686 const struct ia_css_pipeline_stage *stage, 1687 hrt_vaddress sc_tbl, 1688 const struct ia_css_shading_table *sc_config) 1689 { 1690 struct ia_css_host_data *isp_sc_tbl; 1691 1692 IA_CSS_ENTER_PRIVATE(""); 1693 1694 if (!sc_config) { 1695 IA_CSS_LEAVE_PRIVATE("void"); 1696 return IA_CSS_SUCCESS; 1697 } 1698 1699 isp_sc_tbl = ia_css_params_alloc_convert_sctbl(stage, sc_config); 1700 if (!isp_sc_tbl) { 1701 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1702 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1703 } 1704 /* store the shading table to ddr */ 1705 ia_css_params_store_ia_css_host_data(sc_tbl, isp_sc_tbl); 1706 ia_css_host_data_free(isp_sc_tbl); 1707 1708 IA_CSS_LEAVE_PRIVATE("void"); 1709 1710 return IA_CSS_SUCCESS; 1711 } 1712 1713 static void 1714 sh_css_enable_pipeline(const struct ia_css_binary *binary) 1715 { 1716 if (!binary) 1717 return; 1718 1719 IA_CSS_ENTER_PRIVATE(""); 1720 1721 ia_css_isp_param_enable_pipeline(&binary->mem_params); 1722 1723 IA_CSS_LEAVE_PRIVATE("void"); 1724 } 1725 1726 static enum ia_css_err 1727 ia_css_process_zoom_and_motion( 1728 struct ia_css_isp_parameters *params, 1729 const struct ia_css_pipeline_stage *first_stage) { 1730 /* first_stage can be NULL */ 1731 const struct ia_css_pipeline_stage *stage; 1732 enum ia_css_err err = IA_CSS_SUCCESS; 1733 struct ia_css_resolution pipe_in_res; 1734 1735 pipe_in_res.width = 0; 1736 pipe_in_res.height = 0; 1737 1738 assert(params); 1739 1740 IA_CSS_ENTER_PRIVATE(""); 1741 1742 /* Go through all stages to udate uds and cropping */ 1743 for (stage = first_stage; stage; stage = stage->next) 1744 { 1745 struct ia_css_binary *binary; 1746 /* note: the var below is made static as it is quite large; 1747 if it is not static it ends up on the stack which could 1748 cause issues for drivers 1749 */ 1750 static struct ia_css_binary tmp_binary; 1751 1752 const struct ia_css_binary_xinfo *info = NULL; 1753 1754 binary = stage->binary; 1755 if (binary) { 1756 info = binary->info; 1757 } else { 1758 const struct sh_css_binary_args *args = &stage->args; 1759 const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; 1760 1761 if (args->out_frame[0]) 1762 out_infos[0] = &args->out_frame[0]->info; 1763 info = &stage->firmware->info.isp; 1764 ia_css_binary_fill_info(info, false, false, 1765 ATOMISP_INPUT_FORMAT_RAW_10, 1766 args->in_frame ? &args->in_frame->info : NULL, 1767 NULL, 1768 out_infos, 1769 args->out_vf_frame ? &args->out_vf_frame->info 1770 : NULL, 1771 &tmp_binary, 1772 NULL, 1773 -1, true); 1774 binary = &tmp_binary; 1775 binary->info = info; 1776 } 1777 1778 if (stage == first_stage) { 1779 /* we will use pipe_in_res to scale the zoom crop region if needed */ 1780 pipe_in_res = binary->effective_in_frame_res; 1781 } 1782 1783 assert(stage->stage_num < SH_CSS_MAX_STAGES); 1784 if (params->dz_config.zoom_region.resolution.width == 0 && 1785 params->dz_config.zoom_region.resolution.height == 0) { 1786 sh_css_update_uds_and_crop_info( 1787 &info->sp, 1788 &binary->in_frame_info, 1789 &binary->out_frame_info[0], 1790 &binary->dvs_envelope, 1791 ¶ms->dz_config, 1792 ¶ms->motion_config, 1793 ¶ms->uds[stage->stage_num].uds, 1794 ¶ms->uds[stage->stage_num].crop_pos, 1795 stage->enable_zoom); 1796 } else { 1797 err = sh_css_update_uds_and_crop_info_based_on_zoom_region( 1798 &info->sp, 1799 &binary->in_frame_info, 1800 &binary->out_frame_info[0], 1801 &binary->dvs_envelope, 1802 ¶ms->dz_config, 1803 ¶ms->motion_config, 1804 ¶ms->uds[stage->stage_num].uds, 1805 ¶ms->uds[stage->stage_num].crop_pos, 1806 pipe_in_res, 1807 stage->enable_zoom); 1808 if (err != IA_CSS_SUCCESS) 1809 return err; 1810 } 1811 } 1812 params->isp_params_changed = true; 1813 1814 IA_CSS_LEAVE_PRIVATE("void"); 1815 return err; 1816 } 1817 1818 static void 1819 sh_css_set_gamma_table(struct ia_css_isp_parameters *params, 1820 const struct ia_css_gamma_table *table) 1821 { 1822 if (!table) 1823 return; 1824 IA_CSS_ENTER_PRIVATE("table=%p", table); 1825 1826 assert(params); 1827 params->gc_table = *table; 1828 params->config_changed[IA_CSS_GC_ID] = true; 1829 1830 IA_CSS_LEAVE_PRIVATE("void"); 1831 } 1832 1833 static void 1834 sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, 1835 struct ia_css_gamma_table *table) 1836 { 1837 if (!table) 1838 return; 1839 IA_CSS_ENTER_PRIVATE("table=%p", table); 1840 1841 assert(params); 1842 *table = params->gc_table; 1843 1844 IA_CSS_LEAVE_PRIVATE("void"); 1845 } 1846 1847 static void 1848 sh_css_set_ctc_table(struct ia_css_isp_parameters *params, 1849 const struct ia_css_ctc_table *table) 1850 { 1851 if (!table) 1852 return; 1853 1854 IA_CSS_ENTER_PRIVATE("table=%p", table); 1855 1856 assert(params); 1857 params->ctc_table = *table; 1858 params->config_changed[IA_CSS_CTC_ID] = true; 1859 1860 IA_CSS_LEAVE_PRIVATE("void"); 1861 } 1862 1863 static void 1864 sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, 1865 struct ia_css_ctc_table *table) 1866 { 1867 if (!table) 1868 return; 1869 1870 IA_CSS_ENTER_PRIVATE("table=%p", table); 1871 1872 assert(params); 1873 *table = params->ctc_table; 1874 1875 IA_CSS_LEAVE_PRIVATE("void"); 1876 } 1877 1878 static void 1879 sh_css_set_macc_table(struct ia_css_isp_parameters *params, 1880 const struct ia_css_macc_table *table) 1881 { 1882 if (!table) 1883 return; 1884 1885 IA_CSS_ENTER_PRIVATE("table=%p", table); 1886 1887 assert(params); 1888 params->macc_table = *table; 1889 params->config_changed[IA_CSS_MACC_ID] = true; 1890 1891 IA_CSS_LEAVE_PRIVATE("void"); 1892 } 1893 1894 static void 1895 sh_css_get_macc_table(const struct ia_css_isp_parameters *params, 1896 struct ia_css_macc_table *table) 1897 { 1898 if (!table) 1899 return; 1900 1901 IA_CSS_ENTER_PRIVATE("table=%p", table); 1902 1903 assert(params); 1904 *table = params->macc_table; 1905 1906 IA_CSS_LEAVE_PRIVATE("void"); 1907 } 1908 1909 void ia_css_morph_table_free( 1910 struct ia_css_morph_table *me) 1911 { 1912 unsigned int i; 1913 1914 if (!me) 1915 return; 1916 1917 IA_CSS_ENTER(""); 1918 1919 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1920 if (me->coordinates_x[i]) { 1921 sh_css_free(me->coordinates_x[i]); 1922 me->coordinates_x[i] = NULL; 1923 } 1924 if (me->coordinates_y[i]) { 1925 sh_css_free(me->coordinates_y[i]); 1926 me->coordinates_y[i] = NULL; 1927 } 1928 } 1929 1930 sh_css_free(me); 1931 IA_CSS_LEAVE("void"); 1932 } 1933 1934 struct ia_css_morph_table *ia_css_morph_table_allocate( 1935 unsigned int width, 1936 unsigned int height) 1937 { 1938 unsigned int i; 1939 struct ia_css_morph_table *me; 1940 1941 IA_CSS_ENTER(""); 1942 1943 me = sh_css_malloc(sizeof(*me)); 1944 if (!me) { 1945 IA_CSS_ERROR("out of memory"); 1946 return me; 1947 } 1948 1949 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1950 me->coordinates_x[i] = NULL; 1951 me->coordinates_y[i] = NULL; 1952 } 1953 1954 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1955 me->coordinates_x[i] = 1956 sh_css_malloc(height * width * 1957 sizeof(*me->coordinates_x[i])); 1958 me->coordinates_y[i] = 1959 sh_css_malloc(height * width * 1960 sizeof(*me->coordinates_y[i])); 1961 1962 if ((!me->coordinates_x[i]) || 1963 (!me->coordinates_y[i])) { 1964 ia_css_morph_table_free(me); 1965 me = NULL; 1966 return me; 1967 } 1968 } 1969 me->width = width; 1970 me->height = height; 1971 IA_CSS_LEAVE(""); 1972 return me; 1973 } 1974 1975 static enum ia_css_err sh_css_params_default_morph_table( 1976 struct ia_css_morph_table **table, 1977 const struct ia_css_binary *binary) 1978 { 1979 /* MW 2400 advanced requires different scaling */ 1980 unsigned int i, j, k, step, width, height; 1981 short start_x[IA_CSS_MORPH_TABLE_NUM_PLANES] = { -8, 0, -8, 0, 0, -8 }, 1982 start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; 1983 struct ia_css_morph_table *tab; 1984 1985 assert(table); 1986 assert(binary); 1987 1988 IA_CSS_ENTER_PRIVATE(""); 1989 1990 step = (ISP_VEC_NELEMS / 16) * 128, 1991 width = binary->morph_tbl_width, 1992 height = binary->morph_tbl_height; 1993 1994 tab = ia_css_morph_table_allocate(width, height); 1995 if (!tab) 1996 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1997 1998 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1999 short val_y = start_y[i]; 2000 2001 for (j = 0; j < height; j++) { 2002 short val_x = start_x[i]; 2003 unsigned short *x_ptr, *y_ptr; 2004 2005 x_ptr = &tab->coordinates_x[i][j * width]; 2006 y_ptr = &tab->coordinates_y[i][j * width]; 2007 for (k = 0; k < width; 2008 k++, x_ptr++, y_ptr++, val_x += (short)step) { 2009 if (k == 0) 2010 *x_ptr = 0; 2011 else if (k == width - 1) 2012 *x_ptr = val_x + 2 * start_x[i]; 2013 else 2014 *x_ptr = val_x; 2015 if (j == 0) 2016 *y_ptr = 0; 2017 else 2018 *y_ptr = val_y; 2019 } 2020 val_y += (short)step; 2021 } 2022 } 2023 *table = tab; 2024 2025 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 2026 2027 return IA_CSS_SUCCESS; 2028 } 2029 2030 static void 2031 sh_css_set_morph_table(struct ia_css_isp_parameters *params, 2032 const struct ia_css_morph_table *table) 2033 { 2034 if (!table) 2035 return; 2036 2037 IA_CSS_ENTER_PRIVATE("table=%p", table); 2038 2039 assert(params); 2040 if (table->enable == false) 2041 table = NULL; 2042 params->morph_table = table; 2043 params->morph_table_changed = true; 2044 IA_CSS_LEAVE_PRIVATE("void"); 2045 } 2046 2047 void 2048 ia_css_translate_3a_statistics( 2049 struct ia_css_3a_statistics *host_stats, 2050 const struct ia_css_isp_3a_statistics_map *isp_stats) 2051 { 2052 IA_CSS_ENTER(""); 2053 if (host_stats->grid.use_dmem) { 2054 IA_CSS_LOG("3A: DMEM"); 2055 ia_css_s3a_dmem_decode(host_stats, isp_stats->dmem_stats); 2056 } else { 2057 IA_CSS_LOG("3A: VMEM"); 2058 ia_css_s3a_vmem_decode(host_stats, isp_stats->vmem_stats_hi, 2059 isp_stats->vmem_stats_lo); 2060 } 2061 #if !defined(HAS_NO_HMEM) 2062 IA_CSS_LOG("3A: HMEM"); 2063 ia_css_s3a_hmem_decode(host_stats, isp_stats->hmem_stats); 2064 #endif 2065 2066 IA_CSS_LEAVE("void"); 2067 } 2068 2069 void 2070 ia_css_isp_3a_statistics_map_free(struct ia_css_isp_3a_statistics_map *me) 2071 { 2072 if (me) { 2073 if (me->data_allocated) { 2074 sh_css_free(me->data_ptr); 2075 me->data_ptr = NULL; 2076 me->data_allocated = false; 2077 } 2078 sh_css_free(me); 2079 } 2080 } 2081 2082 struct ia_css_isp_3a_statistics_map * 2083 ia_css_isp_3a_statistics_map_allocate( 2084 const struct ia_css_isp_3a_statistics *isp_stats, 2085 void *data_ptr) 2086 { 2087 struct ia_css_isp_3a_statistics_map *me; 2088 /* Windows compiler does not like adding sizes to a void * 2089 * so we use a local char * instead. */ 2090 char *base_ptr; 2091 2092 me = sh_css_malloc(sizeof(*me)); 2093 if (!me) { 2094 IA_CSS_LEAVE("cannot allocate memory"); 2095 goto err; 2096 } 2097 2098 me->data_ptr = data_ptr; 2099 me->data_allocated = !data_ptr; 2100 if (!data_ptr) { 2101 me->data_ptr = sh_css_malloc(isp_stats->size); 2102 if (!me->data_ptr) { 2103 IA_CSS_LEAVE("cannot allocate memory"); 2104 goto err; 2105 } 2106 } 2107 base_ptr = me->data_ptr; 2108 2109 me->size = isp_stats->size; 2110 /* GCC complains when we assign a char * to a void *, so these 2111 * casts are necessary unfortunately. */ 2112 me->dmem_stats = (void *)base_ptr; 2113 me->vmem_stats_hi = (void *)(base_ptr + isp_stats->dmem_size); 2114 me->vmem_stats_lo = (void *)(base_ptr + isp_stats->dmem_size + 2115 isp_stats->vmem_size); 2116 me->hmem_stats = (void *)(base_ptr + isp_stats->dmem_size + 2117 2 * isp_stats->vmem_size); 2118 2119 IA_CSS_LEAVE("map=%p", me); 2120 return me; 2121 2122 err: 2123 if (me) 2124 sh_css_free(me); 2125 return NULL; 2126 } 2127 2128 enum ia_css_err 2129 ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, 2130 const struct ia_css_isp_3a_statistics *isp_stats) { 2131 struct ia_css_isp_3a_statistics_map *map; 2132 enum ia_css_err ret = IA_CSS_SUCCESS; 2133 2134 IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); 2135 2136 assert(host_stats); 2137 assert(isp_stats); 2138 2139 map = ia_css_isp_3a_statistics_map_allocate(isp_stats, NULL); 2140 if (map) 2141 { 2142 mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); 2143 ia_css_translate_3a_statistics(host_stats, map); 2144 ia_css_isp_3a_statistics_map_free(map); 2145 } else 2146 { 2147 IA_CSS_ERROR("out of memory"); 2148 ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2149 } 2150 2151 IA_CSS_LEAVE_ERR(ret); 2152 return ret; 2153 } 2154 2155 /* Parameter encoding is not yet orthogonal. 2156 This function hnadles some of the exceptions. 2157 */ 2158 static void 2159 ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, 2160 struct ia_css_isp_parameters *params) 2161 { 2162 assert(params); 2163 2164 /* Copy also to DP. Should be done by the driver. */ 2165 params->dp_config.gr = params->wb_config.gr; 2166 params->dp_config.r = params->wb_config.r; 2167 params->dp_config.b = params->wb_config.b; 2168 params->dp_config.gb = params->wb_config.gb; 2169 #ifdef ISP2401 2170 assert(pipe); 2171 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2172 2173 if (pipe->mode < IA_CSS_PIPE_ID_NUM) { 2174 params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; 2175 params->pipe_dp_config[pipe->mode].r = params->wb_config.r; 2176 params->pipe_dp_config[pipe->mode].b = params->wb_config.b; 2177 params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; 2178 } 2179 #endif 2180 } 2181 2182 #ifdef ISP2401 2183 static void 2184 sh_css_set_dp_config(const struct ia_css_pipe *pipe, 2185 struct ia_css_isp_parameters *params, 2186 const struct ia_css_dp_config *config) 2187 { 2188 if (!config) 2189 return; 2190 2191 assert(params); 2192 assert(pipe); 2193 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2194 2195 IA_CSS_ENTER_PRIVATE("config=%p", config); 2196 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2197 if (pipe->mode < IA_CSS_PIPE_ID_NUM) { 2198 params->pipe_dp_config[pipe->mode] = *config; 2199 params->pipe_dpc_config_changed[pipe->mode] = true; 2200 } 2201 IA_CSS_LEAVE_PRIVATE("void"); 2202 } 2203 #endif 2204 2205 static void 2206 sh_css_get_dp_config(const struct ia_css_pipe *pipe, 2207 const struct ia_css_isp_parameters *params, 2208 struct ia_css_dp_config *config) 2209 { 2210 if (!config) 2211 return; 2212 2213 assert(params); 2214 assert(pipe); 2215 IA_CSS_ENTER_PRIVATE("config=%p", config); 2216 2217 *config = params->pipe_dp_config[pipe->mode]; 2218 2219 IA_CSS_LEAVE_PRIVATE("void"); 2220 } 2221 2222 static void 2223 sh_css_set_nr_config(struct ia_css_isp_parameters *params, 2224 const struct ia_css_nr_config *config) 2225 { 2226 if (!config) 2227 return; 2228 assert(params); 2229 2230 IA_CSS_ENTER_PRIVATE("config=%p", config); 2231 2232 ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2233 params->nr_config = *config; 2234 params->yee_config.nr = *config; 2235 params->config_changed[IA_CSS_NR_ID] = true; 2236 params->config_changed[IA_CSS_YEE_ID] = true; 2237 params->config_changed[IA_CSS_BNR_ID] = true; 2238 2239 IA_CSS_LEAVE_PRIVATE("void"); 2240 } 2241 2242 static void 2243 sh_css_set_ee_config(struct ia_css_isp_parameters *params, 2244 const struct ia_css_ee_config *config) 2245 { 2246 if (!config) 2247 return; 2248 assert(params); 2249 2250 IA_CSS_ENTER_PRIVATE("config=%p", config); 2251 ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2252 2253 params->ee_config = *config; 2254 params->yee_config.ee = *config; 2255 params->config_changed[IA_CSS_YEE_ID] = true; 2256 2257 IA_CSS_LEAVE_PRIVATE("void"); 2258 } 2259 2260 static void 2261 sh_css_get_ee_config(const struct ia_css_isp_parameters *params, 2262 struct ia_css_ee_config *config) 2263 { 2264 if (!config) 2265 return; 2266 2267 IA_CSS_ENTER_PRIVATE("config=%p", config); 2268 2269 assert(params); 2270 *config = params->ee_config; 2271 2272 ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2273 IA_CSS_LEAVE_PRIVATE("void"); 2274 } 2275 2276 static void 2277 sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, 2278 struct ia_css_isp_parameters *params, 2279 const struct ia_css_dvs_6axis_config *dvs_config) 2280 { 2281 if (!dvs_config) 2282 return; 2283 assert(params); 2284 assert(pipe); 2285 assert(dvs_config->height_y == dvs_config->height_uv); 2286 assert((dvs_config->width_y - 1) == 2 * (dvs_config->width_uv - 1)); 2287 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2288 2289 IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); 2290 2291 copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config); 2292 2293 #if !defined(HAS_NO_DVS_6AXIS_CONFIG_UPDATE) 2294 params->pipe_dvs_6axis_config_changed[pipe->mode] = true; 2295 #endif 2296 2297 IA_CSS_LEAVE_PRIVATE("void"); 2298 } 2299 2300 static void 2301 sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, 2302 const struct ia_css_isp_parameters *params, 2303 struct ia_css_dvs_6axis_config *dvs_config) 2304 { 2305 if (!dvs_config) 2306 return; 2307 assert(params); 2308 assert(pipe); 2309 assert(dvs_config->height_y == dvs_config->height_uv); 2310 assert((dvs_config->width_y - 1) == 2 * dvs_config->width_uv - 1); 2311 2312 IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); 2313 2314 if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && 2315 (dvs_config->width_y == params->pipe_dvs_6axis_config[pipe->mode]->width_y) && 2316 (dvs_config->height_y == params->pipe_dvs_6axis_config[pipe->mode]->height_y) && 2317 (dvs_config->width_uv == params->pipe_dvs_6axis_config[pipe->mode]->width_uv) && 2318 (dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv) 2319 && 2320 dvs_config->xcoords_y && 2321 dvs_config->ycoords_y && 2322 dvs_config->xcoords_uv && 2323 dvs_config->ycoords_uv) { 2324 copy_dvs_6axis_table(dvs_config, params->pipe_dvs_6axis_config[pipe->mode]); 2325 } 2326 2327 IA_CSS_LEAVE_PRIVATE("void"); 2328 } 2329 2330 static void 2331 sh_css_set_baa_config(struct ia_css_isp_parameters *params, 2332 const struct ia_css_aa_config *config) 2333 { 2334 if (!config) 2335 return; 2336 assert(params); 2337 2338 IA_CSS_ENTER_PRIVATE("config=%p", config); 2339 2340 params->bds_config = *config; 2341 params->config_changed[IA_CSS_BDS_ID] = true; 2342 2343 IA_CSS_LEAVE_PRIVATE("void"); 2344 } 2345 2346 static void 2347 sh_css_get_baa_config(const struct ia_css_isp_parameters *params, 2348 struct ia_css_aa_config *config) 2349 { 2350 if (!config) 2351 return; 2352 assert(params); 2353 2354 IA_CSS_ENTER_PRIVATE("config=%p", config); 2355 2356 *config = params->bds_config; 2357 2358 IA_CSS_LEAVE_PRIVATE("void"); 2359 } 2360 2361 static void 2362 sh_css_set_dz_config(struct ia_css_isp_parameters *params, 2363 const struct ia_css_dz_config *config) 2364 { 2365 if (!config) 2366 return; 2367 assert(params); 2368 2369 IA_CSS_ENTER_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); 2370 2371 assert(config->dx <= HRT_GDC_N); 2372 assert(config->dy <= HRT_GDC_N); 2373 2374 params->dz_config = *config; 2375 params->dz_config_changed = true; 2376 /* JK: Why isp params changed?? */ 2377 params->isp_params_changed = true; 2378 2379 IA_CSS_LEAVE_PRIVATE("void"); 2380 } 2381 2382 static void 2383 sh_css_get_dz_config(const struct ia_css_isp_parameters *params, 2384 struct ia_css_dz_config *config) 2385 { 2386 if (!config) 2387 return; 2388 assert(params); 2389 2390 IA_CSS_ENTER_PRIVATE("config=%p", config); 2391 2392 *config = params->dz_config; 2393 2394 IA_CSS_LEAVE_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); 2395 } 2396 2397 static void 2398 sh_css_set_motion_vector(struct ia_css_isp_parameters *params, 2399 const struct ia_css_vector *motion) 2400 { 2401 if (!motion) 2402 return; 2403 assert(params); 2404 2405 IA_CSS_ENTER_PRIVATE("x=%d, y=%d", motion->x, motion->y); 2406 2407 params->motion_config = *motion; 2408 /* JK: Why do isp params change? */ 2409 params->motion_config_changed = true; 2410 params->isp_params_changed = true; 2411 2412 IA_CSS_LEAVE_PRIVATE("void"); 2413 } 2414 2415 static void 2416 sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, 2417 struct ia_css_vector *motion) 2418 { 2419 if (!motion) 2420 return; 2421 assert(params); 2422 2423 IA_CSS_ENTER_PRIVATE("motion=%p", motion); 2424 2425 *motion = params->motion_config; 2426 2427 IA_CSS_LEAVE_PRIVATE("x=%d, y=%d", motion->x, motion->y); 2428 } 2429 2430 struct ia_css_isp_config * 2431 sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) 2432 { 2433 if (!pipe) { 2434 IA_CSS_ERROR("pipe=%p", NULL); 2435 return NULL; 2436 } 2437 return pipe->config.p_isp_config; 2438 } 2439 2440 enum ia_css_err 2441 ia_css_stream_set_isp_config( 2442 struct ia_css_stream *stream, 2443 const struct ia_css_isp_config *config) { 2444 return ia_css_stream_set_isp_config_on_pipe(stream, config, NULL); 2445 } 2446 2447 enum ia_css_err 2448 ia_css_stream_set_isp_config_on_pipe( 2449 struct ia_css_stream *stream, 2450 const struct ia_css_isp_config *config, 2451 struct ia_css_pipe *pipe) { 2452 enum ia_css_err err = IA_CSS_SUCCESS; 2453 2454 if ((!stream) || (!config)) 2455 return IA_CSS_ERR_INVALID_ARGUMENTS; 2456 2457 IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); 2458 2459 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2460 if (config->output_frame) 2461 err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe); 2462 else 2463 #endif 2464 err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe); 2465 2466 IA_CSS_LEAVE_ERR(err); 2467 return err; 2468 } 2469 2470 enum ia_css_err 2471 ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, 2472 struct ia_css_isp_config *config) { 2473 struct ia_css_pipe *pipe_in = pipe; 2474 enum ia_css_err err = IA_CSS_SUCCESS; 2475 2476 IA_CSS_ENTER("pipe=%p", pipe); 2477 2478 if ((!pipe) || (!pipe->stream)) 2479 return IA_CSS_ERR_INVALID_ARGUMENTS; 2480 2481 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); 2482 2483 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2484 if (config->output_frame) 2485 err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe); 2486 else 2487 #endif 2488 err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in); 2489 IA_CSS_LEAVE_ERR(err); 2490 return err; 2491 } 2492 2493 static enum ia_css_err 2494 sh_css_set_global_isp_config_on_pipe( 2495 struct ia_css_pipe *curr_pipe, 2496 const struct ia_css_isp_config *config, 2497 struct ia_css_pipe *pipe) { 2498 enum ia_css_err err = IA_CSS_SUCCESS; 2499 enum ia_css_err err1 = IA_CSS_SUCCESS; 2500 enum ia_css_err err2 = IA_CSS_SUCCESS; 2501 2502 IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", curr_pipe, config, pipe); 2503 2504 err1 = sh_css_init_isp_params_from_config(curr_pipe, curr_pipe->stream->isp_params_configs, config, pipe); 2505 2506 /* Now commit all changes to the SP */ 2507 err2 = sh_css_param_update_isp_params(curr_pipe, curr_pipe->stream->isp_params_configs, sh_css_sp_is_running(), pipe); 2508 2509 /* The following code is intentional. The sh_css_init_isp_params_from_config interface 2510 * throws an error when both DPC and BDS is enabled. The CSS API must pass this error 2511 * information to the caller, ie. the host. We do not return this error immediately, 2512 * but instead continue with updating the ISP params to enable testing of features 2513 * which are currently in TR phase. */ 2514 2515 err = (err1 != IA_CSS_SUCCESS) ? err1 : ((err2 != IA_CSS_SUCCESS) ? err2 : err); 2516 2517 IA_CSS_LEAVE_ERR_PRIVATE(err); 2518 return err; 2519 } 2520 2521 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2522 static enum ia_css_err 2523 sh_css_set_per_frame_isp_config_on_pipe( 2524 struct ia_css_stream *stream, 2525 const struct ia_css_isp_config *config, 2526 struct ia_css_pipe *pipe) { 2527 unsigned int i; 2528 bool per_frame_config_created = false; 2529 enum ia_css_err err = IA_CSS_SUCCESS; 2530 enum ia_css_err err1 = IA_CSS_SUCCESS; 2531 enum ia_css_err err2 = IA_CSS_SUCCESS; 2532 enum ia_css_err err3 = IA_CSS_SUCCESS; 2533 2534 struct sh_css_ddr_address_map *ddr_ptrs; 2535 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2536 struct ia_css_isp_parameters *params; 2537 2538 IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", stream, config, pipe); 2539 2540 if (!pipe) 2541 { 2542 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2543 goto exit; 2544 } 2545 2546 /* create per-frame ISP params object with default values 2547 * from stream->isp_params_configs if one doesn't already exist 2548 */ 2549 if (!stream->per_frame_isp_params_configs) 2550 { 2551 err = sh_css_create_isp_params(stream, 2552 &stream->per_frame_isp_params_configs); 2553 if (err != IA_CSS_SUCCESS) 2554 goto exit; 2555 per_frame_config_created = true; 2556 } 2557 2558 params = stream->per_frame_isp_params_configs; 2559 2560 /* update new ISP params object with the new config */ 2561 if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) 2562 { 2563 err1 = IA_CSS_ERR_INVALID_ARGUMENTS; 2564 } 2565 2566 err2 = sh_css_init_isp_params_from_config(stream->pipes[0], params, config, pipe); 2567 2568 if (per_frame_config_created) 2569 { 2570 ddr_ptrs = ¶ms->ddr_ptrs; 2571 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 2572 /* create per pipe reference to general ddr_ptrs */ 2573 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 2574 ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); 2575 params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; 2576 } 2577 } 2578 2579 /* now commit to ddr */ 2580 err3 = sh_css_param_update_isp_params(stream->pipes[0], params, sh_css_sp_is_running(), pipe); 2581 2582 /* The following code is intentional. The sh_css_init_sp_params_from_config and 2583 * sh_css_init_isp_params_from_config throws an error when both DPC and BDS is enabled. 2584 * The CSS API must pass this error information to the caller, ie. the host. 2585 * We do not return this error immediately, but instead continue with updating the ISP params 2586 * to enable testing of features which are currently in TR phase. */ 2587 err = (err1 != IA_CSS_SUCCESS) ? err1 : 2588 (err2 != IA_CSS_SUCCESS) ? err2 : 2589 (err3 != IA_CSS_SUCCESS) ? err3 : err; 2590 exit: 2591 IA_CSS_LEAVE_ERR_PRIVATE(err); 2592 return err; 2593 } 2594 #endif 2595 2596 static enum ia_css_err 2597 sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, 2598 struct ia_css_isp_parameters *params, 2599 const struct ia_css_isp_config *config, 2600 struct ia_css_pipe *pipe_in) { 2601 enum ia_css_err err = IA_CSS_SUCCESS; 2602 bool is_dp_10bpp = true; 2603 2604 assert(pipe); 2605 2606 IA_CSS_ENTER_PRIVATE("pipe=%p, config=%p, params=%p", pipe, config, params); 2607 2608 ia_css_set_configs(params, config); 2609 2610 sh_css_set_nr_config(params, config->nr_config); 2611 sh_css_set_ee_config(params, config->ee_config); 2612 sh_css_set_baa_config(params, config->baa_config); 2613 if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && 2614 (params->pipe_dvs_6axis_config[pipe->mode])) 2615 sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); 2616 sh_css_set_dz_config(params, config->dz_config); 2617 sh_css_set_motion_vector(params, config->motion_vector); 2618 sh_css_update_shading_table_status(pipe_in, params); 2619 sh_css_set_shading_table(pipe->stream, params, config->shading_table); 2620 sh_css_set_morph_table(params, config->morph_table); 2621 sh_css_set_macc_table(params, config->macc_table); 2622 sh_css_set_gamma_table(params, config->gamma_table); 2623 sh_css_set_ctc_table(params, config->ctc_table); 2624 /* ------ deprecated(bz675) : from ------ */ 2625 sh_css_set_shading_settings(params, config->shading_settings); 2626 /* ------ deprecated(bz675) : to ------ */ 2627 2628 params->dis_coef_table_changed = (config->dvs_coefs); 2629 params->dvs2_coef_table_changed = (config->dvs2_coefs); 2630 2631 params->output_frame = config->output_frame; 2632 params->isp_parameters_id = config->isp_config_id; 2633 #ifdef ISP2401 2634 /* Currently we do not offer CSS interface to set different 2635 * configurations for DPC, i.e. depending on DPC being enabled 2636 * before (NORM+OBC) or after. The folllowing code to set the 2637 * DPC configuration should be updated when this interface is made 2638 * available */ 2639 sh_css_set_dp_config(pipe, params, config->dp_config); 2640 ia_css_set_param_exceptions(pipe, params); 2641 #endif 2642 2643 if (IA_CSS_SUCCESS == 2644 sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) 2645 { 2646 /* return an error when both DPC and BDS is enabled by the 2647 * user. */ 2648 /* we do not exit from this point immediately to allow internal 2649 * firmware feature testing. */ 2650 if (is_dp_10bpp) { 2651 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2652 } 2653 } else 2654 { 2655 err = IA_CSS_ERR_INTERNAL_ERROR; 2656 goto exit; 2657 } 2658 2659 #ifndef ISP2401 2660 ia_css_set_param_exceptions(pipe, params); 2661 #endif 2662 exit: 2663 IA_CSS_LEAVE_ERR_PRIVATE(err); 2664 return err; 2665 } 2666 2667 void 2668 ia_css_stream_get_isp_config( 2669 const struct ia_css_stream *stream, 2670 struct ia_css_isp_config *config) 2671 { 2672 IA_CSS_ENTER("void"); 2673 ia_css_pipe_get_isp_config(stream->pipes[0], config); 2674 IA_CSS_LEAVE("void"); 2675 } 2676 2677 void 2678 ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, 2679 struct ia_css_isp_config *config) 2680 { 2681 struct ia_css_isp_parameters *params = NULL; 2682 2683 assert(config); 2684 2685 IA_CSS_ENTER("config=%p", config); 2686 2687 params = pipe->stream->isp_params_configs; 2688 assert(params); 2689 2690 ia_css_get_configs(params, config); 2691 2692 sh_css_get_ee_config(params, config->ee_config); 2693 sh_css_get_baa_config(params, config->baa_config); 2694 sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); 2695 sh_css_get_dp_config(pipe, params, config->dp_config); 2696 sh_css_get_macc_table(params, config->macc_table); 2697 sh_css_get_gamma_table(params, config->gamma_table); 2698 sh_css_get_ctc_table(params, config->ctc_table); 2699 sh_css_get_dz_config(params, config->dz_config); 2700 sh_css_get_motion_vector(params, config->motion_vector); 2701 /* ------ deprecated(bz675) : from ------ */ 2702 sh_css_get_shading_settings(params, config->shading_settings); 2703 /* ------ deprecated(bz675) : to ------ */ 2704 2705 config->output_frame = params->output_frame; 2706 config->isp_config_id = params->isp_parameters_id; 2707 2708 IA_CSS_LEAVE("void"); 2709 } 2710 2711 #ifndef ISP2401 2712 /* 2713 * coding style says the return of "mmgr_NULL" is the error signal 2714 * 2715 * Deprecated: Implement mmgr_realloc() 2716 */ 2717 static bool realloc_isp_css_mm_buf( 2718 hrt_vaddress *curr_buf, 2719 size_t *curr_size, 2720 size_t needed_size, 2721 bool force, 2722 enum ia_css_err *err, 2723 uint16_t mmgr_attribute) 2724 { 2725 s32 id; 2726 2727 *err = IA_CSS_SUCCESS; 2728 /* Possible optimization: add a function sh_css_isp_css_mm_realloc() 2729 * and implement on top of hmm. */ 2730 2731 IA_CSS_ENTER_PRIVATE("void"); 2732 2733 if (!force && *curr_size >= needed_size) { 2734 IA_CSS_LEAVE_PRIVATE("false"); 2735 return false; 2736 } 2737 /* don't reallocate if single ref to buffer and same size */ 2738 if (*curr_size == needed_size && ia_css_refcount_is_single(*curr_buf)) { 2739 IA_CSS_LEAVE_PRIVATE("false"); 2740 return false; 2741 } 2742 2743 id = IA_CSS_REFCOUNT_PARAM_BUFFER; 2744 ia_css_refcount_decrement(id, *curr_buf); 2745 *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, 2746 mmgr_attribute)); 2747 2748 if (!*curr_buf) { 2749 *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2750 *curr_size = 0; 2751 } else { 2752 *curr_size = needed_size; 2753 } 2754 IA_CSS_LEAVE_PRIVATE("true"); 2755 return true; 2756 } 2757 2758 static bool reallocate_buffer( 2759 hrt_vaddress *curr_buf, 2760 size_t *curr_size, 2761 size_t needed_size, 2762 bool force, 2763 enum ia_css_err *err) 2764 { 2765 bool ret; 2766 u16 mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; 2767 2768 IA_CSS_ENTER_PRIVATE("void"); 2769 2770 ret = realloc_isp_css_mm_buf(curr_buf, 2771 curr_size, needed_size, force, err, mmgr_attribute); 2772 2773 IA_CSS_LEAVE_PRIVATE("ret=%d", ret); 2774 return ret; 2775 } 2776 2777 #endif 2778 2779 struct ia_css_isp_3a_statistics * 2780 ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) 2781 { 2782 struct ia_css_isp_3a_statistics *me; 2783 2784 IA_CSS_ENTER("grid=%p", grid); 2785 2786 assert(grid); 2787 2788 /* MW: Does "grid->enable" also control the histogram output ?? */ 2789 if (!grid->enable) 2790 return NULL; 2791 2792 me = sh_css_calloc(1, sizeof(*me)); 2793 if (!me) 2794 goto err; 2795 2796 if (grid->use_dmem) { 2797 me->dmem_size = sizeof(struct ia_css_3a_output) * 2798 grid->aligned_width * 2799 grid->aligned_height; 2800 } else { 2801 me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * 2802 grid->aligned_height; 2803 } 2804 #if !defined(HAS_NO_HMEM) 2805 me->hmem_size = sizeof_hmem(HMEM0_ID); 2806 #endif 2807 2808 /* All subsections need to be aligned to the system bus width */ 2809 me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); 2810 me->vmem_size = CEIL_MUL(me->vmem_size, HIVE_ISP_DDR_WORD_BYTES); 2811 me->hmem_size = CEIL_MUL(me->hmem_size, HIVE_ISP_DDR_WORD_BYTES); 2812 2813 me->size = me->dmem_size + me->vmem_size * 2 + me->hmem_size; 2814 me->data_ptr = mmgr_malloc(me->size); 2815 if (me->data_ptr == mmgr_NULL) { 2816 sh_css_free(me); 2817 me = NULL; 2818 goto err; 2819 } 2820 if (me->dmem_size) 2821 me->data.dmem.s3a_tbl = me->data_ptr; 2822 if (me->vmem_size) { 2823 me->data.vmem.s3a_tbl_hi = me->data_ptr + me->dmem_size; 2824 me->data.vmem.s3a_tbl_lo = me->data_ptr + me->dmem_size + me->vmem_size; 2825 } 2826 if (me->hmem_size) 2827 me->data_hmem.rgby_tbl = me->data_ptr + me->dmem_size + 2 * me->vmem_size; 2828 2829 err: 2830 IA_CSS_LEAVE("return=%p", me); 2831 return me; 2832 } 2833 2834 void 2835 ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me) 2836 { 2837 if (me) { 2838 hmm_free(me->data_ptr); 2839 sh_css_free(me); 2840 } 2841 } 2842 2843 struct ia_css_isp_skc_dvs_statistics *ia_css_skc_dvs_statistics_allocate(void) 2844 { 2845 return NULL; 2846 } 2847 2848 struct ia_css_metadata * 2849 ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info) 2850 { 2851 struct ia_css_metadata *md = NULL; 2852 2853 IA_CSS_ENTER(""); 2854 2855 if (metadata_info->size == 0) 2856 return NULL; 2857 2858 md = sh_css_malloc(sizeof(*md)); 2859 if (!md) 2860 goto error; 2861 2862 md->info = *metadata_info; 2863 md->exp_id = 0; 2864 md->address = mmgr_malloc(metadata_info->size); 2865 if (md->address == mmgr_NULL) 2866 goto error; 2867 2868 IA_CSS_LEAVE("return=%p", md); 2869 return md; 2870 2871 error: 2872 ia_css_metadata_free(md); 2873 IA_CSS_LEAVE("return=%p", NULL); 2874 return NULL; 2875 } 2876 2877 void 2878 ia_css_metadata_free(struct ia_css_metadata *me) 2879 { 2880 if (me) { 2881 /* The enter and leave macros are placed inside 2882 * the condition to avoid false logging of metadata 2883 * free events when metadata is disabled. 2884 * We found this to be confusing during development 2885 * and debugging. */ 2886 IA_CSS_ENTER("me=%p", me); 2887 hmm_free(me->address); 2888 sh_css_free(me); 2889 IA_CSS_LEAVE("void"); 2890 } 2891 } 2892 2893 void 2894 ia_css_metadata_free_multiple(unsigned int num_bufs, 2895 struct ia_css_metadata **bufs) 2896 { 2897 unsigned int i; 2898 2899 if (bufs) { 2900 for (i = 0; i < num_bufs; i++) 2901 ia_css_metadata_free(bufs[i]); 2902 } 2903 } 2904 2905 static unsigned int g_param_buffer_dequeue_count; 2906 static unsigned int g_param_buffer_enqueue_count; 2907 2908 enum ia_css_err 2909 ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) { 2910 enum ia_css_err err = IA_CSS_SUCCESS; 2911 unsigned int i; 2912 struct sh_css_ddr_address_map *ddr_ptrs; 2913 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2914 struct ia_css_isp_parameters *params; 2915 2916 assert(stream); 2917 IA_CSS_ENTER_PRIVATE("void"); 2918 2919 if (!stream) 2920 { 2921 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); 2922 return IA_CSS_ERR_INVALID_ARGUMENTS; 2923 } 2924 /* TMP: tracking of paramsets */ 2925 g_param_buffer_dequeue_count = 0; 2926 g_param_buffer_enqueue_count = 0; 2927 2928 stream->per_frame_isp_params_configs = NULL; 2929 err = sh_css_create_isp_params(stream, 2930 &stream->isp_params_configs); 2931 if (err != IA_CSS_SUCCESS) 2932 goto ERR; 2933 2934 params = stream->isp_params_configs; 2935 if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) 2936 { 2937 /* we do not return the error immediately to enable internal 2938 * firmware feature testing */ 2939 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2940 } 2941 2942 ddr_ptrs = ¶ms->ddr_ptrs; 2943 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 2944 2945 /* create per pipe reference to general ddr_ptrs */ 2946 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) 2947 { 2948 ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); 2949 params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; 2950 } 2951 2952 ERR: 2953 IA_CSS_LEAVE_ERR_PRIVATE(err); 2954 return err; 2955 } 2956 2957 static void 2958 ia_css_set_sdis_config( 2959 struct ia_css_isp_parameters *params, 2960 const struct ia_css_dvs_coefficients *dvs_coefs) 2961 { 2962 ia_css_set_sdis_horicoef_config(params, dvs_coefs); 2963 ia_css_set_sdis_vertcoef_config(params, dvs_coefs); 2964 ia_css_set_sdis_horiproj_config(params, dvs_coefs); 2965 ia_css_set_sdis_vertproj_config(params, dvs_coefs); 2966 } 2967 2968 static void 2969 ia_css_set_sdis2_config( 2970 struct ia_css_isp_parameters *params, 2971 const struct ia_css_dvs2_coefficients *dvs2_coefs) 2972 { 2973 ia_css_set_sdis2_horicoef_config(params, dvs2_coefs); 2974 ia_css_set_sdis2_vertcoef_config(params, dvs2_coefs); 2975 ia_css_set_sdis2_horiproj_config(params, dvs2_coefs); 2976 ia_css_set_sdis2_vertproj_config(params, dvs2_coefs); 2977 } 2978 2979 static enum ia_css_err 2980 sh_css_create_isp_params(struct ia_css_stream *stream, 2981 struct ia_css_isp_parameters **isp_params_out) { 2982 bool succ = true; 2983 unsigned int i; 2984 struct sh_css_ddr_address_map *ddr_ptrs; 2985 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2986 enum ia_css_err err = IA_CSS_SUCCESS; 2987 size_t params_size; 2988 struct ia_css_isp_parameters *params = 2989 sh_css_malloc(sizeof(struct ia_css_isp_parameters)); 2990 2991 if (!params) 2992 { 2993 *isp_params_out = NULL; 2994 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2995 IA_CSS_ERROR("%s:%d error: cannot allocate memory", __FILE__, __LINE__); 2996 IA_CSS_LEAVE_ERR_PRIVATE(err); 2997 return err; 2998 } else 2999 { 3000 memset(params, 0, sizeof(struct ia_css_isp_parameters)); 3001 } 3002 3003 ddr_ptrs = ¶ms->ddr_ptrs; 3004 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 3005 3006 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) 3007 { 3008 memset(¶ms->pipe_ddr_ptrs[i], 0, 3009 sizeof(params->pipe_ddr_ptrs[i])); 3010 memset(¶ms->pipe_ddr_ptrs_size[i], 0, 3011 sizeof(params->pipe_ddr_ptrs_size[i])); 3012 } 3013 3014 memset(ddr_ptrs, 0, sizeof(*ddr_ptrs)); 3015 memset(ddr_ptrs_size, 0, sizeof(*ddr_ptrs_size)); 3016 3017 params_size = sizeof(params->uds); 3018 ddr_ptrs_size->isp_param = params_size; 3019 ddr_ptrs->isp_param = 3020 ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 3021 mmgr_malloc(params_size)); 3022 succ &= (ddr_ptrs->isp_param != mmgr_NULL); 3023 3024 ddr_ptrs_size->macc_tbl = sizeof(struct ia_css_macc_table); 3025 ddr_ptrs->macc_tbl = 3026 ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 3027 mmgr_malloc(sizeof(struct ia_css_macc_table))); 3028 succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); 3029 3030 *isp_params_out = params; 3031 return err; 3032 } 3033 3034 static bool 3035 sh_css_init_isp_params_from_global(struct ia_css_stream *stream, 3036 struct ia_css_isp_parameters *params, 3037 bool use_default_config, 3038 struct ia_css_pipe *pipe_in) 3039 { 3040 bool retval = true; 3041 int i = 0; 3042 bool is_dp_10bpp = true; 3043 unsigned int isp_pipe_version = ia_css_pipe_get_isp_pipe_version( 3044 stream->pipes[0]); 3045 struct ia_css_isp_parameters *stream_params = stream->isp_params_configs; 3046 3047 if (!use_default_config && !stream_params) { 3048 retval = false; 3049 goto exit; 3050 } 3051 3052 params->output_frame = NULL; 3053 params->isp_parameters_id = 0; 3054 3055 if (use_default_config) { 3056 ia_css_set_xnr3_config(params, &default_xnr3_config); 3057 3058 sh_css_set_nr_config(params, &default_nr_config); 3059 sh_css_set_ee_config(params, &default_ee_config); 3060 if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) 3061 sh_css_set_macc_table(params, &default_macc_table); 3062 else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) 3063 sh_css_set_macc_table(params, &default_macc2_table); 3064 sh_css_set_gamma_table(params, &default_gamma_table); 3065 sh_css_set_ctc_table(params, &default_ctc_table); 3066 sh_css_set_baa_config(params, &default_baa_config); 3067 sh_css_set_dz_config(params, &default_dz_config); 3068 /* ------ deprecated(bz675) : from ------ */ 3069 sh_css_set_shading_settings(params, &default_shading_settings); 3070 /* ------ deprecated(bz675) : to ------ */ 3071 3072 ia_css_set_s3a_config(params, &default_3a_config); 3073 ia_css_set_wb_config(params, &default_wb_config); 3074 ia_css_set_csc_config(params, &default_cc_config); 3075 ia_css_set_tnr_config(params, &default_tnr_config); 3076 ia_css_set_ob_config(params, &default_ob_config); 3077 ia_css_set_dp_config(params, &default_dp_config); 3078 #ifndef ISP2401 3079 ia_css_set_param_exceptions(pipe_in, params); 3080 #else 3081 3082 for (i = 0; i < stream->num_pipes; i++) { 3083 if (sh_css_select_dp_10bpp_config(stream->pipes[i], 3084 &is_dp_10bpp) == IA_CSS_SUCCESS) { 3085 /* set the return value as false if both DPC and 3086 * BDS is enabled by the user. But we do not return 3087 * the value immediately to enable internal firmware 3088 * feature testing. */ 3089 if (is_dp_10bpp) { 3090 sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); 3091 } else { 3092 sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); 3093 } 3094 } else { 3095 retval = false; 3096 goto exit; 3097 } 3098 3099 ia_css_set_param_exceptions(stream->pipes[i], params); 3100 } 3101 3102 #endif 3103 ia_css_set_de_config(params, &default_de_config); 3104 ia_css_set_gc_config(params, &default_gc_config); 3105 ia_css_set_anr_config(params, &default_anr_config); 3106 ia_css_set_anr2_config(params, &default_anr_thres); 3107 ia_css_set_ce_config(params, &default_ce_config); 3108 ia_css_set_xnr_table_config(params, &default_xnr_table); 3109 ia_css_set_ecd_config(params, &default_ecd_config); 3110 ia_css_set_ynr_config(params, &default_ynr_config); 3111 ia_css_set_fc_config(params, &default_fc_config); 3112 ia_css_set_cnr_config(params, &default_cnr_config); 3113 ia_css_set_macc_config(params, &default_macc_config); 3114 ia_css_set_ctc_config(params, &default_ctc_config); 3115 ia_css_set_aa_config(params, &default_aa_config); 3116 ia_css_set_r_gamma_config(params, &default_r_gamma_table); 3117 ia_css_set_g_gamma_config(params, &default_g_gamma_table); 3118 ia_css_set_b_gamma_config(params, &default_b_gamma_table); 3119 ia_css_set_yuv2rgb_config(params, &default_yuv2rgb_cc_config); 3120 ia_css_set_rgb2yuv_config(params, &default_rgb2yuv_cc_config); 3121 ia_css_set_xnr_config(params, &default_xnr_config); 3122 ia_css_set_sdis_config(params, &default_sdis_config); 3123 ia_css_set_sdis2_config(params, &default_sdis2_config); 3124 ia_css_set_formats_config(params, &default_formats_config); 3125 3126 params->fpn_config.data = NULL; 3127 params->config_changed[IA_CSS_FPN_ID] = true; 3128 params->fpn_config.enabled = 0; 3129 3130 params->motion_config = default_motion_config; 3131 params->motion_config_changed = true; 3132 3133 params->morph_table = NULL; 3134 params->morph_table_changed = true; 3135 3136 params->sc_table = NULL; 3137 params->sc_table_changed = true; 3138 params->sc_table_dirty = false; 3139 params->sc_table_last_pipe_num = 0; 3140 3141 ia_css_sdis2_clear_coefficients(¶ms->dvs2_coefs); 3142 params->dvs2_coef_table_changed = true; 3143 3144 ia_css_sdis_clear_coefficients(¶ms->dvs_coefs); 3145 params->dis_coef_table_changed = true; 3146 #ifdef ISP2401 3147 ia_css_tnr3_set_default_config(¶ms->tnr3_config); 3148 #endif 3149 } else { 3150 ia_css_set_xnr3_config(params, &stream_params->xnr3_config); 3151 3152 sh_css_set_nr_config(params, &stream_params->nr_config); 3153 sh_css_set_ee_config(params, &stream_params->ee_config); 3154 if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) 3155 sh_css_set_macc_table(params, &stream_params->macc_table); 3156 else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) 3157 sh_css_set_macc_table(params, &stream_params->macc_table); 3158 sh_css_set_gamma_table(params, &stream_params->gc_table); 3159 sh_css_set_ctc_table(params, &stream_params->ctc_table); 3160 sh_css_set_baa_config(params, &stream_params->bds_config); 3161 sh_css_set_dz_config(params, &stream_params->dz_config); 3162 /* ------ deprecated(bz675) : from ------ */ 3163 sh_css_set_shading_settings(params, &stream_params->shading_settings); 3164 /* ------ deprecated(bz675) : to ------ */ 3165 3166 ia_css_set_s3a_config(params, &stream_params->s3a_config); 3167 ia_css_set_wb_config(params, &stream_params->wb_config); 3168 ia_css_set_csc_config(params, &stream_params->cc_config); 3169 ia_css_set_tnr_config(params, &stream_params->tnr_config); 3170 ia_css_set_ob_config(params, &stream_params->ob_config); 3171 ia_css_set_dp_config(params, &stream_params->dp_config); 3172 ia_css_set_de_config(params, &stream_params->de_config); 3173 ia_css_set_gc_config(params, &stream_params->gc_config); 3174 ia_css_set_anr_config(params, &stream_params->anr_config); 3175 ia_css_set_anr2_config(params, &stream_params->anr_thres); 3176 ia_css_set_ce_config(params, &stream_params->ce_config); 3177 ia_css_set_xnr_table_config(params, &stream_params->xnr_table); 3178 ia_css_set_ecd_config(params, &stream_params->ecd_config); 3179 ia_css_set_ynr_config(params, &stream_params->ynr_config); 3180 ia_css_set_fc_config(params, &stream_params->fc_config); 3181 ia_css_set_cnr_config(params, &stream_params->cnr_config); 3182 ia_css_set_macc_config(params, &stream_params->macc_config); 3183 ia_css_set_ctc_config(params, &stream_params->ctc_config); 3184 ia_css_set_aa_config(params, &stream_params->aa_config); 3185 ia_css_set_r_gamma_config(params, &stream_params->r_gamma_table); 3186 ia_css_set_g_gamma_config(params, &stream_params->g_gamma_table); 3187 ia_css_set_b_gamma_config(params, &stream_params->b_gamma_table); 3188 ia_css_set_yuv2rgb_config(params, &stream_params->yuv2rgb_cc_config); 3189 ia_css_set_rgb2yuv_config(params, &stream_params->rgb2yuv_cc_config); 3190 ia_css_set_xnr_config(params, &stream_params->xnr_config); 3191 ia_css_set_formats_config(params, &stream_params->formats_config); 3192 3193 for (i = 0; i < stream->num_pipes; i++) { 3194 if (IA_CSS_SUCCESS == 3195 sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { 3196 /* set the return value as false if both DPC and 3197 * BDS is enabled by the user. But we do not return 3198 * the value immediately to enable internal firmware 3199 * feature testing. */ 3200 #ifndef ISP2401 3201 retval = !is_dp_10bpp; 3202 #else 3203 if (is_dp_10bpp) { 3204 retval = false; 3205 } 3206 } else { 3207 retval = false; 3208 goto exit; 3209 } 3210 if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { 3211 sh_css_set_dp_config(stream->pipes[i], params, 3212 &stream_params->pipe_dp_config[stream->pipes[i]->mode]); 3213 ia_css_set_param_exceptions(stream->pipes[i], params); 3214 #endif 3215 } else { 3216 retval = false; 3217 goto exit; 3218 } 3219 } 3220 3221 #ifndef ISP2401 3222 ia_css_set_param_exceptions(pipe_in, params); 3223 3224 #endif 3225 params->fpn_config.data = stream_params->fpn_config.data; 3226 params->config_changed[IA_CSS_FPN_ID] = 3227 stream_params->config_changed[IA_CSS_FPN_ID]; 3228 params->fpn_config.enabled = stream_params->fpn_config.enabled; 3229 3230 sh_css_set_motion_vector(params, &stream_params->motion_config); 3231 sh_css_set_morph_table(params, stream_params->morph_table); 3232 3233 if (stream_params->sc_table) { 3234 sh_css_update_shading_table_status(pipe_in, params); 3235 sh_css_set_shading_table(stream, params, stream_params->sc_table); 3236 } else { 3237 params->sc_table = NULL; 3238 params->sc_table_changed = true; 3239 params->sc_table_dirty = false; 3240 params->sc_table_last_pipe_num = 0; 3241 } 3242 3243 /* Only IA_CSS_PIPE_ID_VIDEO & IA_CSS_PIPE_ID_CAPTURE will support dvs_6axis_config*/ 3244 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 3245 if (stream_params->pipe_dvs_6axis_config[i]) { 3246 if (params->pipe_dvs_6axis_config[i]) { 3247 copy_dvs_6axis_table(params->pipe_dvs_6axis_config[i], 3248 stream_params->pipe_dvs_6axis_config[i]); 3249 } else { 3250 params->pipe_dvs_6axis_config[i] = 3251 generate_dvs_6axis_table_from_config(stream_params->pipe_dvs_6axis_config[i]); 3252 } 3253 } 3254 } 3255 ia_css_set_sdis_config(params, &stream_params->dvs_coefs); 3256 params->dis_coef_table_changed = stream_params->dis_coef_table_changed; 3257 3258 ia_css_set_sdis2_config(params, &stream_params->dvs2_coefs); 3259 params->dvs2_coef_table_changed = stream_params->dvs2_coef_table_changed; 3260 params->sensor_binning = stream_params->sensor_binning; 3261 } 3262 3263 exit: 3264 return retval; 3265 } 3266 3267 enum ia_css_err 3268 sh_css_params_init(void) { 3269 int i, p; 3270 3271 IA_CSS_ENTER_PRIVATE("void"); 3272 3273 /* TMP: tracking of paramsets */ 3274 g_param_buffer_dequeue_count = 0; 3275 g_param_buffer_enqueue_count = 0; 3276 3277 for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) 3278 { 3279 for (i = 0; i < SH_CSS_MAX_STAGES; i++) { 3280 xmem_sp_stage_ptrs[p][i] = 3281 ia_css_refcount_increment(-1, 3282 mmgr_calloc(1, 3283 sizeof(struct sh_css_sp_stage))); 3284 xmem_isp_stage_ptrs[p][i] = 3285 ia_css_refcount_increment(-1, 3286 mmgr_calloc(1, 3287 sizeof(struct sh_css_isp_stage))); 3288 3289 if ((xmem_sp_stage_ptrs[p][i] == mmgr_NULL) || 3290 (xmem_isp_stage_ptrs[p][i] == mmgr_NULL)) { 3291 sh_css_params_uninit(); 3292 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3293 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3294 } 3295 } 3296 } 3297 3298 ia_css_config_gamma_table(); 3299 ia_css_config_ctc_table(); 3300 ia_css_config_rgb_gamma_tables(); 3301 ia_css_config_xnr_table(); 3302 3303 sp_ddr_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, 3304 CEIL_MUL(sizeof(struct sh_css_ddr_address_map), 3305 HIVE_ISP_DDR_WORD_BYTES))); 3306 xmem_sp_group_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, 3307 sizeof(struct sh_css_sp_group))); 3308 3309 if ((sp_ddr_ptrs == mmgr_NULL) || 3310 (xmem_sp_group_ptrs == mmgr_NULL)) 3311 { 3312 ia_css_uninit(); 3313 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3314 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3315 } 3316 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 3317 return IA_CSS_SUCCESS; 3318 } 3319 3320 static void host_lut_store(const void *lut) 3321 { 3322 unsigned int i; 3323 3324 for (i = 0; i < N_GDC_ID; i++) 3325 gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); 3326 } 3327 3328 /* Note that allocation is in ipu address space. */ 3329 inline hrt_vaddress sh_css_params_alloc_gdc_lut(void) 3330 { 3331 return mmgr_malloc(sizeof(zoom_table)); 3332 } 3333 3334 inline void sh_css_params_free_gdc_lut(hrt_vaddress addr) 3335 { 3336 if (addr != mmgr_NULL) 3337 hmm_free(addr); 3338 } 3339 3340 enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, 3341 const void *lut) 3342 { 3343 enum ia_css_err err = IA_CSS_SUCCESS; 3344 #ifndef ISP2401 3345 bool store = true; 3346 #else 3347 bool stream_started = false; 3348 #endif 3349 IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut); 3350 3351 if (!lut || !pipe) { 3352 err = IA_CSS_ERR_INVALID_ARGUMENTS; 3353 IA_CSS_LEAVE("err=%d", err); 3354 return err; 3355 } 3356 3357 /* If the pipe belongs to a stream and the stream has started, it is not 3358 * safe to store lut to gdc HW. If pipe->stream is NULL, then no stream is 3359 * created with this pipe, so it is safe to do this operation as long as 3360 * ia_css_init() has been called. */ 3361 if (pipe->stream && pipe->stream->started) { 3362 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, 3363 "unable to set scaler lut since stream has started\n"); 3364 #ifndef ISP2401 3365 store = false; 3366 #else 3367 stream_started = true; 3368 #endif 3369 err = IA_CSS_ERR_NOT_SUPPORTED; 3370 } 3371 3372 /* Free any existing tables. */ 3373 sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); 3374 pipe->scaler_pp_lut = mmgr_NULL; 3375 3376 #ifndef ISP2401 3377 if (store) { 3378 pipe->scaler_pp_lut = mmgr_malloc(sizeof(zoom_table)); 3379 #else 3380 if (!stream_started) { 3381 pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); 3382 #endif 3383 if (pipe->scaler_pp_lut == mmgr_NULL) { 3384 #ifndef ISP2401 3385 IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); 3386 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3387 #else 3388 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, 3389 "unable to allocate scaler_pp_lut\n"); 3390 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3391 } else { 3392 gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, 3393 interleaved_lut_temp); 3394 mmgr_store(pipe->scaler_pp_lut, 3395 (int *)interleaved_lut_temp, 3396 sizeof(zoom_table)); 3397 #endif 3398 } 3399 #ifndef ISP2401 3400 3401 gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, 3402 interleaved_lut_temp); 3403 mmgr_store(pipe->scaler_pp_lut, (int *)interleaved_lut_temp, 3404 sizeof(zoom_table)); 3405 #endif 3406 } 3407 3408 IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); 3409 return err; 3410 } 3411 3412 /* if pipe is NULL, returns default lut addr. */ 3413 hrt_vaddress sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe) 3414 { 3415 assert(pipe); 3416 3417 if (pipe->scaler_pp_lut != mmgr_NULL) 3418 return pipe->scaler_pp_lut; 3419 else 3420 return sh_css_params_get_default_gdc_lut(); 3421 } 3422 3423 enum ia_css_err sh_css_params_map_and_store_default_gdc_lut(void) 3424 { 3425 enum ia_css_err err = IA_CSS_SUCCESS; 3426 3427 IA_CSS_ENTER_PRIVATE("void"); 3428 3429 /* Is table already mapped? Nothing to do if it is mapped. */ 3430 if (default_gdc_lut != mmgr_NULL) 3431 return err; 3432 3433 host_lut_store((void *)zoom_table); 3434 3435 #ifndef ISP2401 3436 default_gdc_lut = mmgr_malloc(sizeof(zoom_table)); 3437 #else 3438 default_gdc_lut = sh_css_params_alloc_gdc_lut(); 3439 #endif 3440 if (default_gdc_lut == mmgr_NULL) 3441 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3442 3443 gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])zoom_table, 3444 interleaved_lut_temp); 3445 mmgr_store(default_gdc_lut, (int *)interleaved_lut_temp, 3446 sizeof(zoom_table)); 3447 3448 IA_CSS_LEAVE_PRIVATE("lut(%u) err=%d", default_gdc_lut, err); 3449 return err; 3450 } 3451 3452 void sh_css_params_free_default_gdc_lut(void) 3453 { 3454 IA_CSS_ENTER_PRIVATE("void"); 3455 3456 sh_css_params_free_gdc_lut(default_gdc_lut); 3457 default_gdc_lut = mmgr_NULL; 3458 3459 IA_CSS_LEAVE_PRIVATE("void"); 3460 } 3461 3462 hrt_vaddress sh_css_params_get_default_gdc_lut(void) 3463 { 3464 return default_gdc_lut; 3465 } 3466 3467 static void free_param_set_callback( 3468 hrt_vaddress ptr) 3469 { 3470 IA_CSS_ENTER_PRIVATE("void"); 3471 3472 free_ia_css_isp_parameter_set_info(ptr); 3473 3474 IA_CSS_LEAVE_PRIVATE("void"); 3475 } 3476 3477 static void free_buffer_callback( 3478 hrt_vaddress ptr) 3479 { 3480 IA_CSS_ENTER_PRIVATE("void"); 3481 3482 hmm_free(ptr); 3483 3484 IA_CSS_LEAVE_PRIVATE("void"); 3485 } 3486 3487 void 3488 sh_css_param_clear_param_sets(void) 3489 { 3490 IA_CSS_ENTER_PRIVATE("void"); 3491 3492 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); 3493 3494 IA_CSS_LEAVE_PRIVATE("void"); 3495 } 3496 3497 /* 3498 * MW: we can define hmm_free() to return a NULL 3499 * then you can write ptr = hmm_free(ptr); 3500 */ 3501 #define safe_free(id, x) \ 3502 do { \ 3503 ia_css_refcount_decrement(id, x); \ 3504 (x) = mmgr_NULL; \ 3505 } while (0) 3506 3507 static void free_map(struct sh_css_ddr_address_map *map) 3508 { 3509 unsigned int i; 3510 3511 hrt_vaddress *addrs = (hrt_vaddress *)map; 3512 3513 IA_CSS_ENTER_PRIVATE("void"); 3514 3515 /* free buffers */ 3516 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 3517 sizeof(size_t)); i++) { 3518 if (addrs[i] == mmgr_NULL) 3519 continue; 3520 safe_free(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); 3521 } 3522 3523 IA_CSS_LEAVE_PRIVATE("void"); 3524 } 3525 3526 void 3527 ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) 3528 { 3529 int i; 3530 struct ia_css_isp_parameters *params = stream->isp_params_configs; 3531 struct ia_css_isp_parameters *per_frame_params = 3532 stream->per_frame_isp_params_configs; 3533 3534 IA_CSS_ENTER_PRIVATE("void"); 3535 if (!params) { 3536 IA_CSS_LEAVE_PRIVATE("isp_param_configs is NULL"); 3537 return; 3538 } 3539 3540 /* free existing ddr_ptr maps */ 3541 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 3542 free_map(¶ms->pipe_ddr_ptrs[i]); 3543 if (per_frame_params) 3544 free_map(&per_frame_params->pipe_ddr_ptrs[i]); 3545 /* Free up theDVS table memory blocks before recomputing new table */ 3546 if (params->pipe_dvs_6axis_config[i]) 3547 free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); 3548 if (per_frame_params && per_frame_params->pipe_dvs_6axis_config[i]) 3549 free_dvs_6axis_table(&per_frame_params->pipe_dvs_6axis_config[i]); 3550 } 3551 free_map(¶ms->ddr_ptrs); 3552 if (per_frame_params) 3553 free_map(&per_frame_params->ddr_ptrs); 3554 3555 if (params->fpn_config.data) { 3556 sh_css_free(params->fpn_config.data); 3557 params->fpn_config.data = NULL; 3558 } 3559 3560 /* Free up sc_config (temporal shading table) if it is allocated. */ 3561 if (params->sc_config) { 3562 ia_css_shading_table_free(params->sc_config); 3563 params->sc_config = NULL; 3564 } 3565 if (per_frame_params) { 3566 if (per_frame_params->sc_config) { 3567 ia_css_shading_table_free(per_frame_params->sc_config); 3568 per_frame_params->sc_config = NULL; 3569 } 3570 } 3571 3572 sh_css_free(params); 3573 if (per_frame_params) 3574 sh_css_free(per_frame_params); 3575 stream->isp_params_configs = NULL; 3576 stream->per_frame_isp_params_configs = NULL; 3577 3578 IA_CSS_LEAVE_PRIVATE("void"); 3579 } 3580 3581 void 3582 sh_css_params_uninit(void) 3583 { 3584 unsigned int p, i; 3585 3586 IA_CSS_ENTER_PRIVATE("void"); 3587 3588 ia_css_refcount_decrement(-1, sp_ddr_ptrs); 3589 sp_ddr_ptrs = mmgr_NULL; 3590 ia_css_refcount_decrement(-1, xmem_sp_group_ptrs); 3591 xmem_sp_group_ptrs = mmgr_NULL; 3592 3593 for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) 3594 for (i = 0; i < SH_CSS_MAX_STAGES; i++) { 3595 ia_css_refcount_decrement(-1, xmem_sp_stage_ptrs[p][i]); 3596 xmem_sp_stage_ptrs[p][i] = mmgr_NULL; 3597 ia_css_refcount_decrement(-1, xmem_isp_stage_ptrs[p][i]); 3598 xmem_isp_stage_ptrs[p][i] = mmgr_NULL; 3599 } 3600 3601 /* go through the pools to clear references */ 3602 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); 3603 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_BUFFER, &free_buffer_callback); 3604 ia_css_refcount_clear(-1, &free_buffer_callback); 3605 3606 IA_CSS_LEAVE_PRIVATE("void"); 3607 } 3608 3609 static struct ia_css_host_data * 3610 convert_allocate_morph_plane( 3611 unsigned short *data, 3612 unsigned int width, 3613 unsigned int height, 3614 unsigned int aligned_width) 3615 { 3616 unsigned int i, j, padding, w; 3617 struct ia_css_host_data *me; 3618 unsigned int isp_data_size; 3619 u16 *isp_data_ptr; 3620 3621 IA_CSS_ENTER_PRIVATE("void"); 3622 3623 /* currently we don't have morph table interpolation yet, 3624 * so we allow a wider table to be used. This will be removed 3625 * in the future. */ 3626 if (width > aligned_width) { 3627 padding = 0; 3628 w = aligned_width; 3629 } else { 3630 padding = aligned_width - width; 3631 w = width; 3632 } 3633 isp_data_size = height * (w + padding) * sizeof(uint16_t); 3634 3635 me = ia_css_host_data_allocate((size_t)isp_data_size); 3636 3637 if (!me) { 3638 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3639 return NULL; 3640 } 3641 3642 isp_data_ptr = (uint16_t *)me->address; 3643 3644 memset(isp_data_ptr, 0, (size_t)isp_data_size); 3645 3646 for (i = 0; i < height; i++) { 3647 for (j = 0; j < w; j++) 3648 *isp_data_ptr++ = (uint16_t)data[j]; 3649 isp_data_ptr += padding; 3650 data += width; 3651 } 3652 3653 IA_CSS_LEAVE_PRIVATE("void"); 3654 return me; 3655 } 3656 3657 static enum ia_css_err 3658 store_morph_plane( 3659 unsigned short *data, 3660 unsigned int width, 3661 unsigned int height, 3662 hrt_vaddress dest, 3663 unsigned int aligned_width) { 3664 struct ia_css_host_data *isp_data; 3665 3666 assert(dest != mmgr_NULL); 3667 3668 isp_data = convert_allocate_morph_plane(data, width, height, aligned_width); 3669 if (!isp_data) 3670 { 3671 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3672 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3673 } 3674 ia_css_params_store_ia_css_host_data(dest, isp_data); 3675 3676 ia_css_host_data_free(isp_data); 3677 return IA_CSS_SUCCESS; 3678 } 3679 3680 static void sh_css_update_isp_params_to_ddr( 3681 struct ia_css_isp_parameters *params, 3682 hrt_vaddress ddr_ptr) 3683 { 3684 size_t size = sizeof(params->uds); 3685 3686 IA_CSS_ENTER_PRIVATE("void"); 3687 3688 assert(params); 3689 3690 mmgr_store(ddr_ptr, ¶ms->uds, size); 3691 IA_CSS_LEAVE_PRIVATE("void"); 3692 } 3693 3694 static void sh_css_update_isp_mem_params_to_ddr( 3695 const struct ia_css_binary *binary, 3696 hrt_vaddress ddr_mem_ptr, 3697 size_t size, 3698 enum ia_css_isp_memories mem) 3699 { 3700 const struct ia_css_host_data *params; 3701 3702 IA_CSS_ENTER_PRIVATE("void"); 3703 3704 params = ia_css_isp_param_get_mem_init(&binary->mem_params, 3705 IA_CSS_PARAM_CLASS_PARAM, mem); 3706 mmgr_store(ddr_mem_ptr, params->address, size); 3707 3708 IA_CSS_LEAVE_PRIVATE("void"); 3709 } 3710 3711 void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) 3712 { 3713 unsigned int i; 3714 hrt_vaddress cpy; 3715 enum sh_css_queue_id param_queue_ids[3] = { IA_CSS_PARAMETER_SET_QUEUE_ID, 3716 IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID, 3717 SH_CSS_INVALID_QUEUE_ID 3718 }; 3719 3720 IA_CSS_ENTER_PRIVATE("void"); 3721 3722 if (!sh_css_sp_is_running()) { 3723 IA_CSS_LEAVE_PRIVATE("sp is not running"); 3724 /* SP is not running. The queues are not valid */ 3725 return; 3726 } 3727 3728 for (i = 0; SH_CSS_INVALID_QUEUE_ID != param_queue_ids[i]; i++) { 3729 cpy = (hrt_vaddress)0; 3730 /* clean-up old copy */ 3731 while (ia_css_bufq_dequeue_buffer(param_queue_ids[i], 3732 (uint32_t *)&cpy) == IA_CSS_SUCCESS) { 3733 /* TMP: keep track of dequeued param set count 3734 */ 3735 g_param_buffer_dequeue_count++; 3736 ia_css_bufq_enqueue_psys_event( 3737 IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, 3738 0, 3739 param_queue_ids[i], 3740 0); 3741 3742 IA_CSS_LOG("dequeued param set %x from %d, release ref", cpy, 0); 3743 free_ia_css_isp_parameter_set_info(cpy); 3744 cpy = (hrt_vaddress)0; 3745 } 3746 } 3747 3748 IA_CSS_LEAVE_PRIVATE("void"); 3749 } 3750 3751 static void 3752 process_kernel_parameters(unsigned int pipe_id, 3753 struct ia_css_pipeline_stage *stage, 3754 struct ia_css_isp_parameters *params, 3755 unsigned int isp_pipe_version, 3756 unsigned int raw_bit_depth) 3757 { 3758 unsigned int param_id; 3759 3760 (void)isp_pipe_version; 3761 (void)raw_bit_depth; 3762 3763 sh_css_enable_pipeline(stage->binary); 3764 3765 if (params->config_changed[IA_CSS_OB_ID]) { 3766 ia_css_ob_configure(¶ms->stream_configs.ob, 3767 isp_pipe_version, raw_bit_depth); 3768 } 3769 if (params->config_changed[IA_CSS_S3A_ID]) { 3770 ia_css_s3a_configure(raw_bit_depth); 3771 } 3772 /* Copy stage uds parameters to config, since they can differ per stage. 3773 */ 3774 params->crop_config.crop_pos = params->uds[stage->stage_num].crop_pos; 3775 params->uds_config.crop_pos = params->uds[stage->stage_num].crop_pos; 3776 params->uds_config.uds = params->uds[stage->stage_num].uds; 3777 /* Call parameter process functions for all kernels */ 3778 /* Skip SC, since that is called on a temp sc table */ 3779 for (param_id = 0; param_id < IA_CSS_NUM_PARAMETER_IDS; param_id++) { 3780 if (param_id == IA_CSS_SC_ID) continue; 3781 if (params->config_changed[param_id]) 3782 ia_css_kernel_process_param[param_id](pipe_id, stage, params); 3783 } 3784 } 3785 3786 enum ia_css_err 3787 sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, 3788 struct ia_css_isp_parameters *params, 3789 bool commit, 3790 struct ia_css_pipe *pipe_in) { 3791 enum ia_css_err err = IA_CSS_SUCCESS; 3792 hrt_vaddress cpy; 3793 int i; 3794 unsigned int raw_bit_depth = 10; 3795 unsigned int isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_1; 3796 bool acc_cluster_params_changed = false; 3797 unsigned int thread_id, pipe_num; 3798 3799 (void)acc_cluster_params_changed; 3800 3801 assert(curr_pipe); 3802 3803 IA_CSS_ENTER_PRIVATE("pipe=%p, isp_parameters_id=%d", pipe_in, params->isp_parameters_id); 3804 raw_bit_depth = ia_css_stream_input_format_bits_per_pixel(curr_pipe->stream); 3805 3806 /* now make the map available to the sp */ 3807 if (!commit) 3808 { 3809 IA_CSS_LEAVE_ERR_PRIVATE(err); 3810 return err; 3811 } 3812 /* enqueue a copies of the mem_map to 3813 the designated pipelines */ 3814 for (i = 0; i < curr_pipe->stream->num_pipes; i++) 3815 { 3816 struct ia_css_pipe *pipe; 3817 struct sh_css_ddr_address_map *cur_map; 3818 struct sh_css_ddr_address_map_size *cur_map_size; 3819 struct ia_css_isp_parameter_set_info isp_params_info; 3820 struct ia_css_pipeline *pipeline; 3821 struct ia_css_pipeline_stage *stage; 3822 3823 enum sh_css_queue_id queue_id; 3824 3825 pipe = curr_pipe->stream->pipes[i]; 3826 pipeline = ia_css_pipe_get_pipeline(pipe); 3827 pipe_num = ia_css_pipe_get_pipe_num(pipe); 3828 isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe); 3829 ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); 3830 3831 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3832 ia_css_query_internal_queue_id(params->output_frame 3833 ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET 3834 : IA_CSS_BUFFER_TYPE_PARAMETER_SET, 3835 thread_id, &queue_id); 3836 #else 3837 ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, 3838 &queue_id); 3839 #endif 3840 if (!sh_css_sp_is_running()) { 3841 /* SP is not running. The queues are not valid */ 3842 err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; 3843 break; 3844 } 3845 cur_map = ¶ms->pipe_ddr_ptrs[pipeline->pipe_id]; 3846 cur_map_size = ¶ms->pipe_ddr_ptrs_size[pipeline->pipe_id]; 3847 3848 /* TODO: Normally, zoom and motion parameters shouldn't 3849 * be part of "isp_params" as it is resolution/pipe dependent 3850 * Therefore, move the zoom config elsewhere (e.g. shading 3851 * table can be taken as an example! @GC 3852 * */ 3853 { 3854 /* we have to do this per pipeline because */ 3855 /* the processing is a.o. resolution dependent */ 3856 err = ia_css_process_zoom_and_motion(params, 3857 pipeline->stages); 3858 if (err != IA_CSS_SUCCESS) 3859 return err; 3860 } 3861 /* check if to actually update the parameters for this pipe */ 3862 /* When API change is implemented making good distinction between 3863 * stream config and pipe config this skipping code can be moved out of the #ifdef */ 3864 if (pipe_in && (pipe != pipe_in)) { 3865 IA_CSS_LOG("skipping pipe %p", pipe); 3866 continue; 3867 } 3868 3869 /* BZ 125915, should be moved till after "update other buff" */ 3870 /* update the other buffers to the pipe specific copies */ 3871 for (stage = pipeline->stages; stage; stage = stage->next) { 3872 unsigned int mem; 3873 3874 if (!stage || !stage->binary) 3875 continue; 3876 3877 process_kernel_parameters(pipeline->pipe_id, 3878 stage, params, 3879 isp_pipe_version, raw_bit_depth); 3880 3881 err = sh_css_params_write_to_ddr_internal( 3882 pipe, 3883 pipeline->pipe_id, 3884 params, 3885 stage, 3886 cur_map, 3887 cur_map_size); 3888 3889 if (err != IA_CSS_SUCCESS) 3890 break; 3891 for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { 3892 params->isp_mem_params_changed 3893 [pipeline->pipe_id][stage->stage_num][mem] = false; 3894 } 3895 } /* for */ 3896 if (err != IA_CSS_SUCCESS) 3897 break; 3898 /* update isp_params to pipe specific copies */ 3899 if (params->isp_params_changed) { 3900 reallocate_buffer(&cur_map->isp_param, 3901 &cur_map_size->isp_param, 3902 cur_map_size->isp_param, 3903 true, 3904 &err); 3905 if (err != IA_CSS_SUCCESS) 3906 break; 3907 sh_css_update_isp_params_to_ddr(params, cur_map->isp_param); 3908 } 3909 3910 /* last make referenced copy */ 3911 err = ref_sh_css_ddr_address_map( 3912 cur_map, 3913 &isp_params_info.mem_map); 3914 if (err != IA_CSS_SUCCESS) 3915 break; 3916 3917 /* Update Parameters ID */ 3918 isp_params_info.isp_parameters_id = params->isp_parameters_id; 3919 3920 /* Update output frame pointer */ 3921 isp_params_info.output_frame_ptr = 3922 (params->output_frame) ? params->output_frame->data : mmgr_NULL; 3923 3924 /* now write the copy to ddr */ 3925 err = write_ia_css_isp_parameter_set_info_to_ddr(&isp_params_info, &cpy); 3926 if (err != IA_CSS_SUCCESS) 3927 break; 3928 3929 /* enqueue the set to sp */ 3930 IA_CSS_LOG("queue param set %x to %d", cpy, thread_id); 3931 3932 err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); 3933 if (err != IA_CSS_SUCCESS) { 3934 free_ia_css_isp_parameter_set_info(cpy); 3935 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3936 IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", 3937 isp_params_info.isp_parameters_id, 3938 isp_params_info.output_frame_ptr, 3939 queue_id, thread_id); 3940 #endif 3941 break; 3942 } else { 3943 /* TMP: check discrepancy between nr of enqueued 3944 * parameter sets and dequeued sets 3945 */ 3946 g_param_buffer_enqueue_count++; 3947 assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count + 50); 3948 #ifdef ISP2401 3949 ia_css_save_latest_paramset_ptr(pipe, cpy); 3950 #endif 3951 /* 3952 * Tell the SP which queues are not empty, 3953 * by sending the software event. 3954 */ 3955 if (!sh_css_sp_is_running()) { 3956 /* SP is not running. The queues are not valid */ 3957 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); 3958 return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; 3959 } 3960 ia_css_bufq_enqueue_psys_event( 3961 IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, 3962 (uint8_t)thread_id, 3963 (uint8_t)queue_id, 3964 0); 3965 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3966 IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", 3967 isp_params_info.isp_parameters_id, 3968 isp_params_info.output_frame_ptr, 3969 queue_id, thread_id); 3970 #endif 3971 } 3972 /* clean-up old copy */ 3973 ia_css_dequeue_param_buffers(/*pipe_num*/); 3974 params->pipe_dvs_6axis_config_changed[pipeline->pipe_id] = false; 3975 } /* end for each 'active' pipeline */ 3976 /* clear the changed flags after all params 3977 for all pipelines have been updated */ 3978 params->isp_params_changed = false; 3979 params->sc_table_changed = false; 3980 params->dis_coef_table_changed = false; 3981 params->dvs2_coef_table_changed = false; 3982 params->morph_table_changed = false; 3983 params->dz_config_changed = false; 3984 params->motion_config_changed = false; 3985 /* ------ deprecated(bz675) : from ------ */ 3986 params->shading_settings_changed = false; 3987 /* ------ deprecated(bz675) : to ------ */ 3988 3989 memset(¶ms->config_changed[0], 0, sizeof(params->config_changed)); 3990 3991 IA_CSS_LEAVE_ERR_PRIVATE(err); 3992 return err; 3993 } 3994 3995 static enum ia_css_err 3996 sh_css_params_write_to_ddr_internal( 3997 struct ia_css_pipe *pipe, 3998 unsigned int pipe_id, 3999 struct ia_css_isp_parameters *params, 4000 const struct ia_css_pipeline_stage *stage, 4001 struct sh_css_ddr_address_map *ddr_map, 4002 struct sh_css_ddr_address_map_size *ddr_map_size) { 4003 enum ia_css_err err; 4004 const struct ia_css_binary *binary; 4005 4006 unsigned int stage_num; 4007 unsigned int mem; 4008 bool buff_realloced; 4009 4010 /* struct is > 128 bytes so it should not be on stack (see checkpatch) */ 4011 static struct ia_css_macc_table converted_macc_table; 4012 4013 IA_CSS_ENTER_PRIVATE("void"); 4014 assert(params); 4015 assert(ddr_map); 4016 assert(ddr_map_size); 4017 assert(stage); 4018 4019 binary = stage->binary; 4020 assert(binary); 4021 4022 stage_num = stage->stage_num; 4023 4024 if (binary->info->sp.enable.fpnr) 4025 { 4026 buff_realloced = reallocate_buffer(&ddr_map->fpn_tbl, 4027 &ddr_map_size->fpn_tbl, 4028 (size_t)(FPNTBL_BYTES(binary)), 4029 params->config_changed[IA_CSS_FPN_ID], 4030 &err); 4031 if (err != IA_CSS_SUCCESS) { 4032 IA_CSS_LEAVE_ERR_PRIVATE(err); 4033 return err; 4034 } 4035 if (params->config_changed[IA_CSS_FPN_ID] || buff_realloced) { 4036 if (params->fpn_config.enabled) { 4037 err = store_fpntbl(params, ddr_map->fpn_tbl); 4038 if (err != IA_CSS_SUCCESS) { 4039 IA_CSS_LEAVE_ERR_PRIVATE(err); 4040 return err; 4041 } 4042 } 4043 } 4044 } 4045 4046 if (binary->info->sp.enable.sc) 4047 { 4048 u32 enable_conv = params-> 4049 shading_settings.enable_shading_table_conversion; 4050 4051 buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, 4052 &ddr_map_size->sc_tbl, 4053 (size_t)(SCTBL_BYTES(binary)), 4054 params->sc_table_changed, 4055 &err); 4056 if (err != IA_CSS_SUCCESS) { 4057 IA_CSS_LEAVE_ERR_PRIVATE(err); 4058 return err; 4059 } 4060 4061 if (params->shading_settings_changed || 4062 params->sc_table_changed || buff_realloced) { 4063 if (enable_conv == 0) { 4064 if (params->sc_table) { 4065 /* store the shading table to ddr */ 4066 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_table); 4067 if (err != IA_CSS_SUCCESS) { 4068 IA_CSS_LEAVE_ERR_PRIVATE(err); 4069 return err; 4070 } 4071 /* set sc_config to isp */ 4072 params->sc_config = (struct ia_css_shading_table *)params->sc_table; 4073 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4074 params->sc_config = NULL; 4075 } else { 4076 /* generate the identical shading table */ 4077 if (params->sc_config) { 4078 ia_css_shading_table_free(params->sc_config); 4079 params->sc_config = NULL; 4080 } 4081 sh_css_params_shading_id_table_generate(¶ms->sc_config, 4082 binary->sctbl_width_per_color, 4083 binary->sctbl_height); 4084 if (!params->sc_config) { 4085 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4086 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4087 } 4088 4089 /* store the shading table to ddr */ 4090 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); 4091 if (err != IA_CSS_SUCCESS) { 4092 IA_CSS_LEAVE_ERR_PRIVATE(err); 4093 return err; 4094 } 4095 4096 /* set sc_config to isp */ 4097 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4098 4099 /* free the shading table */ 4100 ia_css_shading_table_free(params->sc_config); 4101 params->sc_config = NULL; 4102 } 4103 } else { /* legacy */ 4104 /* ------ deprecated(bz675) : from ------ */ 4105 /* shading table is full resolution, reduce */ 4106 if (params->sc_config) { 4107 ia_css_shading_table_free(params->sc_config); 4108 params->sc_config = NULL; 4109 } 4110 prepare_shading_table( 4111 (const struct ia_css_shading_table *)params->sc_table, 4112 params->sensor_binning, 4113 ¶ms->sc_config, 4114 binary, pipe->required_bds_factor); 4115 if (!params->sc_config) { 4116 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4117 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4118 } 4119 4120 /* store the shading table to ddr */ 4121 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); 4122 if (err != IA_CSS_SUCCESS) { 4123 IA_CSS_LEAVE_ERR_PRIVATE(err); 4124 return err; 4125 } 4126 4127 /* set sc_config to isp */ 4128 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4129 4130 /* free the shading table */ 4131 ia_css_shading_table_free(params->sc_config); 4132 params->sc_config = NULL; 4133 /* ------ deprecated(bz675) : to ------ */ 4134 } 4135 } 4136 } 4137 #ifdef ISP2401 4138 /* DPC configuration is made pipe specific to allow flexibility in positioning of the 4139 * DPC kernel. The code below sets the pipe specific configuration to 4140 * individual binaries. */ 4141 if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) 4142 { 4143 unsigned int size = 4144 stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; 4145 4146 unsigned int offset = 4147 stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; 4148 4149 if (size) { 4150 ia_css_dp_encode((struct sh_css_isp_dp_params *) 4151 &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], 4152 ¶ms->pipe_dp_config[pipe_id], size); 4153 #endif 4154 4155 #ifdef ISP2401 4156 params->isp_params_changed = true; 4157 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = 4158 true; 4159 } 4160 } 4161 #endif 4162 if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) 4163 { 4164 unsigned int i, j, idx; 4165 unsigned int idx_map[] = { 4166 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 4167 }; 4168 4169 for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { 4170 idx = 4 * idx_map[i]; 4171 j = 4 * i; 4172 4173 if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) { 4174 converted_macc_table.data[idx] = 4175 (int16_t)sDIGIT_FITTING(params->macc_table.data[j], 4176 13, SH_CSS_MACC_COEF_SHIFT); 4177 converted_macc_table.data[idx + 1] = 4178 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 1], 4179 13, SH_CSS_MACC_COEF_SHIFT); 4180 converted_macc_table.data[idx + 2] = 4181 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 2], 4182 13, SH_CSS_MACC_COEF_SHIFT); 4183 converted_macc_table.data[idx + 3] = 4184 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 3], 4185 13, SH_CSS_MACC_COEF_SHIFT); 4186 } else if (binary->info->sp.pipeline.isp_pipe_version == 4187 SH_CSS_ISP_PIPE_VERSION_2_2) { 4188 converted_macc_table.data[idx] = 4189 params->macc_table.data[j]; 4190 converted_macc_table.data[idx + 1] = 4191 params->macc_table.data[j + 1]; 4192 converted_macc_table.data[idx + 2] = 4193 params->macc_table.data[j + 2]; 4194 converted_macc_table.data[idx + 3] = 4195 params->macc_table.data[j + 3]; 4196 } 4197 } 4198 reallocate_buffer(&ddr_map->macc_tbl, 4199 &ddr_map_size->macc_tbl, 4200 ddr_map_size->macc_tbl, 4201 true, 4202 &err); 4203 if (err != IA_CSS_SUCCESS) { 4204 IA_CSS_LEAVE_ERR_PRIVATE(err); 4205 return err; 4206 } 4207 mmgr_store(ddr_map->macc_tbl, 4208 converted_macc_table.data, 4209 sizeof(converted_macc_table.data)); 4210 } 4211 4212 if (binary->info->sp.enable.dvs_6axis) 4213 { 4214 /* because UV is packed into the Y plane, calc total 4215 * YYU size = /2 gives size of UV-only, 4216 * total YYU size = UV-only * 3. 4217 */ 4218 buff_realloced = reallocate_buffer( 4219 &ddr_map->dvs_6axis_params_y, 4220 &ddr_map_size->dvs_6axis_params_y, 4221 (size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3), 4222 params->pipe_dvs_6axis_config_changed[pipe_id], 4223 &err); 4224 if (err != IA_CSS_SUCCESS) { 4225 IA_CSS_LEAVE_ERR_PRIVATE(err); 4226 return err; 4227 } 4228 4229 if (params->pipe_dvs_6axis_config_changed[pipe_id] || buff_realloced) { 4230 const struct ia_css_frame_info *dvs_in_frame_info; 4231 4232 if (stage->args.delay_frames[0]) { 4233 /*When delay frames are present(as in case of video), 4234 they are used for dvs. Configure DVS using those params*/ 4235 dvs_in_frame_info = &stage->args.delay_frames[0]->info; 4236 } else { 4237 /*Otherwise, use input frame to configure DVS*/ 4238 dvs_in_frame_info = &stage->args.in_frame->info; 4239 } 4240 4241 /* Generate default DVS unity table on start up*/ 4242 if (!params->pipe_dvs_6axis_config[pipe_id]) { 4243 #ifndef ISP2401 4244 struct ia_css_resolution dvs_offset; 4245 4246 dvs_offset.width = 4247 #else 4248 struct ia_css_resolution dvs_offset = {0, 0}; 4249 4250 if (binary->dvs_envelope.width || binary->dvs_envelope.height) { 4251 dvs_offset.width = 4252 #endif 4253 (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; 4254 #ifndef ISP2401 4255 dvs_offset.height = 4256 #else 4257 dvs_offset.height = 4258 #endif 4259 (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; 4260 #ifdef ISP2401 4261 } 4262 #endif 4263 4264 params->pipe_dvs_6axis_config[pipe_id] = 4265 generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); 4266 if (!params->pipe_dvs_6axis_config[pipe_id]) { 4267 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4268 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4269 } 4270 params->pipe_dvs_6axis_config_changed[pipe_id] = true; 4271 } 4272 4273 store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], 4274 binary, 4275 dvs_in_frame_info, 4276 ddr_map->dvs_6axis_params_y); 4277 params->isp_params_changed = true; 4278 } 4279 } 4280 4281 if (binary->info->sp.enable.ca_gdc) 4282 { 4283 unsigned int i; 4284 hrt_vaddress *virt_addr_tetra_x[ 4285 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4286 size_t *virt_size_tetra_x[ 4287 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4288 hrt_vaddress *virt_addr_tetra_y[ 4289 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4290 size_t *virt_size_tetra_y[ 4291 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4292 4293 virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; 4294 virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; 4295 virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; 4296 virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; 4297 virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; 4298 virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; 4299 4300 virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; 4301 virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; 4302 virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; 4303 virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; 4304 virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; 4305 virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; 4306 4307 virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; 4308 virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; 4309 virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; 4310 virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; 4311 virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; 4312 virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; 4313 4314 virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; 4315 virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; 4316 virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; 4317 virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; 4318 virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; 4319 virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; 4320 4321 buff_realloced = false; 4322 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 4323 buff_realloced |= 4324 reallocate_buffer(virt_addr_tetra_x[i], 4325 virt_size_tetra_x[i], 4326 (size_t) 4327 (MORPH_PLANE_BYTES(binary)), 4328 params->morph_table_changed, 4329 &err); 4330 if (err != IA_CSS_SUCCESS) { 4331 IA_CSS_LEAVE_ERR_PRIVATE(err); 4332 return err; 4333 } 4334 buff_realloced |= 4335 reallocate_buffer(virt_addr_tetra_y[i], 4336 virt_size_tetra_y[i], 4337 (size_t) 4338 (MORPH_PLANE_BYTES(binary)), 4339 params->morph_table_changed, 4340 &err); 4341 if (err != IA_CSS_SUCCESS) { 4342 IA_CSS_LEAVE_ERR_PRIVATE(err); 4343 return err; 4344 } 4345 } 4346 if (params->morph_table_changed || buff_realloced) { 4347 const struct ia_css_morph_table *table = params->morph_table; 4348 struct ia_css_morph_table *id_table = NULL; 4349 4350 if ((table) && 4351 (table->width < binary->morph_tbl_width || 4352 table->height < binary->morph_tbl_height)) { 4353 table = NULL; 4354 } 4355 if (!table) { 4356 err = sh_css_params_default_morph_table(&id_table, 4357 binary); 4358 if (err != IA_CSS_SUCCESS) { 4359 IA_CSS_LEAVE_ERR_PRIVATE(err); 4360 return err; 4361 } 4362 table = id_table; 4363 } 4364 4365 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 4366 store_morph_plane(table->coordinates_x[i], 4367 table->width, 4368 table->height, 4369 *virt_addr_tetra_x[i], 4370 binary->morph_tbl_aligned_width); 4371 store_morph_plane(table->coordinates_y[i], 4372 table->width, 4373 table->height, 4374 *virt_addr_tetra_y[i], 4375 binary->morph_tbl_aligned_width); 4376 } 4377 if (id_table) 4378 ia_css_morph_table_free(id_table); 4379 } 4380 } 4381 4382 /* After special cases like SC, FPN since they may change parameters */ 4383 for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) 4384 { 4385 const struct ia_css_isp_data *isp_data = 4386 ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, 4387 IA_CSS_PARAM_CLASS_PARAM, mem); 4388 size_t size = isp_data->size; 4389 4390 if (!size) continue; 4391 buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], 4392 &ddr_map_size->isp_mem_param[stage_num][mem], 4393 size, 4394 params->isp_mem_params_changed[pipe_id][stage_num][mem], 4395 &err); 4396 if (err != IA_CSS_SUCCESS) { 4397 IA_CSS_LEAVE_ERR_PRIVATE(err); 4398 return err; 4399 } 4400 if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { 4401 sh_css_update_isp_mem_params_to_ddr(binary, 4402 ddr_map->isp_mem_param[stage_num][mem], 4403 ddr_map_size->isp_mem_param[stage_num][mem], mem); 4404 } 4405 } 4406 4407 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 4408 return IA_CSS_SUCCESS; 4409 } 4410 4411 const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream 4412 *stream) 4413 { 4414 struct ia_css_isp_parameters *params; 4415 4416 IA_CSS_ENTER_LEAVE("void"); 4417 assert(stream); 4418 4419 params = stream->isp_params_configs; 4420 4421 return ¶ms->fpn_config; 4422 } 4423 4424 struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream 4425 *stream) 4426 { 4427 struct ia_css_shading_table *table = NULL; 4428 struct ia_css_isp_parameters *params; 4429 4430 IA_CSS_ENTER("void"); 4431 4432 assert(stream); 4433 4434 params = stream->isp_params_configs; 4435 if (!params) 4436 return NULL; 4437 4438 if (params->shading_settings.enable_shading_table_conversion == 0) { 4439 if (params->sc_table) { 4440 table = (struct ia_css_shading_table *)params->sc_table; 4441 } else { 4442 const struct ia_css_binary *binary 4443 = ia_css_stream_get_shading_correction_binary(stream); 4444 if (binary) { 4445 /* generate the identical shading table */ 4446 if (params->sc_config) { 4447 ia_css_shading_table_free(params->sc_config); 4448 params->sc_config = NULL; 4449 } 4450 sh_css_params_shading_id_table_generate(¶ms->sc_config, 4451 binary->sctbl_width_per_color, 4452 binary->sctbl_height); 4453 table = params->sc_config; 4454 /* The sc_config will be freed in the 4455 * ia_css_stream_isp_parameters_uninit function. */ 4456 } 4457 } 4458 } else { 4459 /* ------ deprecated(bz675) : from ------ */ 4460 const struct ia_css_binary *binary 4461 = ia_css_stream_get_shading_correction_binary(stream); 4462 struct ia_css_pipe *pipe; 4463 4464 /**********************************************************************/ 4465 /* following code is copied from function ia_css_stream_get_shading_correction_binary() 4466 * to match with the binary */ 4467 pipe = stream->pipes[0]; 4468 4469 if (stream->num_pipes == 2) { 4470 assert(stream->pipes[1]); 4471 if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || 4472 stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) 4473 pipe = stream->pipes[1]; 4474 } 4475 /**********************************************************************/ 4476 if (binary) { 4477 if (params->sc_config) { 4478 ia_css_shading_table_free(params->sc_config); 4479 params->sc_config = NULL; 4480 } 4481 prepare_shading_table( 4482 (const struct ia_css_shading_table *)params->sc_table, 4483 params->sensor_binning, 4484 ¶ms->sc_config, 4485 binary, pipe->required_bds_factor); 4486 4487 table = params->sc_config; 4488 /* The sc_config will be freed in the 4489 * ia_css_stream_isp_parameters_uninit function. */ 4490 } 4491 /* ------ deprecated(bz675) : to ------ */ 4492 } 4493 4494 IA_CSS_LEAVE("table=%p", table); 4495 4496 return table; 4497 } 4498 4499 hrt_vaddress sh_css_store_sp_group_to_ddr(void) 4500 { 4501 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4502 mmgr_store(xmem_sp_group_ptrs, 4503 &sh_css_sp_group, 4504 sizeof(struct sh_css_sp_group)); 4505 return xmem_sp_group_ptrs; 4506 } 4507 4508 hrt_vaddress sh_css_store_sp_stage_to_ddr( 4509 unsigned int pipe, 4510 unsigned int stage) 4511 { 4512 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4513 mmgr_store(xmem_sp_stage_ptrs[pipe][stage], 4514 &sh_css_sp_stage, 4515 sizeof(struct sh_css_sp_stage)); 4516 return xmem_sp_stage_ptrs[pipe][stage]; 4517 } 4518 4519 hrt_vaddress sh_css_store_isp_stage_to_ddr( 4520 unsigned int pipe, 4521 unsigned int stage) 4522 { 4523 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4524 mmgr_store(xmem_isp_stage_ptrs[pipe][stage], 4525 &sh_css_isp_stage, 4526 sizeof(struct sh_css_isp_stage)); 4527 return xmem_isp_stage_ptrs[pipe][stage]; 4528 } 4529 4530 static enum ia_css_err ref_sh_css_ddr_address_map( 4531 struct sh_css_ddr_address_map *map, 4532 struct sh_css_ddr_address_map *out) 4533 { 4534 enum ia_css_err err = IA_CSS_SUCCESS; 4535 unsigned int i; 4536 4537 /* we will use a union to copy things; overlaying an array 4538 with the struct; that way adding fields in the struct 4539 will keep things working, and we will not get type errors. 4540 */ 4541 union { 4542 struct sh_css_ddr_address_map *map; 4543 hrt_vaddress *addrs; 4544 } in_addrs, to_addrs; 4545 4546 IA_CSS_ENTER_PRIVATE("void"); 4547 assert(map); 4548 assert(out); 4549 4550 in_addrs.map = map; 4551 to_addrs.map = out; 4552 4553 assert(sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t) == 4554 sizeof(struct sh_css_ddr_address_map) / sizeof(hrt_vaddress)); 4555 4556 /* copy map using size info */ 4557 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 4558 sizeof(size_t)); i++) { 4559 if (in_addrs.addrs[i] == mmgr_NULL) 4560 to_addrs.addrs[i] = mmgr_NULL; 4561 else 4562 to_addrs.addrs[i] = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 4563 in_addrs.addrs[i]); 4564 } 4565 4566 IA_CSS_LEAVE_ERR_PRIVATE(err); 4567 return err; 4568 } 4569 4570 static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( 4571 struct ia_css_isp_parameter_set_info *me, 4572 hrt_vaddress *out) 4573 { 4574 enum ia_css_err err = IA_CSS_SUCCESS; 4575 bool succ; 4576 4577 IA_CSS_ENTER_PRIVATE("void"); 4578 4579 assert(me); 4580 assert(out); 4581 4582 *out = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_SET_POOL, mmgr_malloc( 4583 sizeof(struct ia_css_isp_parameter_set_info))); 4584 succ = (*out != mmgr_NULL); 4585 if (succ) 4586 mmgr_store(*out, 4587 me, sizeof(struct ia_css_isp_parameter_set_info)); 4588 else 4589 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4590 4591 IA_CSS_LEAVE_ERR_PRIVATE(err); 4592 return err; 4593 } 4594 4595 static enum ia_css_err 4596 free_ia_css_isp_parameter_set_info( 4597 hrt_vaddress ptr) { 4598 enum ia_css_err err = IA_CSS_SUCCESS; 4599 struct ia_css_isp_parameter_set_info isp_params_info; 4600 unsigned int i; 4601 hrt_vaddress *addrs = (hrt_vaddress *) &isp_params_info.mem_map; 4602 4603 IA_CSS_ENTER_PRIVATE("ptr = %u", ptr); 4604 4605 /* sanity check - ptr must be valid */ 4606 if (!ia_css_refcount_is_valid(ptr)) 4607 { 4608 IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_SET_POOL(0x%x) invalid arg", __func__, 4609 ptr); 4610 err = IA_CSS_ERR_INVALID_ARGUMENTS; 4611 IA_CSS_LEAVE_ERR_PRIVATE(err); 4612 return err; 4613 } 4614 4615 mmgr_load(ptr, &isp_params_info.mem_map, sizeof(struct sh_css_ddr_address_map)); 4616 /* copy map using size info */ 4617 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 4618 sizeof(size_t)); i++) 4619 { 4620 if (addrs[i] == mmgr_NULL) 4621 continue; 4622 4623 /* sanity check - ptr must be valid */ 4624 #ifndef ISP2401 4625 if (!ia_css_refcount_is_valid(addrs[i])) { 4626 #else 4627 if (ia_css_refcount_is_valid(addrs[i])) { 4628 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); 4629 } else { 4630 #endif 4631 IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, 4632 ptr); 4633 err = IA_CSS_ERR_INVALID_ARGUMENTS; 4634 continue; 4635 } 4636 #ifndef ISP2401 4637 4638 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); 4639 #endif 4640 } 4641 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_SET_POOL, ptr); 4642 4643 IA_CSS_LEAVE_ERR_PRIVATE(err); 4644 return err; 4645 } 4646 4647 /* Mark all parameters as changed to force recomputing the derived ISP parameters */ 4648 void 4649 sh_css_invalidate_params(struct ia_css_stream *stream) 4650 { 4651 struct ia_css_isp_parameters *params; 4652 unsigned int i, j, mem; 4653 4654 IA_CSS_ENTER_PRIVATE("void"); 4655 assert(stream); 4656 4657 params = stream->isp_params_configs; 4658 params->isp_params_changed = true; 4659 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 4660 for (j = 0; j < SH_CSS_MAX_STAGES; j++) { 4661 for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) { 4662 params->isp_mem_params_changed[i][j][mem] = true; 4663 } 4664 } 4665 } 4666 4667 memset(¶ms->config_changed[0], 1, sizeof(params->config_changed)); 4668 params->dis_coef_table_changed = true; 4669 params->dvs2_coef_table_changed = true; 4670 params->morph_table_changed = true; 4671 params->sc_table_changed = true; 4672 params->dz_config_changed = true; 4673 params->motion_config_changed = true; 4674 4675 /*Free up theDVS table memory blocks before recomputing new table */ 4676 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 4677 if (params->pipe_dvs_6axis_config[i]) { 4678 free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); 4679 params->pipe_dvs_6axis_config_changed[i] = true; 4680 } 4681 } 4682 4683 IA_CSS_LEAVE_PRIVATE("void"); 4684 } 4685 4686 void 4687 sh_css_update_uds_and_crop_info( 4688 const struct ia_css_binary_info *info, 4689 const struct ia_css_frame_info *in_frame_info, 4690 const struct ia_css_frame_info *out_frame_info, 4691 const struct ia_css_resolution *dvs_env, 4692 const struct ia_css_dz_config *zoom, 4693 const struct ia_css_vector *motion_vector, 4694 struct sh_css_uds_info *uds, /* out */ 4695 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 4696 4697 bool enable_zoom) 4698 { 4699 IA_CSS_ENTER_PRIVATE("void"); 4700 4701 assert(info); 4702 assert(in_frame_info); 4703 assert(out_frame_info); 4704 assert(dvs_env); 4705 assert(zoom); 4706 assert(motion_vector); 4707 assert(uds); 4708 assert(sp_out_crop_pos); 4709 4710 uds->curr_dx = enable_zoom ? (uint16_t)zoom->dx : HRT_GDC_N; 4711 uds->curr_dy = enable_zoom ? (uint16_t)zoom->dy : HRT_GDC_N; 4712 4713 if (info->enable.dvs_envelope) { 4714 unsigned int crop_x = 0, 4715 crop_y = 0, 4716 uds_xc = 0, 4717 uds_yc = 0, 4718 env_width, env_height; 4719 int half_env_x, half_env_y; 4720 int motion_x = motion_vector->x; 4721 int motion_y = motion_vector->y; 4722 bool upscale_x = in_frame_info->res.width < out_frame_info->res.width; 4723 bool upscale_y = in_frame_info->res.height < out_frame_info->res.height; 4724 4725 if (info->enable.uds && !info->enable.ds) { 4726 /** 4727 * we calculate with the envelope that we can actually 4728 * use, the min dvs envelope is for the filter 4729 * initialization. 4730 */ 4731 env_width = dvs_env->width - 4732 SH_CSS_MIN_DVS_ENVELOPE; 4733 env_height = dvs_env->height - 4734 SH_CSS_MIN_DVS_ENVELOPE; 4735 half_env_x = env_width / 2; 4736 half_env_y = env_height / 2; 4737 /** 4738 * for digital zoom, we use the dvs envelope and make 4739 * sure that we don't include the 8 leftmost pixels or 4740 * 8 topmost rows. 4741 */ 4742 if (upscale_x) { 4743 uds_xc = (in_frame_info->res.width 4744 + env_width 4745 + SH_CSS_MIN_DVS_ENVELOPE) / 2; 4746 } else { 4747 uds_xc = (out_frame_info->res.width 4748 + env_width) / 2 4749 + SH_CSS_MIN_DVS_ENVELOPE; 4750 } 4751 if (upscale_y) { 4752 uds_yc = (in_frame_info->res.height 4753 + env_height 4754 + SH_CSS_MIN_DVS_ENVELOPE) / 2; 4755 } else { 4756 uds_yc = (out_frame_info->res.height 4757 + env_height) / 2 4758 + SH_CSS_MIN_DVS_ENVELOPE; 4759 } 4760 /* clip the motion vector to +/- half the envelope */ 4761 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4762 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4763 uds_xc += motion_x; 4764 uds_yc += motion_y; 4765 /* uds can be pipelined, remove top lines */ 4766 crop_y = 2; 4767 } else if (info->enable.ds) { 4768 env_width = dvs_env->width; 4769 env_height = dvs_env->height; 4770 half_env_x = env_width / 2; 4771 half_env_y = env_height / 2; 4772 /* clip the motion vector to +/- half the envelope */ 4773 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4774 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4775 /* for video with downscaling, the envelope is included 4776 in the input resolution. */ 4777 uds_xc = in_frame_info->res.width / 2 + motion_x; 4778 uds_yc = in_frame_info->res.height / 2 + motion_y; 4779 crop_x = info->pipeline.left_cropping; 4780 /* ds == 2 (yuv_ds) can be pipelined, remove top 4781 lines */ 4782 if (info->enable.ds & 1) 4783 crop_y = info->pipeline.top_cropping; 4784 else 4785 crop_y = 2; 4786 } else { 4787 /* video nodz: here we can only crop. We make sure we 4788 crop at least the first 8x8 pixels away. */ 4789 env_width = dvs_env->width - 4790 SH_CSS_MIN_DVS_ENVELOPE; 4791 env_height = dvs_env->height - 4792 SH_CSS_MIN_DVS_ENVELOPE; 4793 half_env_x = env_width / 2; 4794 half_env_y = env_height / 2; 4795 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4796 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4797 crop_x = SH_CSS_MIN_DVS_ENVELOPE 4798 + half_env_x + motion_x; 4799 crop_y = SH_CSS_MIN_DVS_ENVELOPE 4800 + half_env_y + motion_y; 4801 } 4802 4803 /* Must enforce that the crop position is even */ 4804 crop_x = EVEN_FLOOR(crop_x); 4805 crop_y = EVEN_FLOOR(crop_y); 4806 uds_xc = EVEN_FLOOR(uds_xc); 4807 uds_yc = EVEN_FLOOR(uds_yc); 4808 4809 uds->xc = (uint16_t)uds_xc; 4810 uds->yc = (uint16_t)uds_yc; 4811 sp_out_crop_pos->x = (uint16_t)crop_x; 4812 sp_out_crop_pos->y = (uint16_t)crop_y; 4813 } else { 4814 /* for down scaling, we always use the center of the image */ 4815 uds->xc = (uint16_t)in_frame_info->res.width / 2; 4816 uds->yc = (uint16_t)in_frame_info->res.height / 2; 4817 sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; 4818 sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; 4819 } 4820 IA_CSS_LEAVE_PRIVATE("void"); 4821 } 4822 4823 static enum ia_css_err 4824 sh_css_update_uds_and_crop_info_based_on_zoom_region( 4825 const struct ia_css_binary_info *info, 4826 const struct ia_css_frame_info *in_frame_info, 4827 const struct ia_css_frame_info *out_frame_info, 4828 const struct ia_css_resolution *dvs_env, 4829 const struct ia_css_dz_config *zoom, 4830 const struct ia_css_vector *motion_vector, 4831 struct sh_css_uds_info *uds, /* out */ 4832 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 4833 struct ia_css_resolution pipe_in_res, 4834 bool enable_zoom) { 4835 unsigned int x0 = 0, y0 = 0, x1 = 0, y1 = 0; 4836 enum ia_css_err err = IA_CSS_SUCCESS; 4837 /* Note: 4838 * Filter_Envelope = 0 for NND/LUT 4839 * Filter_Envelope = 1 for BCI 4840 * Filter_Envelope = 3 for BLI 4841 * Currently, not considering this filter envelope because, In uds.sp.c is recalculating 4842 * the dx/dy based on filter envelope and other information (ia_css_uds_sp_scale_params) 4843 * Ideally, That should be done on host side not on sp side. 4844 */ 4845 unsigned int filter_envelope = 0; 4846 4847 IA_CSS_ENTER_PRIVATE("void"); 4848 4849 assert(info); 4850 assert(in_frame_info); 4851 assert(out_frame_info); 4852 assert(dvs_env); 4853 assert(zoom); 4854 assert(motion_vector); 4855 assert(uds); 4856 assert(sp_out_crop_pos); 4857 x0 = zoom->zoom_region.origin.x; 4858 y0 = zoom->zoom_region.origin.y; 4859 x1 = zoom->zoom_region.resolution.width + x0; 4860 y1 = zoom->zoom_region.resolution.height + y0; 4861 4862 if ((x0 > x1) || (y0 > y1) || (x1 > pipe_in_res.width) || (y1 > pipe_in_res.height)) 4863 return IA_CSS_ERR_INVALID_ARGUMENTS; 4864 4865 if (!enable_zoom) 4866 { 4867 uds->curr_dx = HRT_GDC_N; 4868 uds->curr_dy = HRT_GDC_N; 4869 } 4870 4871 if (info->enable.dvs_envelope) 4872 { 4873 /* Zoom region is only supported by the UDS module on ISP 4874 * 2 and higher. It is not supported in video mode on ISP 1 */ 4875 return IA_CSS_ERR_INVALID_ARGUMENTS; 4876 } else 4877 { 4878 if (enable_zoom) { 4879 /* A. Calculate dx/dy based on crop region using in_frame_info 4880 * Scale the crop region if in_frame_info to the stage is not same as 4881 * actual effective input of the pipeline 4882 */ 4883 if (in_frame_info->res.width != pipe_in_res.width || 4884 in_frame_info->res.height != pipe_in_res.height) { 4885 x0 = (x0 * in_frame_info->res.width) / (pipe_in_res.width); 4886 y0 = (y0 * in_frame_info->res.height) / (pipe_in_res.height); 4887 x1 = (x1 * in_frame_info->res.width) / (pipe_in_res.width); 4888 y1 = (y1 * in_frame_info->res.height) / (pipe_in_res.height); 4889 } 4890 uds->curr_dx = 4891 ((x1 - x0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.width; 4892 uds->curr_dy = 4893 ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; 4894 4895 /* B. Calculate xc/yc based on crop region */ 4896 uds->xc = (uint16_t)x0 + (((x1) - (x0)) / 2); 4897 uds->yc = (uint16_t)y0 + (((y1) - (y0)) / 2); 4898 } else { 4899 uds->xc = (uint16_t)in_frame_info->res.width / 2; 4900 uds->yc = (uint16_t)in_frame_info->res.height / 2; 4901 } 4902 4903 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 4904 "uds->curr_dx=%d, uds->xc=%d, uds->yc=%d\n", 4905 uds->curr_dx, uds->xc, uds->yc); 4906 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x0=%d, y0=%d, x1=%d, y1=%d\n", 4907 x0, y0, x1, y1); 4908 sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; 4909 sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; 4910 } 4911 IA_CSS_LEAVE_PRIVATE("void"); 4912 return err; 4913 } 4914 4915 struct ia_css_3a_statistics * 4916 ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) 4917 { 4918 struct ia_css_3a_statistics *me; 4919 int grid_size; 4920 4921 IA_CSS_ENTER("grid=%p", grid); 4922 4923 assert(grid); 4924 4925 me = sh_css_calloc(1, sizeof(*me)); 4926 if (!me) 4927 goto err; 4928 4929 me->grid = *grid; 4930 grid_size = grid->width * grid->height; 4931 me->data = sh_css_malloc(grid_size * sizeof(*me->data)); 4932 if (!me->data) 4933 goto err; 4934 #if !defined(HAS_NO_HMEM) 4935 /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ 4936 me->rgby_data = (struct ia_css_3a_rgby_output *)sh_css_malloc(sizeof_hmem( 4937 HMEM0_ID)); 4938 #else 4939 me->rgby_data = NULL; 4940 #endif 4941 4942 IA_CSS_LEAVE("return=%p", me); 4943 return me; 4944 err: 4945 ia_css_3a_statistics_free(me); 4946 4947 IA_CSS_LEAVE("return=%p", NULL); 4948 return NULL; 4949 } 4950 4951 void 4952 ia_css_3a_statistics_free(struct ia_css_3a_statistics *me) 4953 { 4954 if (me) { 4955 sh_css_free(me->rgby_data); 4956 sh_css_free(me->data); 4957 memset(me, 0, sizeof(struct ia_css_3a_statistics)); 4958 sh_css_free(me); 4959 } 4960 } 4961 4962 struct ia_css_dvs_statistics * 4963 ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) 4964 { 4965 struct ia_css_dvs_statistics *me; 4966 4967 assert(grid); 4968 4969 me = sh_css_calloc(1, sizeof(*me)); 4970 if (!me) 4971 goto err; 4972 4973 me->grid = *grid; 4974 me->hor_proj = sh_css_malloc(grid->height * IA_CSS_DVS_NUM_COEF_TYPES * 4975 sizeof(*me->hor_proj)); 4976 if (!me->hor_proj) 4977 goto err; 4978 4979 me->ver_proj = sh_css_malloc(grid->width * IA_CSS_DVS_NUM_COEF_TYPES * 4980 sizeof(*me->ver_proj)); 4981 if (!me->ver_proj) 4982 goto err; 4983 4984 return me; 4985 err: 4986 ia_css_dvs_statistics_free(me); 4987 return NULL; 4988 } 4989 4990 void 4991 ia_css_dvs_statistics_free(struct ia_css_dvs_statistics *me) 4992 { 4993 if (me) { 4994 sh_css_free(me->hor_proj); 4995 sh_css_free(me->ver_proj); 4996 memset(me, 0, sizeof(struct ia_css_dvs_statistics)); 4997 sh_css_free(me); 4998 } 4999 } 5000 5001 struct ia_css_dvs_coefficients * 5002 ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) 5003 { 5004 struct ia_css_dvs_coefficients *me; 5005 5006 assert(grid); 5007 5008 me = sh_css_calloc(1, sizeof(*me)); 5009 if (!me) 5010 goto err; 5011 5012 me->grid = *grid; 5013 5014 me->hor_coefs = sh_css_malloc(grid->num_hor_coefs * 5015 IA_CSS_DVS_NUM_COEF_TYPES * 5016 sizeof(*me->hor_coefs)); 5017 if (!me->hor_coefs) 5018 goto err; 5019 5020 me->ver_coefs = sh_css_malloc(grid->num_ver_coefs * 5021 IA_CSS_DVS_NUM_COEF_TYPES * 5022 sizeof(*me->ver_coefs)); 5023 if (!me->ver_coefs) 5024 goto err; 5025 5026 return me; 5027 err: 5028 ia_css_dvs_coefficients_free(me); 5029 return NULL; 5030 } 5031 5032 void 5033 ia_css_dvs_coefficients_free(struct ia_css_dvs_coefficients *me) 5034 { 5035 if (me) { 5036 sh_css_free(me->hor_coefs); 5037 sh_css_free(me->ver_coefs); 5038 memset(me, 0, sizeof(struct ia_css_dvs_coefficients)); 5039 sh_css_free(me); 5040 } 5041 } 5042 5043 struct ia_css_dvs2_statistics * 5044 ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) 5045 { 5046 struct ia_css_dvs2_statistics *me; 5047 5048 assert(grid); 5049 5050 me = sh_css_calloc(1, sizeof(*me)); 5051 if (!me) 5052 goto err; 5053 5054 me->grid = *grid; 5055 5056 me->hor_prod.odd_real = sh_css_malloc(grid->aligned_width * 5057 grid->aligned_height * sizeof(*me->hor_prod.odd_real)); 5058 if (!me->hor_prod.odd_real) 5059 goto err; 5060 5061 me->hor_prod.odd_imag = sh_css_malloc(grid->aligned_width * 5062 grid->aligned_height * sizeof(*me->hor_prod.odd_imag)); 5063 if (!me->hor_prod.odd_imag) 5064 goto err; 5065 5066 me->hor_prod.even_real = sh_css_malloc(grid->aligned_width * 5067 grid->aligned_height * sizeof(*me->hor_prod.even_real)); 5068 if (!me->hor_prod.even_real) 5069 goto err; 5070 5071 me->hor_prod.even_imag = sh_css_malloc(grid->aligned_width * 5072 grid->aligned_height * sizeof(*me->hor_prod.even_imag)); 5073 if (!me->hor_prod.even_imag) 5074 goto err; 5075 5076 me->ver_prod.odd_real = sh_css_malloc(grid->aligned_width * 5077 grid->aligned_height * sizeof(*me->ver_prod.odd_real)); 5078 if (!me->ver_prod.odd_real) 5079 goto err; 5080 5081 me->ver_prod.odd_imag = sh_css_malloc(grid->aligned_width * 5082 grid->aligned_height * sizeof(*me->ver_prod.odd_imag)); 5083 if (!me->ver_prod.odd_imag) 5084 goto err; 5085 5086 me->ver_prod.even_real = sh_css_malloc(grid->aligned_width * 5087 grid->aligned_height * sizeof(*me->ver_prod.even_real)); 5088 if (!me->ver_prod.even_real) 5089 goto err; 5090 5091 me->ver_prod.even_imag = sh_css_malloc(grid->aligned_width * 5092 grid->aligned_height * sizeof(*me->ver_prod.even_imag)); 5093 if (!me->ver_prod.even_imag) 5094 goto err; 5095 5096 return me; 5097 err: 5098 ia_css_dvs2_statistics_free(me); 5099 return NULL; 5100 } 5101 5102 void 5103 ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me) 5104 { 5105 if (me) { 5106 sh_css_free(me->hor_prod.odd_real); 5107 sh_css_free(me->hor_prod.odd_imag); 5108 sh_css_free(me->hor_prod.even_real); 5109 sh_css_free(me->hor_prod.even_imag); 5110 sh_css_free(me->ver_prod.odd_real); 5111 sh_css_free(me->ver_prod.odd_imag); 5112 sh_css_free(me->ver_prod.even_real); 5113 sh_css_free(me->ver_prod.even_imag); 5114 memset(me, 0, sizeof(struct ia_css_dvs2_statistics)); 5115 sh_css_free(me); 5116 } 5117 } 5118 5119 struct ia_css_dvs2_coefficients * 5120 ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) 5121 { 5122 struct ia_css_dvs2_coefficients *me; 5123 5124 assert(grid); 5125 5126 me = sh_css_calloc(1, sizeof(*me)); 5127 if (!me) 5128 goto err; 5129 5130 me->grid = *grid; 5131 5132 me->hor_coefs.odd_real = sh_css_malloc(grid->num_hor_coefs * 5133 sizeof(*me->hor_coefs.odd_real)); 5134 if (!me->hor_coefs.odd_real) 5135 goto err; 5136 5137 me->hor_coefs.odd_imag = sh_css_malloc(grid->num_hor_coefs * 5138 sizeof(*me->hor_coefs.odd_imag)); 5139 if (!me->hor_coefs.odd_imag) 5140 goto err; 5141 5142 me->hor_coefs.even_real = sh_css_malloc(grid->num_hor_coefs * 5143 sizeof(*me->hor_coefs.even_real)); 5144 if (!me->hor_coefs.even_real) 5145 goto err; 5146 5147 me->hor_coefs.even_imag = sh_css_malloc(grid->num_hor_coefs * 5148 sizeof(*me->hor_coefs.even_imag)); 5149 if (!me->hor_coefs.even_imag) 5150 goto err; 5151 5152 me->ver_coefs.odd_real = sh_css_malloc(grid->num_ver_coefs * 5153 sizeof(*me->ver_coefs.odd_real)); 5154 if (!me->ver_coefs.odd_real) 5155 goto err; 5156 5157 me->ver_coefs.odd_imag = sh_css_malloc(grid->num_ver_coefs * 5158 sizeof(*me->ver_coefs.odd_imag)); 5159 if (!me->ver_coefs.odd_imag) 5160 goto err; 5161 5162 me->ver_coefs.even_real = sh_css_malloc(grid->num_ver_coefs * 5163 sizeof(*me->ver_coefs.even_real)); 5164 if (!me->ver_coefs.even_real) 5165 goto err; 5166 5167 me->ver_coefs.even_imag = sh_css_malloc(grid->num_ver_coefs * 5168 sizeof(*me->ver_coefs.even_imag)); 5169 if (!me->ver_coefs.even_imag) 5170 goto err; 5171 5172 return me; 5173 err: 5174 ia_css_dvs2_coefficients_free(me); 5175 return NULL; 5176 } 5177 5178 void 5179 ia_css_dvs2_coefficients_free(struct ia_css_dvs2_coefficients *me) 5180 { 5181 if (me) { 5182 sh_css_free(me->hor_coefs.odd_real); 5183 sh_css_free(me->hor_coefs.odd_imag); 5184 sh_css_free(me->hor_coefs.even_real); 5185 sh_css_free(me->hor_coefs.even_imag); 5186 sh_css_free(me->ver_coefs.odd_real); 5187 sh_css_free(me->ver_coefs.odd_imag); 5188 sh_css_free(me->ver_coefs.even_real); 5189 sh_css_free(me->ver_coefs.even_imag); 5190 memset(me, 0, sizeof(struct ia_css_dvs2_coefficients)); 5191 sh_css_free(me); 5192 } 5193 } 5194 5195 struct ia_css_dvs_6axis_config * 5196 ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream) 5197 { 5198 struct ia_css_dvs_6axis_config *dvs_config = NULL; 5199 struct ia_css_isp_parameters *params = NULL; 5200 unsigned int width_y; 5201 unsigned int height_y; 5202 unsigned int width_uv; 5203 unsigned int height_uv; 5204 5205 assert(stream); 5206 params = stream->isp_params_configs; 5207 5208 /* Backward compatibility by default consider pipe as Video*/ 5209 if (!params || (params && 5210 !params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO])) { 5211 goto err; 5212 } 5213 5214 dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_calloc(1, 5215 sizeof(struct ia_css_dvs_6axis_config)); 5216 if (!dvs_config) 5217 goto err; 5218 5219 dvs_config->width_y = width_y = 5220 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_y; 5221 dvs_config->height_y = height_y = 5222 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_y; 5223 dvs_config->width_uv = width_uv = 5224 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_uv; 5225 dvs_config->height_uv = height_uv = 5226 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_uv; 5227 IA_CSS_LOG("table Y: W %d H %d", width_y, height_y); 5228 IA_CSS_LOG("table UV: W %d H %d", width_uv, height_uv); 5229 dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( 5230 uint32_t)); 5231 if (!dvs_config->xcoords_y) 5232 goto err; 5233 5234 dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( 5235 uint32_t)); 5236 if (!dvs_config->ycoords_y) 5237 goto err; 5238 5239 dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * 5240 sizeof(uint32_t)); 5241 if (!dvs_config->xcoords_uv) 5242 goto err; 5243 5244 dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * 5245 sizeof(uint32_t)); 5246 if (!dvs_config->ycoords_uv) 5247 goto err; 5248 5249 return dvs_config; 5250 err: 5251 ia_css_dvs2_6axis_config_free(dvs_config); 5252 return NULL; 5253 } 5254 5255 void 5256 ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config) 5257 { 5258 if (dvs_6axis_config) { 5259 sh_css_free(dvs_6axis_config->xcoords_y); 5260 sh_css_free(dvs_6axis_config->ycoords_y); 5261 sh_css_free(dvs_6axis_config->xcoords_uv); 5262 sh_css_free(dvs_6axis_config->ycoords_uv); 5263 memset(dvs_6axis_config, 0, sizeof(struct ia_css_dvs_6axis_config)); 5264 sh_css_free(dvs_6axis_config); 5265 } 5266 } 5267 5268 void 5269 ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) 5270 { 5271 struct ia_css_pipe *pipe; 5272 struct ia_css_pipeline *pipeline; 5273 struct ia_css_pipeline_stage *stage; 5274 enum ia_css_pipe_id pipe_id; 5275 enum ia_css_err err; 5276 int i; 5277 5278 if (!stream) 5279 return; 5280 5281 for (i = 0; i < stream->num_pipes; i++) { 5282 pipe = stream->pipes[i]; 5283 pipeline = ia_css_pipe_get_pipeline(pipe); 5284 pipe_id = pipeline->pipe_id; 5285 5286 if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) { 5287 err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, 5288 &stage); 5289 if (err == IA_CSS_SUCCESS) 5290 stage->enable_zoom = enable; 5291 break; 5292 } 5293 } 5294 } 5295