1 /* 2 * Support for Intel Camera Imaging ISP subsystem. 3 * Copyright (c) 2015, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #include "gdc_device.h" /* gdc_lut_store(), ... */ 16 #include "isp.h" /* ISP_VEC_ELEMBITS */ 17 #include "vamem.h" 18 #if !defined(HAS_NO_HMEM) 19 #ifndef __INLINE_HMEM__ 20 #define __INLINE_HMEM__ 21 #endif 22 #include "hmem.h" 23 #endif /* !defined(HAS_NO_HMEM) */ 24 #define IA_CSS_INCLUDE_PARAMETERS 25 #define IA_CSS_INCLUDE_ACC_PARAMETERS 26 27 #include "sh_css_params.h" 28 #include "ia_css_queue.h" 29 #include "sw_event_global.h" /* Event IDs */ 30 31 #include "platform_support.h" 32 #include "assert_support.h" 33 #include "misc_support.h" /* NOT_USED */ 34 #include "math_support.h" /* max(), min() EVEN_FLOOR()*/ 35 36 #include "ia_css_stream.h" 37 #include "sh_css_params_internal.h" 38 #include "sh_css_param_shading.h" 39 #include "sh_css_param_dvs.h" 40 #include "ia_css_refcount.h" 41 #include "sh_css_internal.h" 42 #include "ia_css_control.h" 43 #include "ia_css_shading.h" 44 #include "sh_css_defs.h" 45 #include "sh_css_sp.h" 46 #include "ia_css_pipeline.h" 47 #include "ia_css_debug.h" 48 #include "memory_access.h" 49 50 #include "ia_css_isp_param.h" 51 #include "ia_css_isp_params.h" 52 #include "ia_css_mipi.h" 53 #include "ia_css_morph.h" 54 #include "ia_css_host_data.h" 55 #include "ia_css_pipe.h" 56 #include "ia_css_pipe_binarydesc.h" 57 #if 0 58 #include "ia_css_system_ctrl.h" 59 #endif 60 61 /* Include all kernel host interfaces for ISP1 */ 62 63 #include "anr/anr_1.0/ia_css_anr.host.h" 64 #include "cnr/cnr_1.0/ia_css_cnr.host.h" 65 #include "csc/csc_1.0/ia_css_csc.host.h" 66 #include "de/de_1.0/ia_css_de.host.h" 67 #include "dp/dp_1.0/ia_css_dp.host.h" 68 #include "bnr/bnr_1.0/ia_css_bnr.host.h" 69 #include "dvs/dvs_1.0/ia_css_dvs.host.h" 70 #include "fpn/fpn_1.0/ia_css_fpn.host.h" 71 #include "gc/gc_1.0/ia_css_gc.host.h" 72 #include "macc/macc_1.0/ia_css_macc.host.h" 73 #include "ctc/ctc_1.0/ia_css_ctc.host.h" 74 #include "ob/ob_1.0/ia_css_ob.host.h" 75 #include "raw/raw_1.0/ia_css_raw.host.h" 76 #include "fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" 77 #include "s3a/s3a_1.0/ia_css_s3a.host.h" 78 #include "sc/sc_1.0/ia_css_sc.host.h" 79 #include "sdis/sdis_1.0/ia_css_sdis.host.h" 80 #include "tnr/tnr_1.0/ia_css_tnr.host.h" 81 #include "uds/uds_1.0/ia_css_uds_param.h" 82 #include "wb/wb_1.0/ia_css_wb.host.h" 83 #include "ynr/ynr_1.0/ia_css_ynr.host.h" 84 #include "xnr/xnr_1.0/ia_css_xnr.host.h" 85 86 /* Include additional kernel host interfaces for ISP2 */ 87 88 #include "aa/aa_2/ia_css_aa2.host.h" 89 #include "anr/anr_2/ia_css_anr2.host.h" 90 #include "bh/bh_2/ia_css_bh.host.h" 91 #include "cnr/cnr_2/ia_css_cnr2.host.h" 92 #include "ctc/ctc1_5/ia_css_ctc1_5.host.h" 93 #include "de/de_2/ia_css_de2.host.h" 94 #include "gc/gc_2/ia_css_gc2.host.h" 95 #include "sdis/sdis_2/ia_css_sdis2.host.h" 96 #include "ynr/ynr_2/ia_css_ynr2.host.h" 97 #include "fc/fc_1.0/ia_css_formats.host.h" 98 99 #include "xnr/xnr_3.0/ia_css_xnr3.host.h" 100 101 #if defined(HAS_OUTPUT_SYSTEM) 102 #include <components/output_system/sc_output_system_1.0/host/output_system.host.h> 103 #endif 104 105 #include "sh_css_frac.h" 106 #include "ia_css_bufq.h" 107 108 #define FPNTBL_BYTES(binary) \ 109 (sizeof(char) * (binary)->in_frame_info.res.height * \ 110 (binary)->in_frame_info.padded_width) 111 112 #define ISP2400_SCTBL_BYTES(binary) \ 113 (sizeof(unsigned short) * (binary)->sctbl_height * \ 114 (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) 115 116 #define ISP2401_SCTBL_BYTES(binary) \ 117 (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ 118 /* height should be the larger height between new api and legacy api */ \ 119 (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) 120 121 #define MORPH_PLANE_BYTES(binary) \ 122 (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ 123 (binary)->morph_tbl_height) 124 125 /* We keep a second copy of the ptr struct for the SP to access. 126 Again, this would not be necessary on the chip. */ 127 static ia_css_ptr sp_ddr_ptrs; 128 129 /* sp group address on DDR */ 130 static ia_css_ptr xmem_sp_group_ptrs; 131 132 static ia_css_ptr xmem_sp_stage_ptrs[IA_CSS_PIPE_ID_NUM] 133 [SH_CSS_MAX_STAGES]; 134 static ia_css_ptr xmem_isp_stage_ptrs[IA_CSS_PIPE_ID_NUM] 135 [SH_CSS_MAX_STAGES]; 136 137 static ia_css_ptr default_gdc_lut; 138 static int interleaved_lut_temp[4][HRT_GDC_N]; 139 140 /* END DO NOT MOVE INTO VIMALS_WORLD */ 141 142 /* Digital Zoom lookup table. See documentation for more details about the 143 * contents of this table. 144 */ 145 #if defined(HAS_GDC_VERSION_2) 146 #if defined(CONFIG_CSI2_PLUS) 147 /* 148 * Coefficients from 149 * Css_Mizuchi/regressions/20140424_0930/all/applications/common/gdc_v2_common/lut.h 150 */ 151 152 static const int zoom_table[4][HRT_GDC_N] = { 153 { 154 0, 0, 0, 0, 0, 0, 0, 0, 155 0, 0, 0, 0, 0, 0, 0, 0, 156 0, 0, 0, 0, 0, 0, 0, -1, 157 -1, -1, -1, -1, -1, -1, -1, -1, 158 -1, -2, -2, -2, -2, -2, -2, -2, 159 -3, -3, -3, -3, -3, -3, -3, -4, 160 -4, -4, -4, -4, -5, -5, -5, -5, 161 -5, -5, -6, -6, -6, -6, -7, -7, 162 -7, -7, -7, -8, -8, -8, -8, -9, 163 -9, -9, -9, -10, -10, -10, -10, -11, 164 -11, -11, -12, -12, -12, -12, -13, -13, 165 -13, -14, -14, -14, -15, -15, -15, -15, 166 -16, -16, -16, -17, -17, -17, -18, -18, 167 -18, -19, -19, -20, -20, -20, -21, -21, 168 -21, -22, -22, -22, -23, -23, -24, -24, 169 -24, -25, -25, -25, -26, -26, -27, -27, 170 -28, -28, -28, -29, -29, -30, -30, -30, 171 -31, -31, -32, -32, -33, -33, -33, -34, 172 -34, -35, -35, -36, -36, -37, -37, -37, 173 -38, -38, -39, -39, -40, -40, -41, -41, 174 -42, -42, -43, -43, -44, -44, -45, -45, 175 -46, -46, -47, -47, -48, -48, -49, -49, 176 -50, -50, -51, -51, -52, -52, -53, -53, 177 -54, -54, -55, -55, -56, -56, -57, -57, 178 -58, -59, -59, -60, -60, -61, -61, -62, 179 -62, -63, -63, -64, -65, -65, -66, -66, 180 -67, -67, -68, -69, -69, -70, -70, -71, 181 -71, -72, -73, -73, -74, -74, -75, -75, 182 -76, -77, -77, -78, -78, -79, -80, -80, 183 -81, -81, -82, -83, -83, -84, -84, -85, 184 -86, -86, -87, -87, -88, -89, -89, -90, 185 -91, -91, -92, -92, -93, -94, -94, -95, 186 -96, -96, -97, -97, -98, -99, -99, -100, 187 -101, -101, -102, -102, -103, -104, -104, -105, 188 -106, -106, -107, -108, -108, -109, -109, -110, 189 -111, -111, -112, -113, -113, -114, -115, -115, 190 -116, -117, -117, -118, -119, -119, -120, -121, 191 -121, -122, -122, -123, -124, -124, -125, -126, 192 -126, -127, -128, -128, -129, -130, -130, -131, 193 -132, -132, -133, -134, -134, -135, -136, -136, 194 -137, -138, -138, -139, -140, -140, -141, -142, 195 -142, -143, -144, -144, -145, -146, -146, -147, 196 -148, -148, -149, -150, -150, -151, -152, -152, 197 -153, -154, -154, -155, -156, -156, -157, -158, 198 -158, -159, -160, -160, -161, -162, -162, -163, 199 -164, -164, -165, -166, -166, -167, -168, -168, 200 -169, -170, -170, -171, -172, -172, -173, -174, 201 -174, -175, -176, -176, -177, -178, -178, -179, 202 -180, -180, -181, -181, -182, -183, -183, -184, 203 -185, -185, -186, -187, -187, -188, -189, -189, 204 -190, -191, -191, -192, -193, -193, -194, -194, 205 -195, -196, -196, -197, -198, -198, -199, -200, 206 -200, -201, -201, -202, -203, -203, -204, -205, 207 -205, -206, -206, -207, -208, -208, -209, -210, 208 -210, -211, -211, -212, -213, -213, -214, -215, 209 -215, -216, -216, -217, -218, -218, -219, -219, 210 -220, -221, -221, -222, -222, -223, -224, -224, 211 -225, -225, -226, -227, -227, -228, -228, -229, 212 -229, -230, -231, -231, -232, -232, -233, -233, 213 -234, -235, -235, -236, -236, -237, -237, -238, 214 -239, -239, -240, -240, -241, -241, -242, -242, 215 -243, -244, -244, -245, -245, -246, -246, -247, 216 -247, -248, -248, -249, -249, -250, -250, -251, 217 -251, -252, -252, -253, -253, -254, -254, -255, 218 -256, -256, -256, -257, -257, -258, -258, -259, 219 -259, -260, -260, -261, -261, -262, -262, -263, 220 -263, -264, -264, -265, -265, -266, -266, -266, 221 -267, -267, -268, -268, -269, -269, -270, -270, 222 -270, -271, -271, -272, -272, -273, -273, -273, 223 -274, -274, -275, -275, -275, -276, -276, -277, 224 -277, -277, -278, -278, -279, -279, -279, -280, 225 -280, -280, -281, -281, -282, -282, -282, -283, 226 -283, -283, -284, -284, -284, -285, -285, -285, 227 -286, -286, -286, -287, -287, -287, -288, -288, 228 -288, -289, -289, -289, -289, -290, -290, -290, 229 -291, -291, -291, -291, -292, -292, -292, -293, 230 -293, -293, -293, -294, -294, -294, -294, -295, 231 -295, -295, -295, -295, -296, -296, -296, -296, 232 -297, -297, -297, -297, -297, -298, -298, -298, 233 -298, -298, -299, -299, -299, -299, -299, -299, 234 -300, -300, -300, -300, -300, -300, -300, -301, 235 -301, -301, -301, -301, -301, -301, -301, -301, 236 -302, -302, -302, -302, -302, -302, -302, -302, 237 -302, -302, -302, -302, -302, -303, -303, -303, 238 -303, -303, -303, -303, -303, -303, -303, -303, 239 -303, -303, -303, -303, -303, -303, -303, -303, 240 -303, -303, -303, -303, -303, -303, -303, -303, 241 -303, -303, -302, -302, -302, -302, -302, -302, 242 -302, -302, -302, -302, -302, -302, -301, -301, 243 -301, -301, -301, -301, -301, -301, -300, -300, 244 -300, -300, -300, -300, -299, -299, -299, -299, 245 -299, -299, -298, -298, -298, -298, -298, -297, 246 -297, -297, -297, -296, -296, -296, -296, -295, 247 -295, -295, -295, -294, -294, -294, -293, -293, 248 -293, -293, -292, -292, -292, -291, -291, -291, 249 -290, -290, -290, -289, -289, -289, -288, -288, 250 -288, -287, -287, -286, -286, -286, -285, -285, 251 -284, -284, -284, -283, -283, -282, -282, -281, 252 -281, -280, -280, -279, -279, -279, -278, -278, 253 -277, -277, -276, -276, -275, -275, -274, -273, 254 -273, -272, -272, -271, -271, -270, -270, -269, 255 -268, -268, -267, -267, -266, -266, -265, -264, 256 -264, -263, -262, -262, -261, -260, -260, -259, 257 -259, -258, -257, -256, -256, -255, -254, -254, 258 -253, -252, -252, -251, -250, -249, -249, -248, 259 -247, -246, -246, -245, -244, -243, -242, -242, 260 -241, -240, -239, -238, -238, -237, -236, -235, 261 -234, -233, -233, -232, -231, -230, -229, -228, 262 -227, -226, -226, -225, -224, -223, -222, -221, 263 -220, -219, -218, -217, -216, -215, -214, -213, 264 -212, -211, -210, -209, -208, -207, -206, -205, 265 -204, -203, -202, -201, -200, -199, -198, -197, 266 -196, -194, -193, -192, -191, -190, -189, -188, 267 -187, -185, -184, -183, -182, -181, -180, -178, 268 -177, -176, -175, -174, -172, -171, -170, -169, 269 -167, -166, -165, -164, -162, -161, -160, -158, 270 -157, -156, -155, -153, -152, -151, -149, -148, 271 -147, -145, -144, -142, -141, -140, -138, -137, 272 -135, -134, -133, -131, -130, -128, -127, -125, 273 -124, -122, -121, -120, -118, -117, -115, -114, 274 -112, -110, -109, -107, -106, -104, -103, -101, 275 -100, -98, -96, -95, -93, -92, -90, -88, 276 -87, -85, -83, -82, -80, -78, -77, -75, 277 -73, -72, -70, -68, -67, -65, -63, -61, 278 -60, -58, -56, -54, -52, -51, -49, -47, 279 -45, -43, -42, -40, -38, -36, -34, -32, 280 -31, -29, -27, -25, -23, -21, -19, -17, 281 -15, -13, -11, -9, -7, -5, -3, -1 282 }, 283 { 284 0, 2, 4, 6, 8, 10, 12, 14, 285 16, 18, 20, 22, 25, 27, 29, 31, 286 33, 36, 38, 40, 43, 45, 47, 50, 287 52, 54, 57, 59, 61, 64, 66, 69, 288 71, 74, 76, 79, 81, 84, 86, 89, 289 92, 94, 97, 99, 102, 105, 107, 110, 290 113, 116, 118, 121, 124, 127, 129, 132, 291 135, 138, 141, 144, 146, 149, 152, 155, 292 158, 161, 164, 167, 170, 173, 176, 179, 293 182, 185, 188, 191, 194, 197, 200, 203, 294 207, 210, 213, 216, 219, 222, 226, 229, 295 232, 235, 239, 242, 245, 248, 252, 255, 296 258, 262, 265, 269, 272, 275, 279, 282, 297 286, 289, 292, 296, 299, 303, 306, 310, 298 313, 317, 321, 324, 328, 331, 335, 338, 299 342, 346, 349, 353, 357, 360, 364, 368, 300 372, 375, 379, 383, 386, 390, 394, 398, 301 402, 405, 409, 413, 417, 421, 425, 429, 302 432, 436, 440, 444, 448, 452, 456, 460, 303 464, 468, 472, 476, 480, 484, 488, 492, 304 496, 500, 504, 508, 512, 516, 521, 525, 305 529, 533, 537, 541, 546, 550, 554, 558, 306 562, 567, 571, 575, 579, 584, 588, 592, 307 596, 601, 605, 609, 614, 618, 622, 627, 308 631, 635, 640, 644, 649, 653, 657, 662, 309 666, 671, 675, 680, 684, 689, 693, 698, 310 702, 707, 711, 716, 720, 725, 729, 734, 311 738, 743, 747, 752, 757, 761, 766, 771, 312 775, 780, 784, 789, 794, 798, 803, 808, 313 813, 817, 822, 827, 831, 836, 841, 846, 314 850, 855, 860, 865, 870, 874, 879, 884, 315 889, 894, 898, 903, 908, 913, 918, 923, 316 928, 932, 937, 942, 947, 952, 957, 962, 317 967, 972, 977, 982, 986, 991, 996, 1001, 318 1006, 1011, 1016, 1021, 1026, 1031, 1036, 1041, 319 1046, 1051, 1056, 1062, 1067, 1072, 1077, 1082, 320 1087, 1092, 1097, 1102, 1107, 1112, 1117, 1122, 321 1128, 1133, 1138, 1143, 1148, 1153, 1158, 1164, 322 1169, 1174, 1179, 1184, 1189, 1195, 1200, 1205, 323 1210, 1215, 1221, 1226, 1231, 1236, 1242, 1247, 324 1252, 1257, 1262, 1268, 1273, 1278, 1284, 1289, 325 1294, 1299, 1305, 1310, 1315, 1321, 1326, 1331, 326 1336, 1342, 1347, 1352, 1358, 1363, 1368, 1374, 327 1379, 1384, 1390, 1395, 1400, 1406, 1411, 1417, 328 1422, 1427, 1433, 1438, 1443, 1449, 1454, 1460, 329 1465, 1470, 1476, 1481, 1487, 1492, 1497, 1503, 330 1508, 1514, 1519, 1525, 1530, 1535, 1541, 1546, 331 1552, 1557, 1563, 1568, 1574, 1579, 1585, 1590, 332 1596, 1601, 1606, 1612, 1617, 1623, 1628, 1634, 333 1639, 1645, 1650, 1656, 1661, 1667, 1672, 1678, 334 1683, 1689, 1694, 1700, 1705, 1711, 1716, 1722, 335 1727, 1733, 1738, 1744, 1749, 1755, 1761, 1766, 336 1772, 1777, 1783, 1788, 1794, 1799, 1805, 1810, 337 1816, 1821, 1827, 1832, 1838, 1844, 1849, 1855, 338 1860, 1866, 1871, 1877, 1882, 1888, 1893, 1899, 339 1905, 1910, 1916, 1921, 1927, 1932, 1938, 1943, 340 1949, 1955, 1960, 1966, 1971, 1977, 1982, 1988, 341 1993, 1999, 2005, 2010, 2016, 2021, 2027, 2032, 342 2038, 2043, 2049, 2055, 2060, 2066, 2071, 2077, 343 2082, 2088, 2093, 2099, 2105, 2110, 2116, 2121, 344 2127, 2132, 2138, 2143, 2149, 2154, 2160, 2165, 345 2171, 2177, 2182, 2188, 2193, 2199, 2204, 2210, 346 2215, 2221, 2226, 2232, 2237, 2243, 2248, 2254, 347 2259, 2265, 2270, 2276, 2281, 2287, 2292, 2298, 348 2304, 2309, 2314, 2320, 2325, 2331, 2336, 2342, 349 2347, 2353, 2358, 2364, 2369, 2375, 2380, 2386, 350 2391, 2397, 2402, 2408, 2413, 2419, 2424, 2429, 351 2435, 2440, 2446, 2451, 2457, 2462, 2467, 2473, 352 2478, 2484, 2489, 2495, 2500, 2505, 2511, 2516, 353 2522, 2527, 2532, 2538, 2543, 2549, 2554, 2559, 354 2565, 2570, 2575, 2581, 2586, 2591, 2597, 2602, 355 2607, 2613, 2618, 2623, 2629, 2634, 2639, 2645, 356 2650, 2655, 2661, 2666, 2671, 2676, 2682, 2687, 357 2692, 2698, 2703, 2708, 2713, 2719, 2724, 2729, 358 2734, 2740, 2745, 2750, 2755, 2760, 2766, 2771, 359 2776, 2781, 2786, 2792, 2797, 2802, 2807, 2812, 360 2817, 2823, 2828, 2833, 2838, 2843, 2848, 2853, 361 2859, 2864, 2869, 2874, 2879, 2884, 2889, 2894, 362 2899, 2904, 2909, 2914, 2919, 2924, 2930, 2935, 363 2940, 2945, 2950, 2955, 2960, 2965, 2970, 2975, 364 2980, 2984, 2989, 2994, 2999, 3004, 3009, 3014, 365 3019, 3024, 3029, 3034, 3039, 3044, 3048, 3053, 366 3058, 3063, 3068, 3073, 3078, 3082, 3087, 3092, 367 3097, 3102, 3106, 3111, 3116, 3121, 3126, 3130, 368 3135, 3140, 3145, 3149, 3154, 3159, 3163, 3168, 369 3173, 3177, 3182, 3187, 3191, 3196, 3201, 3205, 370 3210, 3215, 3219, 3224, 3228, 3233, 3238, 3242, 371 3247, 3251, 3256, 3260, 3265, 3269, 3274, 3279, 372 3283, 3287, 3292, 3296, 3301, 3305, 3310, 3314, 373 3319, 3323, 3327, 3332, 3336, 3341, 3345, 3349, 374 3354, 3358, 3362, 3367, 3371, 3375, 3380, 3384, 375 3388, 3393, 3397, 3401, 3405, 3410, 3414, 3418, 376 3422, 3426, 3431, 3435, 3439, 3443, 3447, 3451, 377 3455, 3460, 3464, 3468, 3472, 3476, 3480, 3484, 378 3488, 3492, 3496, 3500, 3504, 3508, 3512, 3516, 379 3520, 3524, 3528, 3532, 3536, 3540, 3544, 3548, 380 3552, 3555, 3559, 3563, 3567, 3571, 3575, 3578, 381 3582, 3586, 3590, 3593, 3597, 3601, 3605, 3608, 382 3612, 3616, 3619, 3623, 3627, 3630, 3634, 3638, 383 3641, 3645, 3649, 3652, 3656, 3659, 3663, 3666, 384 3670, 3673, 3677, 3680, 3684, 3687, 3691, 3694, 385 3698, 3701, 3704, 3708, 3711, 3714, 3718, 3721, 386 3724, 3728, 3731, 3734, 3738, 3741, 3744, 3747, 387 3751, 3754, 3757, 3760, 3763, 3767, 3770, 3773, 388 3776, 3779, 3782, 3785, 3788, 3791, 3794, 3798, 389 3801, 3804, 3807, 3809, 3812, 3815, 3818, 3821, 390 3824, 3827, 3830, 3833, 3836, 3839, 3841, 3844, 391 3847, 3850, 3853, 3855, 3858, 3861, 3864, 3866, 392 3869, 3872, 3874, 3877, 3880, 3882, 3885, 3887, 393 3890, 3893, 3895, 3898, 3900, 3903, 3905, 3908, 394 3910, 3913, 3915, 3917, 3920, 3922, 3925, 3927, 395 3929, 3932, 3934, 3936, 3939, 3941, 3943, 3945, 396 3948, 3950, 3952, 3954, 3956, 3958, 3961, 3963, 397 3965, 3967, 3969, 3971, 3973, 3975, 3977, 3979, 398 3981, 3983, 3985, 3987, 3989, 3991, 3993, 3994, 399 3996, 3998, 4000, 4002, 4004, 4005, 4007, 4009, 400 4011, 4012, 4014, 4016, 4017, 4019, 4021, 4022, 401 4024, 4025, 4027, 4028, 4030, 4031, 4033, 4034, 402 4036, 4037, 4039, 4040, 4042, 4043, 4044, 4046, 403 4047, 4048, 4050, 4051, 4052, 4053, 4055, 4056, 404 4057, 4058, 4059, 4060, 4062, 4063, 4064, 4065, 405 4066, 4067, 4068, 4069, 4070, 4071, 4072, 4073, 406 4074, 4075, 4075, 4076, 4077, 4078, 4079, 4079, 407 4080, 4081, 4082, 4082, 4083, 4084, 4084, 4085, 408 4086, 4086, 4087, 4087, 4088, 4088, 4089, 4089, 409 4090, 4090, 4091, 4091, 4092, 4092, 4092, 4093, 410 4093, 4093, 4094, 4094, 4094, 4094, 4095, 4095, 411 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095 412 }, 413 { 414 4096, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 415 4095, 4095, 4095, 4094, 4094, 4094, 4094, 4093, 416 4093, 4093, 4092, 4092, 4092, 4091, 4091, 4090, 417 4090, 4089, 4089, 4088, 4088, 4087, 4087, 4086, 418 4086, 4085, 4084, 4084, 4083, 4082, 4082, 4081, 419 4080, 4079, 4079, 4078, 4077, 4076, 4075, 4075, 420 4074, 4073, 4072, 4071, 4070, 4069, 4068, 4067, 421 4066, 4065, 4064, 4063, 4062, 4060, 4059, 4058, 422 4057, 4056, 4055, 4053, 4052, 4051, 4050, 4048, 423 4047, 4046, 4044, 4043, 4042, 4040, 4039, 4037, 424 4036, 4034, 4033, 4031, 4030, 4028, 4027, 4025, 425 4024, 4022, 4021, 4019, 4017, 4016, 4014, 4012, 426 4011, 4009, 4007, 4005, 4004, 4002, 4000, 3998, 427 3996, 3994, 3993, 3991, 3989, 3987, 3985, 3983, 428 3981, 3979, 3977, 3975, 3973, 3971, 3969, 3967, 429 3965, 3963, 3961, 3958, 3956, 3954, 3952, 3950, 430 3948, 3945, 3943, 3941, 3939, 3936, 3934, 3932, 431 3929, 3927, 3925, 3922, 3920, 3917, 3915, 3913, 432 3910, 3908, 3905, 3903, 3900, 3898, 3895, 3893, 433 3890, 3887, 3885, 3882, 3880, 3877, 3874, 3872, 434 3869, 3866, 3864, 3861, 3858, 3855, 3853, 3850, 435 3847, 3844, 3841, 3839, 3836, 3833, 3830, 3827, 436 3824, 3821, 3818, 3815, 3812, 3809, 3807, 3804, 437 3801, 3798, 3794, 3791, 3788, 3785, 3782, 3779, 438 3776, 3773, 3770, 3767, 3763, 3760, 3757, 3754, 439 3751, 3747, 3744, 3741, 3738, 3734, 3731, 3728, 440 3724, 3721, 3718, 3714, 3711, 3708, 3704, 3701, 441 3698, 3694, 3691, 3687, 3684, 3680, 3677, 3673, 442 3670, 3666, 3663, 3659, 3656, 3652, 3649, 3645, 443 3641, 3638, 3634, 3630, 3627, 3623, 3619, 3616, 444 3612, 3608, 3605, 3601, 3597, 3593, 3590, 3586, 445 3582, 3578, 3575, 3571, 3567, 3563, 3559, 3555, 446 3552, 3548, 3544, 3540, 3536, 3532, 3528, 3524, 447 3520, 3516, 3512, 3508, 3504, 3500, 3496, 3492, 448 3488, 3484, 3480, 3476, 3472, 3468, 3464, 3460, 449 3455, 3451, 3447, 3443, 3439, 3435, 3431, 3426, 450 3422, 3418, 3414, 3410, 3405, 3401, 3397, 3393, 451 3388, 3384, 3380, 3375, 3371, 3367, 3362, 3358, 452 3354, 3349, 3345, 3341, 3336, 3332, 3327, 3323, 453 3319, 3314, 3310, 3305, 3301, 3296, 3292, 3287, 454 3283, 3279, 3274, 3269, 3265, 3260, 3256, 3251, 455 3247, 3242, 3238, 3233, 3228, 3224, 3219, 3215, 456 3210, 3205, 3201, 3196, 3191, 3187, 3182, 3177, 457 3173, 3168, 3163, 3159, 3154, 3149, 3145, 3140, 458 3135, 3130, 3126, 3121, 3116, 3111, 3106, 3102, 459 3097, 3092, 3087, 3082, 3078, 3073, 3068, 3063, 460 3058, 3053, 3048, 3044, 3039, 3034, 3029, 3024, 461 3019, 3014, 3009, 3004, 2999, 2994, 2989, 2984, 462 2980, 2975, 2970, 2965, 2960, 2955, 2950, 2945, 463 2940, 2935, 2930, 2924, 2919, 2914, 2909, 2904, 464 2899, 2894, 2889, 2884, 2879, 2874, 2869, 2864, 465 2859, 2853, 2848, 2843, 2838, 2833, 2828, 2823, 466 2817, 2812, 2807, 2802, 2797, 2792, 2786, 2781, 467 2776, 2771, 2766, 2760, 2755, 2750, 2745, 2740, 468 2734, 2729, 2724, 2719, 2713, 2708, 2703, 2698, 469 2692, 2687, 2682, 2676, 2671, 2666, 2661, 2655, 470 2650, 2645, 2639, 2634, 2629, 2623, 2618, 2613, 471 2607, 2602, 2597, 2591, 2586, 2581, 2575, 2570, 472 2565, 2559, 2554, 2549, 2543, 2538, 2532, 2527, 473 2522, 2516, 2511, 2505, 2500, 2495, 2489, 2484, 474 2478, 2473, 2467, 2462, 2457, 2451, 2446, 2440, 475 2435, 2429, 2424, 2419, 2413, 2408, 2402, 2397, 476 2391, 2386, 2380, 2375, 2369, 2364, 2358, 2353, 477 2347, 2342, 2336, 2331, 2325, 2320, 2314, 2309, 478 2304, 2298, 2292, 2287, 2281, 2276, 2270, 2265, 479 2259, 2254, 2248, 2243, 2237, 2232, 2226, 2221, 480 2215, 2210, 2204, 2199, 2193, 2188, 2182, 2177, 481 2171, 2165, 2160, 2154, 2149, 2143, 2138, 2132, 482 2127, 2121, 2116, 2110, 2105, 2099, 2093, 2088, 483 2082, 2077, 2071, 2066, 2060, 2055, 2049, 2043, 484 2038, 2032, 2027, 2021, 2016, 2010, 2005, 1999, 485 1993, 1988, 1982, 1977, 1971, 1966, 1960, 1955, 486 1949, 1943, 1938, 1932, 1927, 1921, 1916, 1910, 487 1905, 1899, 1893, 1888, 1882, 1877, 1871, 1866, 488 1860, 1855, 1849, 1844, 1838, 1832, 1827, 1821, 489 1816, 1810, 1805, 1799, 1794, 1788, 1783, 1777, 490 1772, 1766, 1761, 1755, 1749, 1744, 1738, 1733, 491 1727, 1722, 1716, 1711, 1705, 1700, 1694, 1689, 492 1683, 1678, 1672, 1667, 1661, 1656, 1650, 1645, 493 1639, 1634, 1628, 1623, 1617, 1612, 1606, 1601, 494 1596, 1590, 1585, 1579, 1574, 1568, 1563, 1557, 495 1552, 1546, 1541, 1535, 1530, 1525, 1519, 1514, 496 1508, 1503, 1497, 1492, 1487, 1481, 1476, 1470, 497 1465, 1460, 1454, 1449, 1443, 1438, 1433, 1427, 498 1422, 1417, 1411, 1406, 1400, 1395, 1390, 1384, 499 1379, 1374, 1368, 1363, 1358, 1352, 1347, 1342, 500 1336, 1331, 1326, 1321, 1315, 1310, 1305, 1299, 501 1294, 1289, 1284, 1278, 1273, 1268, 1262, 1257, 502 1252, 1247, 1242, 1236, 1231, 1226, 1221, 1215, 503 1210, 1205, 1200, 1195, 1189, 1184, 1179, 1174, 504 1169, 1164, 1158, 1153, 1148, 1143, 1138, 1133, 505 1128, 1122, 1117, 1112, 1107, 1102, 1097, 1092, 506 1087, 1082, 1077, 1072, 1067, 1062, 1056, 1051, 507 1046, 1041, 1036, 1031, 1026, 1021, 1016, 1011, 508 1006, 1001, 996, 991, 986, 982, 977, 972, 509 967, 962, 957, 952, 947, 942, 937, 932, 510 928, 923, 918, 913, 908, 903, 898, 894, 511 889, 884, 879, 874, 870, 865, 860, 855, 512 850, 846, 841, 836, 831, 827, 822, 817, 513 813, 808, 803, 798, 794, 789, 784, 780, 514 775, 771, 766, 761, 757, 752, 747, 743, 515 738, 734, 729, 725, 720, 716, 711, 707, 516 702, 698, 693, 689, 684, 680, 675, 671, 517 666, 662, 657, 653, 649, 644, 640, 635, 518 631, 627, 622, 618, 614, 609, 605, 601, 519 596, 592, 588, 584, 579, 575, 571, 567, 520 562, 558, 554, 550, 546, 541, 537, 533, 521 529, 525, 521, 516, 512, 508, 504, 500, 522 496, 492, 488, 484, 480, 476, 472, 468, 523 464, 460, 456, 452, 448, 444, 440, 436, 524 432, 429, 425, 421, 417, 413, 409, 405, 525 402, 398, 394, 390, 386, 383, 379, 375, 526 372, 368, 364, 360, 357, 353, 349, 346, 527 342, 338, 335, 331, 328, 324, 321, 317, 528 313, 310, 306, 303, 299, 296, 292, 289, 529 286, 282, 279, 275, 272, 269, 265, 262, 530 258, 255, 252, 248, 245, 242, 239, 235, 531 232, 229, 226, 222, 219, 216, 213, 210, 532 207, 203, 200, 197, 194, 191, 188, 185, 533 182, 179, 176, 173, 170, 167, 164, 161, 534 158, 155, 152, 149, 146, 144, 141, 138, 535 135, 132, 129, 127, 124, 121, 118, 116, 536 113, 110, 107, 105, 102, 99, 97, 94, 537 92, 89, 86, 84, 81, 79, 76, 74, 538 71, 69, 66, 64, 61, 59, 57, 54, 539 52, 50, 47, 45, 43, 40, 38, 36, 540 33, 31, 29, 27, 25, 22, 20, 18, 541 16, 14, 12, 10, 8, 6, 4, 2 542 }, 543 { 544 0, -1, -3, -5, -7, -9, -11, -13, 545 -15, -17, -19, -20, -23, -25, -27, -28, 546 -30, -33, -34, -36, -39, -40, -42, -43, 547 -45, -46, -49, -50, -52, -54, -56, -58, 548 -60, -61, -62, -65, -66, -68, -70, -72, 549 -73, -74, -77, -78, -80, -82, -83, -85, 550 -87, -89, -90, -92, -93, -95, -96, -98, 551 -100, -102, -103, -105, -106, -107, -108, -110, 552 -112, -114, -116, -116, -118, -120, -122, -122, 553 -124, -126, -127, -128, -130, -131, -133, -133, 554 -136, -137, -138, -139, -141, -142, -144, -145, 555 -147, -147, -150, -151, -151, -153, -155, -156, 556 -157, -159, -160, -161, -163, -164, -165, -166, 557 -168, -168, -170, -171, -172, -174, -174, -176, 558 -177, -178, -180, -181, -182, -183, -184, -185, 559 -187, -188, -189, -190, -191, -192, -193, -195, 560 -196, -196, -198, -199, -200, -200, -202, -204, 561 -204, -205, -206, -207, -208, -209, -211, -212, 562 -212, -213, -214, -215, -216, -217, -218, -220, 563 -220, -221, -222, -223, -224, -225, -225, -227, 564 -227, -228, -229, -230, -230, -231, -233, -234, 565 -234, -235, -235, -237, -238, -239, -239, -240, 566 -240, -242, -242, -243, -243, -245, -246, -247, 567 -247, -249, -248, -249, -250, -251, -251, -253, 568 -253, -253, -255, -255, -256, -256, -257, -258, 569 -259, -259, -260, -261, -261, -262, -262, -264, 570 -263, -265, -265, -265, -266, -267, -267, -268, 571 -269, -269, -269, -270, -271, -271, -272, -273, 572 -273, -273, -274, -274, -276, -275, -276, -277, 573 -277, -278, -278, -278, -279, -279, -280, -281, 574 -280, -281, -282, -283, -283, -282, -284, -284, 575 -284, -285, -285, -286, -286, -286, -287, -287, 576 -288, -288, -288, -289, -289, -289, -290, -290, 577 -290, -291, -291, -292, -291, -291, -292, -292, 578 -292, -293, -293, -293, -294, -294, -295, -295, 579 -294, -295, -295, -296, -297, -297, -297, -297, 580 -297, -297, -298, -298, -297, -298, -298, -298, 581 -299, -299, -300, -299, -299, -300, -299, -300, 582 -301, -300, -300, -301, -300, -301, -301, -301, 583 -301, -301, -302, -301, -302, -301, -302, -302, 584 -302, -302, -302, -302, -302, -302, -303, -302, 585 -303, -302, -303, -303, -302, -303, -303, -303, 586 -302, -303, -303, -302, -303, -303, -302, -303, 587 -303, -302, -303, -303, -302, -303, -303, -303, 588 -303, -302, -303, -303, -302, -302, -302, -303, 589 -302, -302, -302, -301, -303, -302, -301, -302, 590 -301, -301, -301, -302, -301, -301, -301, -300, 591 -301, -300, -300, -300, -300, -299, -300, -299, 592 -300, -300, -299, -300, -299, -299, -299, -299, 593 -298, -299, -298, -297, -297, -297, -296, -297, 594 -296, -296, -296, -296, -295, -296, -295, -296, 595 -295, -294, -294, -294, -293, -294, -294, -293, 596 -293, -292, -293, -292, -292, -292, -291, -290, 597 -291, -290, -291, -289, -289, -290, -289, -289, 598 -288, -288, -288, -288, -286, -287, -286, -286, 599 -286, -285, -286, -284, -284, -284, -284, -283, 600 -283, -283, -282, -282, -282, -281, -280, -281, 601 -279, -280, -280, -278, -279, -278, -278, -277, 602 -278, -276, -276, -277, -275, -276, -274, -275, 603 -274, -273, -273, -272, -273, -272, -272, -271, 604 -270, -270, -269, -269, -269, -268, -268, -267, 605 -267, -266, -266, -266, -265, -265, -264, -264, 606 -263, -263, -262, -262, -261, -261, -260, -260, 607 -259, -259, -258, -258, -257, -257, -256, -256, 608 -256, -255, -254, -254, -253, -253, -252, -252, 609 -251, -251, -250, -250, -249, -249, -248, -248, 610 -247, -247, -246, -246, -245, -245, -244, -244, 611 -243, -242, -242, -241, -241, -240, -239, -239, 612 -239, -238, -238, -237, -237, -235, -235, -235, 613 -234, -234, -232, -233, -232, -232, -231, -229, 614 -230, -229, -228, -228, -227, -226, -227, -225, 615 -224, -225, -223, -223, -222, -222, -221, -221, 616 -220, -219, -219, -218, -218, -216, -217, -216, 617 -215, -215, -214, -213, -212, -213, -211, -211, 618 -210, -210, -209, -209, -208, -206, -207, -206, 619 -205, -204, -204, -204, -203, -202, -202, -200, 620 -200, -200, -200, -198, -197, -197, -196, -195, 621 -195, -195, -194, -194, -192, -192, -191, -191, 622 -189, -189, -188, -188, -187, -186, -186, -186, 623 -185, -185, -183, -183, -182, -182, -181, -181, 624 -180, -178, -178, -177, -177, -176, -176, -174, 625 -174, -173, -173, -172, -172, -172, -170, -170, 626 -168, -168, -167, -167, -167, -165, -165, -164, 627 -164, -164, -162, -162, -161, -160, -160, -158, 628 -158, -158, -157, -156, -155, -155, -154, -153, 629 -153, -152, -151, -151, -150, -149, -149, -148, 630 -147, -147, -146, -146, -144, -144, -144, -142, 631 -142, -141, -142, -140, -140, -139, -138, -138, 632 -137, -136, -136, -134, -134, -133, -134, -132, 633 -132, -131, -130, -130, -128, -128, -128, -127, 634 -127, -126, -124, -124, -124, -123, -123, -122, 635 -121, -120, -120, -119, -118, -118, -117, -117, 636 -116, -115, -115, -115, -114, -113, -111, -111, 637 -110, -110, -109, -109, -108, -107, -107, -106, 638 -105, -104, -104, -103, -102, -103, -102, -101, 639 -101, -100, -99, -99, -98, -97, -97, -96, 640 -96, -95, -94, -94, -93, -92, -92, -91, 641 -91, -90, -89, -88, -88, -88, -87, -86, 642 -85, -86, -84, -84, -83, -82, -82, -81, 643 -81, -80, -80, -78, -79, -77, -77, -77, 644 -76, -76, -75, -74, -74, -73, -72, -72, 645 -72, -71, -70, -70, -69, -68, -68, -68, 646 -66, -67, -66, -65, -65, -65, -63, -63, 647 -62, -62, -61, -61, -60, -60, -60, -58, 648 -58, -58, -56, -56, -56, -55, -54, -55, 649 -54, -54, -53, -52, -51, -51, -51, -50, 650 -49, -49, -49, -49, -48, -47, -46, -46, 651 -46, -46, -45, -43, -43, -43, -43, -42, 652 -42, -42, -40, -40, -40, -39, -39, -38, 653 -38, -38, -37, -37, -36, -36, -35, -35, 654 -34, -35, -34, -33, -33, -32, -32, -31, 655 -31, -31, -30, -29, -29, -29, -28, -27, 656 -28, -28, -27, -26, -26, -25, -25, -25, 657 -24, -24, -24, -23, -23, -22, -22, -22, 658 -21, -21, -20, -20, -20, -20, -19, -18, 659 -19, -18, -18, -17, -18, -17, -16, -17, 660 -16, -15, -15, -15, -14, -14, -15, -13, 661 -13, -13, -13, -12, -12, -11, -12, -11, 662 -12, -10, -10, -10, -10, -10, -9, -10, 663 -9, -9, -9, -8, -8, -7, -8, -7, 664 -7, -7, -6, -6, -6, -7, -6, -6, 665 -5, -5, -5, -5, -5, -4, -4, -5, 666 -4, -4, -3, -3, -3, -3, -3, -2, 667 -3, -2, -2, -2, -1, -2, -1, -2, 668 -1, -1, -1, -1, -1, 0, -1, 0, 669 -1, -1, 0, 0, -1, 0, 0, -1, 670 1, 1, 0, 0, 0, 1, 0, 0, 671 0, 0, 0, 0, 0, 0, 0, 0 672 } 673 }; 674 #else /* defined(CONFIG_CSI2_PLUS) */ 675 static const int zoom_table[4][HRT_GDC_N] = { 676 { 677 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 678 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 679 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 680 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 681 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 682 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 683 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 684 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 685 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 686 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 687 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 688 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 689 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 690 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 691 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 692 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 693 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 694 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 695 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 696 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 697 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 698 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 699 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 700 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 701 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 702 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 703 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 704 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 705 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 706 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 707 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 708 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 709 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 710 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 711 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 712 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 713 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 714 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 715 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 716 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 717 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 718 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 719 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 720 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 721 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 722 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 723 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 724 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 725 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 726 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 727 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 728 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 729 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 730 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 731 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 732 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 733 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 734 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 735 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 736 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 737 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 738 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 739 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 740 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 741 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 742 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 743 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 744 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 745 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 746 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 747 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 748 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 749 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 750 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 751 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 752 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 753 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 754 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 755 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 756 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 757 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 758 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 759 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 760 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 761 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 762 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 763 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 764 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 765 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 766 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 767 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 768 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 769 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 770 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 771 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 772 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 773 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 774 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 775 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 776 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 777 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 778 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 779 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 780 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 781 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 782 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 783 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 784 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 785 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 786 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 787 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 788 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 789 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 790 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 791 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 792 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 793 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 794 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 795 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 796 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 797 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 798 -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, 799 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 800 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 801 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 802 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 803 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 804 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4 805 }, 806 { 807 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 808 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 809 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 810 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 811 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 812 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 813 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 814 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 815 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 816 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 817 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 818 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 819 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 820 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 821 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 822 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 823 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 824 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 825 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 826 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 827 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 828 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 829 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 830 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 831 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 832 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 833 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 834 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 835 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 836 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 837 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 838 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 839 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 840 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 841 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 842 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 843 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 844 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 845 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 846 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 847 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 848 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 849 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 850 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 851 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 852 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 853 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 854 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 855 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 856 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 857 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 858 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 859 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 860 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 861 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 862 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 863 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 864 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 865 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 866 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 867 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 868 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 869 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 870 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 871 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 872 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 873 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 874 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 875 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 876 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 877 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 878 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 879 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 880 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 881 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 882 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 883 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 884 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 885 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 886 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 887 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 888 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 889 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 890 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 891 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 892 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 893 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 894 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 895 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 896 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 897 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 898 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 899 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 900 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 901 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 902 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 903 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 904 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 905 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 906 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 907 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 908 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 909 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 910 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 911 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 912 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 913 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 914 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 915 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 916 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 917 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 918 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 919 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 920 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 921 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 922 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 923 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 924 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 925 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 926 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 927 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 928 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 929 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 930 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 931 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 932 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 933 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 934 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4 935 }, 936 { 937 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 938 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 939 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 940 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 941 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 942 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 943 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 944 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 945 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 946 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 947 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 948 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 949 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 950 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 951 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 952 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 953 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 954 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 955 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 956 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 957 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 958 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 959 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 960 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 961 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 962 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 963 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 964 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 965 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 966 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 967 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 968 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 969 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 970 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 971 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 972 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 973 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 974 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 975 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 976 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 977 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 978 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 979 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 980 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 981 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 982 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 983 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 984 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 985 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 986 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 987 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 988 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 989 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 990 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 991 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 992 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 993 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 994 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 995 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 996 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 997 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 998 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 999 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 1000 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 1001 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 1002 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 1003 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 1004 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 1005 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 1006 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 1007 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 1008 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 1009 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 1010 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 1011 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 1012 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 1013 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 1014 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 1015 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 1016 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 1017 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 1018 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 1019 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 1020 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 1021 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 1022 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 1023 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 1024 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 1025 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 1026 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 1027 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 1028 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 1029 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 1030 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 1031 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 1032 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 1033 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 1034 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 1035 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 1036 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 1037 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 1038 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 1039 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 1040 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 1041 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 1042 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 1043 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 1044 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 1045 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 1046 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 1047 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 1048 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 1049 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 1050 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 1051 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 1052 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 1053 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 1054 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 1055 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 1056 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 1057 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 1058 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 1059 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 1060 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 1061 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 1062 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 1063 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 1064 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4 1065 }, 1066 { 1067 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1068 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1069 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1070 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1071 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1072 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1073 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1074 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1075 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1076 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1077 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1078 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1079 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1080 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1081 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 1082 -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, 1083 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1084 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1085 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1086 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1087 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1088 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1089 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1090 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1091 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1092 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1093 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1094 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1095 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1096 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1097 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1098 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1099 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1100 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1101 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1102 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1103 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1104 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1105 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1106 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1107 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1108 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1109 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1110 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1111 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1112 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1113 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1114 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1115 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1116 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1117 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1118 -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, 1119 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1120 -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, 1121 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1122 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1123 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1124 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1125 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1126 -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, 1127 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1128 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1129 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1130 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1131 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1132 -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, 1133 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1134 -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, 1135 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1136 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1137 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1138 -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, 1139 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1140 -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, 1141 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1142 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1143 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1144 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1145 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1146 -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, 1147 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1148 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1149 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1150 -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, 1151 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1152 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1153 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1154 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1155 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1156 -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, 1157 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1158 -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, 1159 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1160 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1161 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1162 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1163 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1164 -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, 1165 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1166 -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, 1167 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1168 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1169 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1170 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1171 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1172 -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, 1173 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1174 -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, 1175 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1176 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1177 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1178 -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, 1179 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1180 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1181 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1182 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1183 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1184 -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 1185 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1186 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1187 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1188 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1189 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1190 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1191 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1192 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1193 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1194 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4 1195 } 1196 }; 1197 #endif 1198 #else 1199 #error "sh_css_params.c: GDC version must be \ 1200 one of {GDC_VERSION_2}" 1201 #endif 1202 1203 static const struct ia_css_dz_config default_dz_config = { 1204 HRT_GDC_N, 1205 HRT_GDC_N, 1206 { 1207 \ 1208 {0, 0}, \ 1209 {0, 0}, \ 1210 } 1211 }; 1212 1213 static const struct ia_css_vector default_motion_config = { 1214 0, 1215 0 1216 }; 1217 1218 /* ------ deprecated(bz675) : from ------ */ 1219 static const struct ia_css_shading_settings default_shading_settings = { 1220 1 /* enable shading table conversion in the css 1221 (This matches the legacy way.) */ 1222 }; 1223 1224 /* ------ deprecated(bz675) : to ------ */ 1225 1226 struct ia_css_isp_skc_dvs_statistics { 1227 ia_css_ptr p_data; 1228 }; 1229 1230 static enum ia_css_err 1231 ref_sh_css_ddr_address_map( 1232 struct sh_css_ddr_address_map *map, 1233 struct sh_css_ddr_address_map *out); 1234 1235 static enum ia_css_err 1236 write_ia_css_isp_parameter_set_info_to_ddr( 1237 struct ia_css_isp_parameter_set_info *me, 1238 ia_css_ptr *out); 1239 1240 static enum ia_css_err 1241 free_ia_css_isp_parameter_set_info(ia_css_ptr ptr); 1242 1243 static enum ia_css_err 1244 sh_css_params_write_to_ddr_internal( 1245 struct ia_css_pipe *pipe, 1246 unsigned int pipe_id, 1247 struct ia_css_isp_parameters *params, 1248 const struct ia_css_pipeline_stage *stage, 1249 struct sh_css_ddr_address_map *ddr_map, 1250 struct sh_css_ddr_address_map_size *ddr_map_size); 1251 1252 static enum ia_css_err 1253 sh_css_create_isp_params(struct ia_css_stream *stream, 1254 struct ia_css_isp_parameters **isp_params_out); 1255 1256 static bool 1257 sh_css_init_isp_params_from_global(struct ia_css_stream *stream, 1258 struct ia_css_isp_parameters *params, 1259 bool use_default_config, 1260 struct ia_css_pipe *pipe_in); 1261 1262 static enum ia_css_err 1263 sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, 1264 struct ia_css_isp_parameters *params, 1265 const struct ia_css_isp_config *config, 1266 struct ia_css_pipe *pipe_in); 1267 1268 static enum ia_css_err 1269 sh_css_set_global_isp_config_on_pipe( 1270 struct ia_css_pipe *curr_pipe, 1271 const struct ia_css_isp_config *config, 1272 struct ia_css_pipe *pipe); 1273 1274 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 1275 static enum ia_css_err 1276 sh_css_set_per_frame_isp_config_on_pipe( 1277 struct ia_css_stream *stream, 1278 const struct ia_css_isp_config *config, 1279 struct ia_css_pipe *pipe); 1280 #endif 1281 1282 static enum ia_css_err 1283 sh_css_update_uds_and_crop_info_based_on_zoom_region( 1284 const struct ia_css_binary_info *info, 1285 const struct ia_css_frame_info *in_frame_info, 1286 const struct ia_css_frame_info *out_frame_info, 1287 const struct ia_css_resolution *dvs_env, 1288 const struct ia_css_dz_config *zoom, 1289 const struct ia_css_vector *motion_vector, 1290 struct sh_css_uds_info *uds, /* out */ 1291 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 1292 struct ia_css_resolution pipe_in_res, 1293 bool enable_zoom); 1294 1295 ia_css_ptr 1296 sh_css_params_ddr_address_map(void) 1297 { 1298 return sp_ddr_ptrs; 1299 } 1300 1301 /* **************************************************** 1302 * Each coefficient is stored as 7bits to fit 2 of them into one 1303 * ISP vector element, so we will store 4 coefficents on every 1304 * memory word (32bits) 1305 * 1306 * 0: Coefficient 0 used bits 1307 * 1: Coefficient 1 used bits 1308 * 2: Coefficient 2 used bits 1309 * 3: Coefficient 3 used bits 1310 * x: not used 1311 * 1312 * xx33333332222222 | xx11111110000000 1313 * 1314 * *************************************************** 1315 */ 1316 static struct ia_css_host_data * 1317 convert_allocate_fpntbl(struct ia_css_isp_parameters *params) 1318 { 1319 unsigned int i, j; 1320 short *data_ptr; 1321 struct ia_css_host_data *me; 1322 unsigned int isp_format_data_size; 1323 u32 *isp_format_data_ptr; 1324 1325 assert(params); 1326 1327 data_ptr = params->fpn_config.data; 1328 isp_format_data_size = params->fpn_config.height * params->fpn_config.width * 1329 sizeof(uint32_t); 1330 1331 me = ia_css_host_data_allocate(isp_format_data_size); 1332 1333 if (!me) 1334 return NULL; 1335 1336 isp_format_data_ptr = (uint32_t *)me->address; 1337 1338 for (i = 0; i < params->fpn_config.height; i++) { 1339 for (j = 0; 1340 j < params->fpn_config.width; 1341 j += 4, data_ptr += 4, isp_format_data_ptr++) { 1342 int data = data_ptr[0] << 0 | 1343 data_ptr[1] << 7 | 1344 data_ptr[2] << 16 | 1345 data_ptr[3] << 23; 1346 *isp_format_data_ptr = data; 1347 } 1348 } 1349 return me; 1350 } 1351 1352 static enum ia_css_err 1353 store_fpntbl(struct ia_css_isp_parameters *params, ia_css_ptr ptr) { 1354 struct ia_css_host_data *isp_data; 1355 1356 assert(params); 1357 assert(ptr != mmgr_NULL); 1358 1359 isp_data = convert_allocate_fpntbl(params); 1360 if (!isp_data) 1361 { 1362 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1363 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1364 } 1365 ia_css_params_store_ia_css_host_data(ptr, isp_data); 1366 1367 ia_css_host_data_free(isp_data); 1368 return IA_CSS_SUCCESS; 1369 } 1370 1371 static void 1372 convert_raw_to_fpn(struct ia_css_isp_parameters *params) 1373 { 1374 int maxval = 0; 1375 unsigned int i; 1376 1377 assert(params); 1378 1379 /* Find the maximum value in the table */ 1380 for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) { 1381 int val = params->fpn_config.data[i]; 1382 /* Make sure FPN value can be represented in 13-bit unsigned 1383 * number (ISP precision - 1), but note that actual input range 1384 * depends on precision of input frame data. 1385 */ 1386 if (val < 0) { 1387 /* Checkpatch patch */ 1388 val = 0; 1389 } else if (val >= (1 << 13)) { 1390 /* Checkpatch patch */ 1391 /* MW: BUG, is "13" a system or application property */ 1392 val = (1 << 13) - 1; 1393 } 1394 maxval = max(maxval, val); 1395 } 1396 /* Find the lowest shift value to remap the values in the range 1397 * 0..maxval to 0..2^shiftval*63. 1398 */ 1399 params->fpn_config.shift = 0; 1400 while (maxval > 63) { 1401 /* MW: BUG, is "63" a system or application property */ 1402 maxval >>= 1; 1403 params->fpn_config.shift++; 1404 } 1405 /* Adjust the values in the table for the shift value */ 1406 for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) 1407 ((unsigned short *)params->fpn_config.data)[i] >>= params->fpn_config.shift; 1408 } 1409 1410 static void 1411 ia_css_process_kernel(struct ia_css_stream *stream, 1412 struct ia_css_isp_parameters *params, 1413 void (*process)(unsigned int pipe_id, 1414 const struct ia_css_pipeline_stage *stage, 1415 struct ia_css_isp_parameters *params)) 1416 { 1417 int i; 1418 1419 for (i = 0; i < stream->num_pipes; i++) { 1420 struct ia_css_pipe *pipe = stream->pipes[i]; 1421 struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); 1422 struct ia_css_pipeline_stage *stage; 1423 1424 /* update the other buffers to the pipe specific copies */ 1425 for (stage = pipeline->stages; stage; stage = stage->next) { 1426 if (!stage || !stage->binary) continue; 1427 process(pipeline->pipe_id, stage, params); 1428 } 1429 } 1430 } 1431 1432 static enum ia_css_err 1433 sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, 1434 bool *is_dp_10bpp) { 1435 enum ia_css_err err = IA_CSS_SUCCESS; 1436 /* Currently we check if 10bpp DPC configuration is required based 1437 * on the use case,i.e. if BDS and DPC is both enabled. The more cleaner 1438 * design choice would be to expose the type of DPC (either 10bpp or 13bpp) 1439 * using the binary info, but the current control flow does not allow this 1440 * implementation. (This is because the configuration is set before a 1441 * binary is selected, and the binary info is not available) 1442 */ 1443 if ((!pipe) || (!is_dp_10bpp)) 1444 { 1445 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); 1446 err = IA_CSS_ERR_INTERNAL_ERROR; 1447 } else 1448 { 1449 *is_dp_10bpp = false; 1450 1451 /* check if DPC is enabled from the host */ 1452 if (pipe->config.enable_dpc) { 1453 /*check if BDS is enabled*/ 1454 unsigned int required_bds_factor = SH_CSS_BDS_FACTOR_1_00; 1455 1456 if ((pipe->config.bayer_ds_out_res.width != 0) && 1457 (pipe->config.bayer_ds_out_res.height != 0)) { 1458 if (IA_CSS_SUCCESS == binarydesc_calculate_bds_factor( 1459 pipe->config.input_effective_res, 1460 pipe->config.bayer_ds_out_res, 1461 &required_bds_factor)) { 1462 if (required_bds_factor != SH_CSS_BDS_FACTOR_1_00) { 1463 /*we use 10bpp BDS configuration*/ 1464 *is_dp_10bpp = true; 1465 } 1466 } 1467 } 1468 } 1469 } 1470 1471 return err; 1472 } 1473 1474 enum ia_css_err 1475 sh_css_set_black_frame(struct ia_css_stream *stream, 1476 const struct ia_css_frame *raw_black_frame) { 1477 struct ia_css_isp_parameters *params; 1478 /* this function desperately needs to be moved to the ISP or SP such 1479 * that it can use the DMA. 1480 */ 1481 unsigned int height, width, y, x, k, data; 1482 ia_css_ptr ptr; 1483 1484 assert(stream); 1485 assert(raw_black_frame); 1486 1487 params = stream->isp_params_configs; 1488 height = raw_black_frame->info.res.height; 1489 width = raw_black_frame->info.padded_width, 1490 1491 ptr = raw_black_frame->data 1492 + raw_black_frame->planes.raw.offset; 1493 1494 IA_CSS_ENTER_PRIVATE("black_frame=%p", raw_black_frame); 1495 1496 if (params->fpn_config.data && 1497 (params->fpn_config.width != width || params->fpn_config.height != height)) 1498 { 1499 sh_css_free(params->fpn_config.data); 1500 params->fpn_config.data = NULL; 1501 } 1502 if (!params->fpn_config.data) 1503 { 1504 params->fpn_config.data = sh_css_malloc(height * width * sizeof(short)); 1505 if (!params->fpn_config.data) { 1506 IA_CSS_ERROR("out of memory"); 1507 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1508 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1509 } 1510 params->fpn_config.width = width; 1511 params->fpn_config.height = height; 1512 params->fpn_config.shift = 0; 1513 } 1514 1515 /* store raw to fpntbl */ 1516 for (y = 0; y < height; y++) 1517 { 1518 for (x = 0; x < width; x += (ISP_VEC_NELEMS * 2)) { 1519 int ofs = y * width + x; 1520 1521 for (k = 0; k < ISP_VEC_NELEMS; k += 2) { 1522 hmm_load(ptr, (void *)(&data), sizeof(int)); 1523 params->fpn_config.data[ofs + 2 * k] = 1524 (short)(data & 0xFFFF); 1525 params->fpn_config.data[ofs + 2 * k + 2] = 1526 (short)((data >> 16) & 0xFFFF); 1527 ptr += sizeof(int); /* byte system address */ 1528 } 1529 for (k = 0; k < ISP_VEC_NELEMS; k += 2) { 1530 hmm_load(ptr, (void *)(&data), sizeof(int)); 1531 params->fpn_config.data[ofs + 2 * k + 1] = 1532 (short)(data & 0xFFFF); 1533 params->fpn_config.data[ofs + 2 * k + 3] = 1534 (short)((data >> 16) & 0xFFFF); 1535 ptr += sizeof(int); /* byte system address */ 1536 } 1537 } 1538 } 1539 1540 /* raw -> fpn */ 1541 convert_raw_to_fpn(params); 1542 1543 /* overwrite isp parameter */ 1544 ia_css_process_kernel(stream, params, ia_css_kernel_process_param[IA_CSS_FPN_ID]); 1545 1546 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 1547 1548 return IA_CSS_SUCCESS; 1549 } 1550 1551 bool 1552 sh_css_params_set_binning_factor(struct ia_css_stream *stream, 1553 unsigned int binning_fact) 1554 { 1555 struct ia_css_isp_parameters *params; 1556 1557 IA_CSS_ENTER_PRIVATE("void"); 1558 assert(stream); 1559 1560 params = stream->isp_params_configs; 1561 1562 if (params->sensor_binning != binning_fact) { 1563 params->sensor_binning = binning_fact; 1564 params->sc_table_changed = true; 1565 } 1566 1567 IA_CSS_LEAVE_PRIVATE("void"); 1568 1569 return params->sc_table_changed; 1570 } 1571 1572 static void 1573 sh_css_update_shading_table_status(struct ia_css_pipe *pipe, 1574 struct ia_css_isp_parameters *params) 1575 { 1576 if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { 1577 params->sc_table_dirty = true; 1578 params->sc_table_last_pipe_num = pipe->pipe_num; 1579 } 1580 } 1581 1582 static void 1583 sh_css_set_shading_table(struct ia_css_stream *stream, 1584 struct ia_css_isp_parameters *params, 1585 const struct ia_css_shading_table *table) 1586 { 1587 IA_CSS_ENTER_PRIVATE(""); 1588 if (!table) 1589 return; 1590 assert(stream); 1591 1592 if (!table->enable) 1593 table = NULL; 1594 1595 if ((table != params->sc_table) || params->sc_table_dirty) { 1596 params->sc_table = table; 1597 params->sc_table_changed = true; 1598 params->sc_table_dirty = false; 1599 /* Not very clean, this goes to sh_css.c to invalidate the 1600 * shading table for all pipes. Should replaced by a loop 1601 * and a pipe-specific call. 1602 */ 1603 if (!params->output_frame) 1604 sh_css_invalidate_shading_tables(stream); 1605 } 1606 1607 IA_CSS_LEAVE_PRIVATE("void"); 1608 } 1609 1610 void 1611 ia_css_params_store_ia_css_host_data( 1612 ia_css_ptr ddr_addr, 1613 struct ia_css_host_data *data) 1614 { 1615 assert(data); 1616 assert(data->address); 1617 assert(ddr_addr != mmgr_NULL); 1618 1619 IA_CSS_ENTER_PRIVATE(""); 1620 1621 hmm_store(ddr_addr, 1622 (void *)(data->address), 1623 (size_t)data->size); 1624 1625 IA_CSS_LEAVE_PRIVATE("void"); 1626 } 1627 1628 struct ia_css_host_data * 1629 ia_css_params_alloc_convert_sctbl( 1630 const struct ia_css_pipeline_stage *stage, 1631 const struct ia_css_shading_table *shading_table) 1632 { 1633 const struct ia_css_binary *binary = stage->binary; 1634 struct ia_css_host_data *sctbl; 1635 unsigned int i, j, aligned_width, row_padding; 1636 unsigned int sctbl_size; 1637 short int *ptr; 1638 1639 assert(binary); 1640 assert(shading_table); 1641 1642 IA_CSS_ENTER_PRIVATE(""); 1643 1644 if (!shading_table) { 1645 IA_CSS_LEAVE_PRIVATE("void"); 1646 return NULL; 1647 } 1648 1649 aligned_width = binary->sctbl_aligned_width_per_color; 1650 row_padding = aligned_width - shading_table->width; 1651 sctbl_size = shading_table->height * IA_CSS_SC_NUM_COLORS * aligned_width * 1652 sizeof(short); 1653 1654 sctbl = ia_css_host_data_allocate((size_t)sctbl_size); 1655 1656 if (!sctbl) 1657 return NULL; 1658 ptr = (short int *)sctbl->address; 1659 memset(ptr, 1660 0, 1661 sctbl_size); 1662 1663 for (i = 0; i < shading_table->height; i++) { 1664 for (j = 0; j < IA_CSS_SC_NUM_COLORS; j++) { 1665 memcpy(ptr, 1666 &shading_table->data[j] 1667 [i * shading_table->width], 1668 shading_table->width * sizeof(short)); 1669 ptr += aligned_width; 1670 } 1671 } 1672 1673 IA_CSS_LEAVE_PRIVATE("void"); 1674 return sctbl; 1675 } 1676 1677 enum ia_css_err ia_css_params_store_sctbl( 1678 const struct ia_css_pipeline_stage *stage, 1679 ia_css_ptr sc_tbl, 1680 const struct ia_css_shading_table *sc_config) 1681 { 1682 struct ia_css_host_data *isp_sc_tbl; 1683 1684 IA_CSS_ENTER_PRIVATE(""); 1685 1686 if (!sc_config) { 1687 IA_CSS_LEAVE_PRIVATE("void"); 1688 return IA_CSS_SUCCESS; 1689 } 1690 1691 isp_sc_tbl = ia_css_params_alloc_convert_sctbl(stage, sc_config); 1692 if (!isp_sc_tbl) { 1693 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 1694 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1695 } 1696 /* store the shading table to ddr */ 1697 ia_css_params_store_ia_css_host_data(sc_tbl, isp_sc_tbl); 1698 ia_css_host_data_free(isp_sc_tbl); 1699 1700 IA_CSS_LEAVE_PRIVATE("void"); 1701 1702 return IA_CSS_SUCCESS; 1703 } 1704 1705 static void 1706 sh_css_enable_pipeline(const struct ia_css_binary *binary) 1707 { 1708 if (!binary) 1709 return; 1710 1711 IA_CSS_ENTER_PRIVATE(""); 1712 1713 ia_css_isp_param_enable_pipeline(&binary->mem_params); 1714 1715 IA_CSS_LEAVE_PRIVATE("void"); 1716 } 1717 1718 static enum ia_css_err 1719 ia_css_process_zoom_and_motion( 1720 struct ia_css_isp_parameters *params, 1721 const struct ia_css_pipeline_stage *first_stage) { 1722 /* first_stage can be NULL */ 1723 const struct ia_css_pipeline_stage *stage; 1724 enum ia_css_err err = IA_CSS_SUCCESS; 1725 struct ia_css_resolution pipe_in_res; 1726 1727 pipe_in_res.width = 0; 1728 pipe_in_res.height = 0; 1729 1730 assert(params); 1731 1732 IA_CSS_ENTER_PRIVATE(""); 1733 1734 /* Go through all stages to udate uds and cropping */ 1735 for (stage = first_stage; stage; stage = stage->next) 1736 { 1737 struct ia_css_binary *binary; 1738 /* note: the var below is made static as it is quite large; 1739 if it is not static it ends up on the stack which could 1740 cause issues for drivers 1741 */ 1742 static struct ia_css_binary tmp_binary; 1743 1744 const struct ia_css_binary_xinfo *info = NULL; 1745 1746 binary = stage->binary; 1747 if (binary) { 1748 info = binary->info; 1749 } else { 1750 const struct sh_css_binary_args *args = &stage->args; 1751 const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; 1752 1753 if (args->out_frame[0]) 1754 out_infos[0] = &args->out_frame[0]->info; 1755 info = &stage->firmware->info.isp; 1756 ia_css_binary_fill_info(info, false, false, 1757 ATOMISP_INPUT_FORMAT_RAW_10, 1758 args->in_frame ? &args->in_frame->info : NULL, 1759 NULL, 1760 out_infos, 1761 args->out_vf_frame ? &args->out_vf_frame->info 1762 : NULL, 1763 &tmp_binary, 1764 NULL, 1765 -1, true); 1766 binary = &tmp_binary; 1767 binary->info = info; 1768 } 1769 1770 if (stage == first_stage) { 1771 /* we will use pipe_in_res to scale the zoom crop region if needed */ 1772 pipe_in_res = binary->effective_in_frame_res; 1773 } 1774 1775 assert(stage->stage_num < SH_CSS_MAX_STAGES); 1776 if (params->dz_config.zoom_region.resolution.width == 0 && 1777 params->dz_config.zoom_region.resolution.height == 0) { 1778 sh_css_update_uds_and_crop_info( 1779 &info->sp, 1780 &binary->in_frame_info, 1781 &binary->out_frame_info[0], 1782 &binary->dvs_envelope, 1783 ¶ms->dz_config, 1784 ¶ms->motion_config, 1785 ¶ms->uds[stage->stage_num].uds, 1786 ¶ms->uds[stage->stage_num].crop_pos, 1787 stage->enable_zoom); 1788 } else { 1789 err = sh_css_update_uds_and_crop_info_based_on_zoom_region( 1790 &info->sp, 1791 &binary->in_frame_info, 1792 &binary->out_frame_info[0], 1793 &binary->dvs_envelope, 1794 ¶ms->dz_config, 1795 ¶ms->motion_config, 1796 ¶ms->uds[stage->stage_num].uds, 1797 ¶ms->uds[stage->stage_num].crop_pos, 1798 pipe_in_res, 1799 stage->enable_zoom); 1800 if (err != IA_CSS_SUCCESS) 1801 return err; 1802 } 1803 } 1804 params->isp_params_changed = true; 1805 1806 IA_CSS_LEAVE_PRIVATE("void"); 1807 return err; 1808 } 1809 1810 static void 1811 sh_css_set_gamma_table(struct ia_css_isp_parameters *params, 1812 const struct ia_css_gamma_table *table) 1813 { 1814 if (!table) 1815 return; 1816 IA_CSS_ENTER_PRIVATE("table=%p", table); 1817 1818 assert(params); 1819 params->gc_table = *table; 1820 params->config_changed[IA_CSS_GC_ID] = true; 1821 1822 IA_CSS_LEAVE_PRIVATE("void"); 1823 } 1824 1825 static void 1826 sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, 1827 struct ia_css_gamma_table *table) 1828 { 1829 if (!table) 1830 return; 1831 IA_CSS_ENTER_PRIVATE("table=%p", table); 1832 1833 assert(params); 1834 *table = params->gc_table; 1835 1836 IA_CSS_LEAVE_PRIVATE("void"); 1837 } 1838 1839 static void 1840 sh_css_set_ctc_table(struct ia_css_isp_parameters *params, 1841 const struct ia_css_ctc_table *table) 1842 { 1843 if (!table) 1844 return; 1845 1846 IA_CSS_ENTER_PRIVATE("table=%p", table); 1847 1848 assert(params); 1849 params->ctc_table = *table; 1850 params->config_changed[IA_CSS_CTC_ID] = true; 1851 1852 IA_CSS_LEAVE_PRIVATE("void"); 1853 } 1854 1855 static void 1856 sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, 1857 struct ia_css_ctc_table *table) 1858 { 1859 if (!table) 1860 return; 1861 1862 IA_CSS_ENTER_PRIVATE("table=%p", table); 1863 1864 assert(params); 1865 *table = params->ctc_table; 1866 1867 IA_CSS_LEAVE_PRIVATE("void"); 1868 } 1869 1870 static void 1871 sh_css_set_macc_table(struct ia_css_isp_parameters *params, 1872 const struct ia_css_macc_table *table) 1873 { 1874 if (!table) 1875 return; 1876 1877 IA_CSS_ENTER_PRIVATE("table=%p", table); 1878 1879 assert(params); 1880 params->macc_table = *table; 1881 params->config_changed[IA_CSS_MACC_ID] = true; 1882 1883 IA_CSS_LEAVE_PRIVATE("void"); 1884 } 1885 1886 static void 1887 sh_css_get_macc_table(const struct ia_css_isp_parameters *params, 1888 struct ia_css_macc_table *table) 1889 { 1890 if (!table) 1891 return; 1892 1893 IA_CSS_ENTER_PRIVATE("table=%p", table); 1894 1895 assert(params); 1896 *table = params->macc_table; 1897 1898 IA_CSS_LEAVE_PRIVATE("void"); 1899 } 1900 1901 void ia_css_morph_table_free( 1902 struct ia_css_morph_table *me) 1903 { 1904 unsigned int i; 1905 1906 if (!me) 1907 return; 1908 1909 IA_CSS_ENTER(""); 1910 1911 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1912 if (me->coordinates_x[i]) { 1913 sh_css_free(me->coordinates_x[i]); 1914 me->coordinates_x[i] = NULL; 1915 } 1916 if (me->coordinates_y[i]) { 1917 sh_css_free(me->coordinates_y[i]); 1918 me->coordinates_y[i] = NULL; 1919 } 1920 } 1921 1922 sh_css_free(me); 1923 IA_CSS_LEAVE("void"); 1924 } 1925 1926 struct ia_css_morph_table *ia_css_morph_table_allocate( 1927 unsigned int width, 1928 unsigned int height) 1929 { 1930 unsigned int i; 1931 struct ia_css_morph_table *me; 1932 1933 IA_CSS_ENTER(""); 1934 1935 me = sh_css_malloc(sizeof(*me)); 1936 if (!me) { 1937 IA_CSS_ERROR("out of memory"); 1938 return me; 1939 } 1940 1941 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1942 me->coordinates_x[i] = NULL; 1943 me->coordinates_y[i] = NULL; 1944 } 1945 1946 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1947 me->coordinates_x[i] = 1948 sh_css_malloc(height * width * 1949 sizeof(*me->coordinates_x[i])); 1950 me->coordinates_y[i] = 1951 sh_css_malloc(height * width * 1952 sizeof(*me->coordinates_y[i])); 1953 1954 if ((!me->coordinates_x[i]) || 1955 (!me->coordinates_y[i])) { 1956 ia_css_morph_table_free(me); 1957 me = NULL; 1958 return me; 1959 } 1960 } 1961 me->width = width; 1962 me->height = height; 1963 IA_CSS_LEAVE(""); 1964 return me; 1965 } 1966 1967 static enum ia_css_err sh_css_params_default_morph_table( 1968 struct ia_css_morph_table **table, 1969 const struct ia_css_binary *binary) 1970 { 1971 /* MW 2400 advanced requires different scaling */ 1972 unsigned int i, j, k, step, width, height; 1973 short start_x[IA_CSS_MORPH_TABLE_NUM_PLANES] = { -8, 0, -8, 0, 0, -8 }, 1974 start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; 1975 struct ia_css_morph_table *tab; 1976 1977 assert(table); 1978 assert(binary); 1979 1980 IA_CSS_ENTER_PRIVATE(""); 1981 1982 step = (ISP_VEC_NELEMS / 16) * 128, 1983 width = binary->morph_tbl_width, 1984 height = binary->morph_tbl_height; 1985 1986 tab = ia_css_morph_table_allocate(width, height); 1987 if (!tab) 1988 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 1989 1990 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 1991 short val_y = start_y[i]; 1992 1993 for (j = 0; j < height; j++) { 1994 short val_x = start_x[i]; 1995 unsigned short *x_ptr, *y_ptr; 1996 1997 x_ptr = &tab->coordinates_x[i][j * width]; 1998 y_ptr = &tab->coordinates_y[i][j * width]; 1999 for (k = 0; k < width; 2000 k++, x_ptr++, y_ptr++, val_x += (short)step) { 2001 if (k == 0) 2002 *x_ptr = 0; 2003 else if (k == width - 1) 2004 *x_ptr = val_x + 2 * start_x[i]; 2005 else 2006 *x_ptr = val_x; 2007 if (j == 0) 2008 *y_ptr = 0; 2009 else 2010 *y_ptr = val_y; 2011 } 2012 val_y += (short)step; 2013 } 2014 } 2015 *table = tab; 2016 2017 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 2018 2019 return IA_CSS_SUCCESS; 2020 } 2021 2022 static void 2023 sh_css_set_morph_table(struct ia_css_isp_parameters *params, 2024 const struct ia_css_morph_table *table) 2025 { 2026 if (!table) 2027 return; 2028 2029 IA_CSS_ENTER_PRIVATE("table=%p", table); 2030 2031 assert(params); 2032 if (table->enable == false) 2033 table = NULL; 2034 params->morph_table = table; 2035 params->morph_table_changed = true; 2036 IA_CSS_LEAVE_PRIVATE("void"); 2037 } 2038 2039 void 2040 ia_css_translate_3a_statistics( 2041 struct ia_css_3a_statistics *host_stats, 2042 const struct ia_css_isp_3a_statistics_map *isp_stats) 2043 { 2044 IA_CSS_ENTER(""); 2045 if (host_stats->grid.use_dmem) { 2046 IA_CSS_LOG("3A: DMEM"); 2047 ia_css_s3a_dmem_decode(host_stats, isp_stats->dmem_stats); 2048 } else { 2049 IA_CSS_LOG("3A: VMEM"); 2050 ia_css_s3a_vmem_decode(host_stats, isp_stats->vmem_stats_hi, 2051 isp_stats->vmem_stats_lo); 2052 } 2053 #if !defined(HAS_NO_HMEM) 2054 IA_CSS_LOG("3A: HMEM"); 2055 ia_css_s3a_hmem_decode(host_stats, isp_stats->hmem_stats); 2056 #endif 2057 2058 IA_CSS_LEAVE("void"); 2059 } 2060 2061 void 2062 ia_css_isp_3a_statistics_map_free(struct ia_css_isp_3a_statistics_map *me) 2063 { 2064 if (me) { 2065 if (me->data_allocated) { 2066 sh_css_free(me->data_ptr); 2067 me->data_ptr = NULL; 2068 me->data_allocated = false; 2069 } 2070 sh_css_free(me); 2071 } 2072 } 2073 2074 struct ia_css_isp_3a_statistics_map * 2075 ia_css_isp_3a_statistics_map_allocate( 2076 const struct ia_css_isp_3a_statistics *isp_stats, 2077 void *data_ptr) 2078 { 2079 struct ia_css_isp_3a_statistics_map *me; 2080 /* Windows compiler does not like adding sizes to a void * 2081 * so we use a local char * instead. */ 2082 char *base_ptr; 2083 2084 me = sh_css_malloc(sizeof(*me)); 2085 if (!me) { 2086 IA_CSS_LEAVE("cannot allocate memory"); 2087 goto err; 2088 } 2089 2090 me->data_ptr = data_ptr; 2091 me->data_allocated = !data_ptr; 2092 if (!data_ptr) { 2093 me->data_ptr = sh_css_malloc(isp_stats->size); 2094 if (!me->data_ptr) { 2095 IA_CSS_LEAVE("cannot allocate memory"); 2096 goto err; 2097 } 2098 } 2099 base_ptr = me->data_ptr; 2100 2101 me->size = isp_stats->size; 2102 /* GCC complains when we assign a char * to a void *, so these 2103 * casts are necessary unfortunately. */ 2104 me->dmem_stats = (void *)base_ptr; 2105 me->vmem_stats_hi = (void *)(base_ptr + isp_stats->dmem_size); 2106 me->vmem_stats_lo = (void *)(base_ptr + isp_stats->dmem_size + 2107 isp_stats->vmem_size); 2108 me->hmem_stats = (void *)(base_ptr + isp_stats->dmem_size + 2109 2 * isp_stats->vmem_size); 2110 2111 IA_CSS_LEAVE("map=%p", me); 2112 return me; 2113 2114 err: 2115 if (me) 2116 sh_css_free(me); 2117 return NULL; 2118 } 2119 2120 enum ia_css_err 2121 ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, 2122 const struct ia_css_isp_3a_statistics *isp_stats) { 2123 struct ia_css_isp_3a_statistics_map *map; 2124 enum ia_css_err ret = IA_CSS_SUCCESS; 2125 2126 IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); 2127 2128 assert(host_stats); 2129 assert(isp_stats); 2130 2131 map = ia_css_isp_3a_statistics_map_allocate(isp_stats, NULL); 2132 if (map) 2133 { 2134 hmm_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); 2135 ia_css_translate_3a_statistics(host_stats, map); 2136 ia_css_isp_3a_statistics_map_free(map); 2137 } else 2138 { 2139 IA_CSS_ERROR("out of memory"); 2140 ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2141 } 2142 2143 IA_CSS_LEAVE_ERR(ret); 2144 return ret; 2145 } 2146 2147 /* Parameter encoding is not yet orthogonal. 2148 This function hnadles some of the exceptions. 2149 */ 2150 static void 2151 ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, 2152 struct ia_css_isp_parameters *params) 2153 { 2154 assert(params); 2155 2156 /* Copy also to DP. Should be done by the driver. */ 2157 params->dp_config.gr = params->wb_config.gr; 2158 params->dp_config.r = params->wb_config.r; 2159 params->dp_config.b = params->wb_config.b; 2160 params->dp_config.gb = params->wb_config.gb; 2161 2162 if (atomisp_hw_is_isp2401) { 2163 assert(pipe); 2164 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2165 2166 if (pipe->mode < IA_CSS_PIPE_ID_NUM) { 2167 params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; 2168 params->pipe_dp_config[pipe->mode].r = params->wb_config.r; 2169 params->pipe_dp_config[pipe->mode].b = params->wb_config.b; 2170 params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; 2171 } 2172 } 2173 } 2174 2175 /* ISP2401 */ 2176 static void 2177 sh_css_set_dp_config(const struct ia_css_pipe *pipe, 2178 struct ia_css_isp_parameters *params, 2179 const struct ia_css_dp_config *config) 2180 { 2181 if (!config) 2182 return; 2183 2184 assert(params); 2185 assert(pipe); 2186 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2187 2188 IA_CSS_ENTER_PRIVATE("config=%p", config); 2189 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2190 if (pipe->mode < IA_CSS_PIPE_ID_NUM) { 2191 params->pipe_dp_config[pipe->mode] = *config; 2192 params->pipe_dpc_config_changed[pipe->mode] = true; 2193 } 2194 IA_CSS_LEAVE_PRIVATE("void"); 2195 } 2196 2197 static void 2198 sh_css_get_dp_config(const struct ia_css_pipe *pipe, 2199 const struct ia_css_isp_parameters *params, 2200 struct ia_css_dp_config *config) 2201 { 2202 if (!config) 2203 return; 2204 2205 assert(params); 2206 assert(pipe); 2207 IA_CSS_ENTER_PRIVATE("config=%p", config); 2208 2209 *config = params->pipe_dp_config[pipe->mode]; 2210 2211 IA_CSS_LEAVE_PRIVATE("void"); 2212 } 2213 2214 static void 2215 sh_css_set_nr_config(struct ia_css_isp_parameters *params, 2216 const struct ia_css_nr_config *config) 2217 { 2218 if (!config) 2219 return; 2220 assert(params); 2221 2222 IA_CSS_ENTER_PRIVATE("config=%p", config); 2223 2224 ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2225 params->nr_config = *config; 2226 params->yee_config.nr = *config; 2227 params->config_changed[IA_CSS_NR_ID] = true; 2228 params->config_changed[IA_CSS_YEE_ID] = true; 2229 params->config_changed[IA_CSS_BNR_ID] = true; 2230 2231 IA_CSS_LEAVE_PRIVATE("void"); 2232 } 2233 2234 static void 2235 sh_css_set_ee_config(struct ia_css_isp_parameters *params, 2236 const struct ia_css_ee_config *config) 2237 { 2238 if (!config) 2239 return; 2240 assert(params); 2241 2242 IA_CSS_ENTER_PRIVATE("config=%p", config); 2243 ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2244 2245 params->ee_config = *config; 2246 params->yee_config.ee = *config; 2247 params->config_changed[IA_CSS_YEE_ID] = true; 2248 2249 IA_CSS_LEAVE_PRIVATE("void"); 2250 } 2251 2252 static void 2253 sh_css_get_ee_config(const struct ia_css_isp_parameters *params, 2254 struct ia_css_ee_config *config) 2255 { 2256 if (!config) 2257 return; 2258 2259 IA_CSS_ENTER_PRIVATE("config=%p", config); 2260 2261 assert(params); 2262 *config = params->ee_config; 2263 2264 ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); 2265 IA_CSS_LEAVE_PRIVATE("void"); 2266 } 2267 2268 static void 2269 sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, 2270 struct ia_css_isp_parameters *params, 2271 const struct ia_css_dvs_6axis_config *dvs_config) 2272 { 2273 if (!dvs_config) 2274 return; 2275 assert(params); 2276 assert(pipe); 2277 assert(dvs_config->height_y == dvs_config->height_uv); 2278 assert((dvs_config->width_y - 1) == 2 * (dvs_config->width_uv - 1)); 2279 assert(pipe->mode < IA_CSS_PIPE_ID_NUM); 2280 2281 IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); 2282 2283 copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config); 2284 2285 #if !defined(HAS_NO_DVS_6AXIS_CONFIG_UPDATE) 2286 params->pipe_dvs_6axis_config_changed[pipe->mode] = true; 2287 #endif 2288 2289 IA_CSS_LEAVE_PRIVATE("void"); 2290 } 2291 2292 static void 2293 sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, 2294 const struct ia_css_isp_parameters *params, 2295 struct ia_css_dvs_6axis_config *dvs_config) 2296 { 2297 if (!dvs_config) 2298 return; 2299 assert(params); 2300 assert(pipe); 2301 assert(dvs_config->height_y == dvs_config->height_uv); 2302 assert((dvs_config->width_y - 1) == 2 * dvs_config->width_uv - 1); 2303 2304 IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); 2305 2306 if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && 2307 (dvs_config->width_y == params->pipe_dvs_6axis_config[pipe->mode]->width_y) && 2308 (dvs_config->height_y == params->pipe_dvs_6axis_config[pipe->mode]->height_y) && 2309 (dvs_config->width_uv == params->pipe_dvs_6axis_config[pipe->mode]->width_uv) && 2310 (dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv) 2311 && 2312 dvs_config->xcoords_y && 2313 dvs_config->ycoords_y && 2314 dvs_config->xcoords_uv && 2315 dvs_config->ycoords_uv) { 2316 copy_dvs_6axis_table(dvs_config, params->pipe_dvs_6axis_config[pipe->mode]); 2317 } 2318 2319 IA_CSS_LEAVE_PRIVATE("void"); 2320 } 2321 2322 static void 2323 sh_css_set_baa_config(struct ia_css_isp_parameters *params, 2324 const struct ia_css_aa_config *config) 2325 { 2326 if (!config) 2327 return; 2328 assert(params); 2329 2330 IA_CSS_ENTER_PRIVATE("config=%p", config); 2331 2332 params->bds_config = *config; 2333 params->config_changed[IA_CSS_BDS_ID] = true; 2334 2335 IA_CSS_LEAVE_PRIVATE("void"); 2336 } 2337 2338 static void 2339 sh_css_get_baa_config(const struct ia_css_isp_parameters *params, 2340 struct ia_css_aa_config *config) 2341 { 2342 if (!config) 2343 return; 2344 assert(params); 2345 2346 IA_CSS_ENTER_PRIVATE("config=%p", config); 2347 2348 *config = params->bds_config; 2349 2350 IA_CSS_LEAVE_PRIVATE("void"); 2351 } 2352 2353 static void 2354 sh_css_set_dz_config(struct ia_css_isp_parameters *params, 2355 const struct ia_css_dz_config *config) 2356 { 2357 if (!config) 2358 return; 2359 assert(params); 2360 2361 IA_CSS_ENTER_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); 2362 2363 assert(config->dx <= HRT_GDC_N); 2364 assert(config->dy <= HRT_GDC_N); 2365 2366 params->dz_config = *config; 2367 params->dz_config_changed = true; 2368 /* JK: Why isp params changed?? */ 2369 params->isp_params_changed = true; 2370 2371 IA_CSS_LEAVE_PRIVATE("void"); 2372 } 2373 2374 static void 2375 sh_css_get_dz_config(const struct ia_css_isp_parameters *params, 2376 struct ia_css_dz_config *config) 2377 { 2378 if (!config) 2379 return; 2380 assert(params); 2381 2382 IA_CSS_ENTER_PRIVATE("config=%p", config); 2383 2384 *config = params->dz_config; 2385 2386 IA_CSS_LEAVE_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); 2387 } 2388 2389 static void 2390 sh_css_set_motion_vector(struct ia_css_isp_parameters *params, 2391 const struct ia_css_vector *motion) 2392 { 2393 if (!motion) 2394 return; 2395 assert(params); 2396 2397 IA_CSS_ENTER_PRIVATE("x=%d, y=%d", motion->x, motion->y); 2398 2399 params->motion_config = *motion; 2400 /* JK: Why do isp params change? */ 2401 params->motion_config_changed = true; 2402 params->isp_params_changed = true; 2403 2404 IA_CSS_LEAVE_PRIVATE("void"); 2405 } 2406 2407 static void 2408 sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, 2409 struct ia_css_vector *motion) 2410 { 2411 if (!motion) 2412 return; 2413 assert(params); 2414 2415 IA_CSS_ENTER_PRIVATE("motion=%p", motion); 2416 2417 *motion = params->motion_config; 2418 2419 IA_CSS_LEAVE_PRIVATE("x=%d, y=%d", motion->x, motion->y); 2420 } 2421 2422 struct ia_css_isp_config * 2423 sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) 2424 { 2425 if (!pipe) { 2426 IA_CSS_ERROR("pipe=%p", NULL); 2427 return NULL; 2428 } 2429 return pipe->config.p_isp_config; 2430 } 2431 2432 enum ia_css_err 2433 ia_css_stream_set_isp_config( 2434 struct ia_css_stream *stream, 2435 const struct ia_css_isp_config *config) { 2436 return ia_css_stream_set_isp_config_on_pipe(stream, config, NULL); 2437 } 2438 2439 enum ia_css_err 2440 ia_css_stream_set_isp_config_on_pipe( 2441 struct ia_css_stream *stream, 2442 const struct ia_css_isp_config *config, 2443 struct ia_css_pipe *pipe) { 2444 enum ia_css_err err = IA_CSS_SUCCESS; 2445 2446 if ((!stream) || (!config)) 2447 return IA_CSS_ERR_INVALID_ARGUMENTS; 2448 2449 IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); 2450 2451 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2452 if (config->output_frame) 2453 err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe); 2454 else 2455 #endif 2456 err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe); 2457 2458 IA_CSS_LEAVE_ERR(err); 2459 return err; 2460 } 2461 2462 enum ia_css_err 2463 ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, 2464 struct ia_css_isp_config *config) { 2465 struct ia_css_pipe *pipe_in = pipe; 2466 enum ia_css_err err = IA_CSS_SUCCESS; 2467 2468 IA_CSS_ENTER("pipe=%p", pipe); 2469 2470 if ((!pipe) || (!pipe->stream)) 2471 return IA_CSS_ERR_INVALID_ARGUMENTS; 2472 2473 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); 2474 2475 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2476 if (config->output_frame) 2477 err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe); 2478 else 2479 #endif 2480 err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in); 2481 IA_CSS_LEAVE_ERR(err); 2482 return err; 2483 } 2484 2485 static enum ia_css_err 2486 sh_css_set_global_isp_config_on_pipe( 2487 struct ia_css_pipe *curr_pipe, 2488 const struct ia_css_isp_config *config, 2489 struct ia_css_pipe *pipe) { 2490 enum ia_css_err err = IA_CSS_SUCCESS; 2491 enum ia_css_err err1 = IA_CSS_SUCCESS; 2492 enum ia_css_err err2 = IA_CSS_SUCCESS; 2493 2494 IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", curr_pipe, config, pipe); 2495 2496 err1 = sh_css_init_isp_params_from_config(curr_pipe, curr_pipe->stream->isp_params_configs, config, pipe); 2497 2498 /* Now commit all changes to the SP */ 2499 err2 = sh_css_param_update_isp_params(curr_pipe, curr_pipe->stream->isp_params_configs, sh_css_sp_is_running(), pipe); 2500 2501 /* The following code is intentional. The sh_css_init_isp_params_from_config interface 2502 * throws an error when both DPC and BDS is enabled. The CSS API must pass this error 2503 * information to the caller, ie. the host. We do not return this error immediately, 2504 * but instead continue with updating the ISP params to enable testing of features 2505 * which are currently in TR phase. */ 2506 2507 err = (err1 != IA_CSS_SUCCESS) ? err1 : ((err2 != IA_CSS_SUCCESS) ? err2 : err); 2508 2509 IA_CSS_LEAVE_ERR_PRIVATE(err); 2510 return err; 2511 } 2512 2513 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 2514 static enum ia_css_err 2515 sh_css_set_per_frame_isp_config_on_pipe( 2516 struct ia_css_stream *stream, 2517 const struct ia_css_isp_config *config, 2518 struct ia_css_pipe *pipe) { 2519 unsigned int i; 2520 bool per_frame_config_created = false; 2521 enum ia_css_err err = IA_CSS_SUCCESS; 2522 enum ia_css_err err1 = IA_CSS_SUCCESS; 2523 enum ia_css_err err2 = IA_CSS_SUCCESS; 2524 enum ia_css_err err3 = IA_CSS_SUCCESS; 2525 2526 struct sh_css_ddr_address_map *ddr_ptrs; 2527 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2528 struct ia_css_isp_parameters *params; 2529 2530 IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", stream, config, pipe); 2531 2532 if (!pipe) 2533 { 2534 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2535 goto exit; 2536 } 2537 2538 /* create per-frame ISP params object with default values 2539 * from stream->isp_params_configs if one doesn't already exist 2540 */ 2541 if (!stream->per_frame_isp_params_configs) 2542 { 2543 err = sh_css_create_isp_params(stream, 2544 &stream->per_frame_isp_params_configs); 2545 if (err != IA_CSS_SUCCESS) 2546 goto exit; 2547 per_frame_config_created = true; 2548 } 2549 2550 params = stream->per_frame_isp_params_configs; 2551 2552 /* update new ISP params object with the new config */ 2553 if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) 2554 { 2555 err1 = IA_CSS_ERR_INVALID_ARGUMENTS; 2556 } 2557 2558 err2 = sh_css_init_isp_params_from_config(stream->pipes[0], params, config, pipe); 2559 2560 if (per_frame_config_created) 2561 { 2562 ddr_ptrs = ¶ms->ddr_ptrs; 2563 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 2564 /* create per pipe reference to general ddr_ptrs */ 2565 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 2566 ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); 2567 params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; 2568 } 2569 } 2570 2571 /* now commit to ddr */ 2572 err3 = sh_css_param_update_isp_params(stream->pipes[0], params, sh_css_sp_is_running(), pipe); 2573 2574 /* The following code is intentional. The sh_css_init_sp_params_from_config and 2575 * sh_css_init_isp_params_from_config throws an error when both DPC and BDS is enabled. 2576 * The CSS API must pass this error information to the caller, ie. the host. 2577 * We do not return this error immediately, but instead continue with updating the ISP params 2578 * to enable testing of features which are currently in TR phase. */ 2579 err = (err1 != IA_CSS_SUCCESS) ? err1 : 2580 (err2 != IA_CSS_SUCCESS) ? err2 : 2581 (err3 != IA_CSS_SUCCESS) ? err3 : err; 2582 exit: 2583 IA_CSS_LEAVE_ERR_PRIVATE(err); 2584 return err; 2585 } 2586 #endif 2587 2588 static enum ia_css_err 2589 sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, 2590 struct ia_css_isp_parameters *params, 2591 const struct ia_css_isp_config *config, 2592 struct ia_css_pipe *pipe_in) { 2593 enum ia_css_err err = IA_CSS_SUCCESS; 2594 bool is_dp_10bpp = true; 2595 2596 assert(pipe); 2597 2598 IA_CSS_ENTER_PRIVATE("pipe=%p, config=%p, params=%p", pipe, config, params); 2599 2600 ia_css_set_configs(params, config); 2601 2602 sh_css_set_nr_config(params, config->nr_config); 2603 sh_css_set_ee_config(params, config->ee_config); 2604 sh_css_set_baa_config(params, config->baa_config); 2605 if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && 2606 (params->pipe_dvs_6axis_config[pipe->mode])) 2607 sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); 2608 sh_css_set_dz_config(params, config->dz_config); 2609 sh_css_set_motion_vector(params, config->motion_vector); 2610 sh_css_update_shading_table_status(pipe_in, params); 2611 sh_css_set_shading_table(pipe->stream, params, config->shading_table); 2612 sh_css_set_morph_table(params, config->morph_table); 2613 sh_css_set_macc_table(params, config->macc_table); 2614 sh_css_set_gamma_table(params, config->gamma_table); 2615 sh_css_set_ctc_table(params, config->ctc_table); 2616 /* ------ deprecated(bz675) : from ------ */ 2617 sh_css_set_shading_settings(params, config->shading_settings); 2618 /* ------ deprecated(bz675) : to ------ */ 2619 2620 params->dis_coef_table_changed = (config->dvs_coefs); 2621 params->dvs2_coef_table_changed = (config->dvs2_coefs); 2622 2623 params->output_frame = config->output_frame; 2624 params->isp_parameters_id = config->isp_config_id; 2625 2626 /* Currently we do not offer CSS interface to set different 2627 * configurations for DPC, i.e. depending on DPC being enabled 2628 * before (NORM+OBC) or after. The folllowing code to set the 2629 * DPC configuration should be updated when this interface is made 2630 * available */ 2631 if (atomisp_hw_is_isp2401) { 2632 sh_css_set_dp_config(pipe, params, config->dp_config); 2633 ia_css_set_param_exceptions(pipe, params); 2634 } 2635 2636 if (IA_CSS_SUCCESS == 2637 sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) 2638 { 2639 /* return an error when both DPC and BDS is enabled by the 2640 * user. */ 2641 /* we do not exit from this point immediately to allow internal 2642 * firmware feature testing. */ 2643 if (is_dp_10bpp) { 2644 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2645 } 2646 } else 2647 { 2648 err = IA_CSS_ERR_INTERNAL_ERROR; 2649 goto exit; 2650 } 2651 2652 if (!atomisp_hw_is_isp2401) 2653 ia_css_set_param_exceptions(pipe, params); 2654 2655 exit: 2656 IA_CSS_LEAVE_ERR_PRIVATE(err); 2657 return err; 2658 } 2659 2660 void 2661 ia_css_stream_get_isp_config( 2662 const struct ia_css_stream *stream, 2663 struct ia_css_isp_config *config) 2664 { 2665 IA_CSS_ENTER("void"); 2666 ia_css_pipe_get_isp_config(stream->pipes[0], config); 2667 IA_CSS_LEAVE("void"); 2668 } 2669 2670 void 2671 ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, 2672 struct ia_css_isp_config *config) 2673 { 2674 struct ia_css_isp_parameters *params = NULL; 2675 2676 assert(config); 2677 2678 IA_CSS_ENTER("config=%p", config); 2679 2680 params = pipe->stream->isp_params_configs; 2681 assert(params); 2682 2683 ia_css_get_configs(params, config); 2684 2685 sh_css_get_ee_config(params, config->ee_config); 2686 sh_css_get_baa_config(params, config->baa_config); 2687 sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); 2688 sh_css_get_dp_config(pipe, params, config->dp_config); 2689 sh_css_get_macc_table(params, config->macc_table); 2690 sh_css_get_gamma_table(params, config->gamma_table); 2691 sh_css_get_ctc_table(params, config->ctc_table); 2692 sh_css_get_dz_config(params, config->dz_config); 2693 sh_css_get_motion_vector(params, config->motion_vector); 2694 /* ------ deprecated(bz675) : from ------ */ 2695 sh_css_get_shading_settings(params, config->shading_settings); 2696 /* ------ deprecated(bz675) : to ------ */ 2697 2698 config->output_frame = params->output_frame; 2699 config->isp_config_id = params->isp_parameters_id; 2700 2701 IA_CSS_LEAVE("void"); 2702 } 2703 2704 /* 2705 * coding style says the return of "mmgr_NULL" is the error signal 2706 * 2707 * Deprecated: Implement mmgr_realloc() 2708 */ 2709 static bool realloc_isp_css_mm_buf( 2710 ia_css_ptr *curr_buf, 2711 size_t *curr_size, 2712 size_t needed_size, 2713 bool force, 2714 enum ia_css_err *err, 2715 uint16_t mmgr_attribute) 2716 { 2717 s32 id; 2718 2719 *err = IA_CSS_SUCCESS; 2720 /* Possible optimization: add a function sh_css_isp_css_mm_realloc() 2721 * and implement on top of hmm. */ 2722 2723 IA_CSS_ENTER_PRIVATE("void"); 2724 2725 if (!force && *curr_size >= needed_size) { 2726 IA_CSS_LEAVE_PRIVATE("false"); 2727 return false; 2728 } 2729 /* don't reallocate if single ref to buffer and same size */ 2730 if (*curr_size == needed_size && ia_css_refcount_is_single(*curr_buf)) { 2731 IA_CSS_LEAVE_PRIVATE("false"); 2732 return false; 2733 } 2734 2735 id = IA_CSS_REFCOUNT_PARAM_BUFFER; 2736 ia_css_refcount_decrement(id, *curr_buf); 2737 *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, 2738 mmgr_attribute)); 2739 2740 if (!*curr_buf) { 2741 *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2742 *curr_size = 0; 2743 } else { 2744 *curr_size = needed_size; 2745 } 2746 IA_CSS_LEAVE_PRIVATE("true"); 2747 return true; 2748 } 2749 2750 static bool reallocate_buffer( 2751 ia_css_ptr *curr_buf, 2752 size_t *curr_size, 2753 size_t needed_size, 2754 bool force, 2755 enum ia_css_err *err) 2756 { 2757 bool ret; 2758 2759 IA_CSS_ENTER_PRIVATE("void"); 2760 2761 ret = realloc_isp_css_mm_buf(curr_buf, 2762 curr_size, needed_size, force, err, 0); 2763 2764 IA_CSS_LEAVE_PRIVATE("ret=%d", ret); 2765 return ret; 2766 } 2767 2768 struct ia_css_isp_3a_statistics * 2769 ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) 2770 { 2771 struct ia_css_isp_3a_statistics *me; 2772 2773 IA_CSS_ENTER("grid=%p", grid); 2774 2775 assert(grid); 2776 2777 /* MW: Does "grid->enable" also control the histogram output ?? */ 2778 if (!grid->enable) 2779 return NULL; 2780 2781 me = sh_css_calloc(1, sizeof(*me)); 2782 if (!me) 2783 goto err; 2784 2785 if (grid->use_dmem) { 2786 me->dmem_size = sizeof(struct ia_css_3a_output) * 2787 grid->aligned_width * 2788 grid->aligned_height; 2789 } else { 2790 me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * 2791 grid->aligned_height; 2792 } 2793 #if !defined(HAS_NO_HMEM) 2794 me->hmem_size = sizeof_hmem(HMEM0_ID); 2795 #endif 2796 2797 /* All subsections need to be aligned to the system bus width */ 2798 me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); 2799 me->vmem_size = CEIL_MUL(me->vmem_size, HIVE_ISP_DDR_WORD_BYTES); 2800 me->hmem_size = CEIL_MUL(me->hmem_size, HIVE_ISP_DDR_WORD_BYTES); 2801 2802 me->size = me->dmem_size + me->vmem_size * 2 + me->hmem_size; 2803 me->data_ptr = mmgr_alloc_attr(me->size, 0); 2804 if (me->data_ptr == mmgr_NULL) { 2805 sh_css_free(me); 2806 me = NULL; 2807 goto err; 2808 } 2809 if (me->dmem_size) 2810 me->data.dmem.s3a_tbl = me->data_ptr; 2811 if (me->vmem_size) { 2812 me->data.vmem.s3a_tbl_hi = me->data_ptr + me->dmem_size; 2813 me->data.vmem.s3a_tbl_lo = me->data_ptr + me->dmem_size + me->vmem_size; 2814 } 2815 if (me->hmem_size) 2816 me->data_hmem.rgby_tbl = me->data_ptr + me->dmem_size + 2 * me->vmem_size; 2817 2818 err: 2819 IA_CSS_LEAVE("return=%p", me); 2820 return me; 2821 } 2822 2823 void 2824 ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me) 2825 { 2826 if (me) { 2827 hmm_free(me->data_ptr); 2828 sh_css_free(me); 2829 } 2830 } 2831 2832 struct ia_css_isp_skc_dvs_statistics *ia_css_skc_dvs_statistics_allocate(void) 2833 { 2834 return NULL; 2835 } 2836 2837 struct ia_css_metadata * 2838 ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info) 2839 { 2840 struct ia_css_metadata *md = NULL; 2841 2842 IA_CSS_ENTER(""); 2843 2844 if (metadata_info->size == 0) 2845 return NULL; 2846 2847 md = sh_css_malloc(sizeof(*md)); 2848 if (!md) 2849 goto error; 2850 2851 md->info = *metadata_info; 2852 md->exp_id = 0; 2853 md->address = mmgr_alloc_attr(metadata_info->size, 0); 2854 if (md->address == mmgr_NULL) 2855 goto error; 2856 2857 IA_CSS_LEAVE("return=%p", md); 2858 return md; 2859 2860 error: 2861 ia_css_metadata_free(md); 2862 IA_CSS_LEAVE("return=%p", NULL); 2863 return NULL; 2864 } 2865 2866 void 2867 ia_css_metadata_free(struct ia_css_metadata *me) 2868 { 2869 if (me) { 2870 /* The enter and leave macros are placed inside 2871 * the condition to avoid false logging of metadata 2872 * free events when metadata is disabled. 2873 * We found this to be confusing during development 2874 * and debugging. */ 2875 IA_CSS_ENTER("me=%p", me); 2876 hmm_free(me->address); 2877 sh_css_free(me); 2878 IA_CSS_LEAVE("void"); 2879 } 2880 } 2881 2882 void 2883 ia_css_metadata_free_multiple(unsigned int num_bufs, 2884 struct ia_css_metadata **bufs) 2885 { 2886 unsigned int i; 2887 2888 if (bufs) { 2889 for (i = 0; i < num_bufs; i++) 2890 ia_css_metadata_free(bufs[i]); 2891 } 2892 } 2893 2894 static unsigned int g_param_buffer_dequeue_count; 2895 static unsigned int g_param_buffer_enqueue_count; 2896 2897 enum ia_css_err 2898 ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) { 2899 enum ia_css_err err = IA_CSS_SUCCESS; 2900 unsigned int i; 2901 struct sh_css_ddr_address_map *ddr_ptrs; 2902 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2903 struct ia_css_isp_parameters *params; 2904 2905 assert(stream); 2906 IA_CSS_ENTER_PRIVATE("void"); 2907 2908 if (!stream) 2909 { 2910 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); 2911 return IA_CSS_ERR_INVALID_ARGUMENTS; 2912 } 2913 /* TMP: tracking of paramsets */ 2914 g_param_buffer_dequeue_count = 0; 2915 g_param_buffer_enqueue_count = 0; 2916 2917 stream->per_frame_isp_params_configs = NULL; 2918 err = sh_css_create_isp_params(stream, 2919 &stream->isp_params_configs); 2920 if (err != IA_CSS_SUCCESS) 2921 goto ERR; 2922 2923 params = stream->isp_params_configs; 2924 if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) 2925 { 2926 /* we do not return the error immediately to enable internal 2927 * firmware feature testing */ 2928 err = IA_CSS_ERR_INVALID_ARGUMENTS; 2929 } 2930 2931 ddr_ptrs = ¶ms->ddr_ptrs; 2932 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 2933 2934 /* create per pipe reference to general ddr_ptrs */ 2935 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) 2936 { 2937 ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); 2938 params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; 2939 } 2940 2941 ERR: 2942 IA_CSS_LEAVE_ERR_PRIVATE(err); 2943 return err; 2944 } 2945 2946 static void 2947 ia_css_set_sdis_config( 2948 struct ia_css_isp_parameters *params, 2949 const struct ia_css_dvs_coefficients *dvs_coefs) 2950 { 2951 ia_css_set_sdis_horicoef_config(params, dvs_coefs); 2952 ia_css_set_sdis_vertcoef_config(params, dvs_coefs); 2953 ia_css_set_sdis_horiproj_config(params, dvs_coefs); 2954 ia_css_set_sdis_vertproj_config(params, dvs_coefs); 2955 } 2956 2957 static void 2958 ia_css_set_sdis2_config( 2959 struct ia_css_isp_parameters *params, 2960 const struct ia_css_dvs2_coefficients *dvs2_coefs) 2961 { 2962 ia_css_set_sdis2_horicoef_config(params, dvs2_coefs); 2963 ia_css_set_sdis2_vertcoef_config(params, dvs2_coefs); 2964 ia_css_set_sdis2_horiproj_config(params, dvs2_coefs); 2965 ia_css_set_sdis2_vertproj_config(params, dvs2_coefs); 2966 } 2967 2968 static enum ia_css_err 2969 sh_css_create_isp_params(struct ia_css_stream *stream, 2970 struct ia_css_isp_parameters **isp_params_out) { 2971 bool succ = true; 2972 unsigned int i; 2973 struct sh_css_ddr_address_map *ddr_ptrs; 2974 struct sh_css_ddr_address_map_size *ddr_ptrs_size; 2975 enum ia_css_err err = IA_CSS_SUCCESS; 2976 size_t params_size; 2977 struct ia_css_isp_parameters *params = 2978 sh_css_malloc(sizeof(struct ia_css_isp_parameters)); 2979 2980 if (!params) 2981 { 2982 *isp_params_out = NULL; 2983 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 2984 IA_CSS_ERROR("%s:%d error: cannot allocate memory", __FILE__, __LINE__); 2985 IA_CSS_LEAVE_ERR_PRIVATE(err); 2986 return err; 2987 } else 2988 { 2989 memset(params, 0, sizeof(struct ia_css_isp_parameters)); 2990 } 2991 2992 ddr_ptrs = ¶ms->ddr_ptrs; 2993 ddr_ptrs_size = ¶ms->ddr_ptrs_size; 2994 2995 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) 2996 { 2997 memset(¶ms->pipe_ddr_ptrs[i], 0, 2998 sizeof(params->pipe_ddr_ptrs[i])); 2999 memset(¶ms->pipe_ddr_ptrs_size[i], 0, 3000 sizeof(params->pipe_ddr_ptrs_size[i])); 3001 } 3002 3003 memset(ddr_ptrs, 0, sizeof(*ddr_ptrs)); 3004 memset(ddr_ptrs_size, 0, sizeof(*ddr_ptrs_size)); 3005 3006 params_size = sizeof(params->uds); 3007 ddr_ptrs_size->isp_param = params_size; 3008 ddr_ptrs->isp_param = 3009 ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 3010 mmgr_alloc_attr(params_size, 0)); 3011 succ &= (ddr_ptrs->isp_param != mmgr_NULL); 3012 3013 ddr_ptrs_size->macc_tbl = sizeof(struct ia_css_macc_table); 3014 ddr_ptrs->macc_tbl = 3015 ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 3016 mmgr_alloc_attr(sizeof(struct ia_css_macc_table), 0)); 3017 succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); 3018 3019 *isp_params_out = params; 3020 return err; 3021 } 3022 3023 static bool 3024 sh_css_init_isp_params_from_global(struct ia_css_stream *stream, 3025 struct ia_css_isp_parameters *params, 3026 bool use_default_config, 3027 struct ia_css_pipe *pipe_in) 3028 { 3029 bool retval = true; 3030 int i = 0; 3031 bool is_dp_10bpp = true; 3032 unsigned int isp_pipe_version = ia_css_pipe_get_isp_pipe_version( 3033 stream->pipes[0]); 3034 struct ia_css_isp_parameters *stream_params = stream->isp_params_configs; 3035 3036 if (!use_default_config && !stream_params) { 3037 retval = false; 3038 goto exit; 3039 } 3040 3041 params->output_frame = NULL; 3042 params->isp_parameters_id = 0; 3043 3044 if (use_default_config) { 3045 ia_css_set_xnr3_config(params, &default_xnr3_config); 3046 3047 sh_css_set_nr_config(params, &default_nr_config); 3048 sh_css_set_ee_config(params, &default_ee_config); 3049 if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) 3050 sh_css_set_macc_table(params, &default_macc_table); 3051 else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) 3052 sh_css_set_macc_table(params, &default_macc2_table); 3053 sh_css_set_gamma_table(params, &default_gamma_table); 3054 sh_css_set_ctc_table(params, &default_ctc_table); 3055 sh_css_set_baa_config(params, &default_baa_config); 3056 sh_css_set_dz_config(params, &default_dz_config); 3057 /* ------ deprecated(bz675) : from ------ */ 3058 sh_css_set_shading_settings(params, &default_shading_settings); 3059 /* ------ deprecated(bz675) : to ------ */ 3060 3061 ia_css_set_s3a_config(params, &default_3a_config); 3062 ia_css_set_wb_config(params, &default_wb_config); 3063 ia_css_set_csc_config(params, &default_cc_config); 3064 ia_css_set_tnr_config(params, &default_tnr_config); 3065 ia_css_set_ob_config(params, &default_ob_config); 3066 ia_css_set_dp_config(params, &default_dp_config); 3067 3068 if (!atomisp_hw_is_isp2401) { 3069 ia_css_set_param_exceptions(pipe_in, params); 3070 } else { 3071 for (i = 0; i < stream->num_pipes; i++) { 3072 if (sh_css_select_dp_10bpp_config(stream->pipes[i], 3073 &is_dp_10bpp) == IA_CSS_SUCCESS) { 3074 /* set the return value as false if both DPC and 3075 * BDS is enabled by the user. But we do not return 3076 * the value immediately to enable internal firmware 3077 * feature testing. */ 3078 if (is_dp_10bpp) { 3079 sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); 3080 } else { 3081 sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); 3082 } 3083 } else { 3084 retval = false; 3085 goto exit; 3086 } 3087 3088 ia_css_set_param_exceptions(stream->pipes[i], params); 3089 } 3090 } 3091 3092 ia_css_set_de_config(params, &default_de_config); 3093 ia_css_set_gc_config(params, &default_gc_config); 3094 ia_css_set_anr_config(params, &default_anr_config); 3095 ia_css_set_anr2_config(params, &default_anr_thres); 3096 ia_css_set_ce_config(params, &default_ce_config); 3097 ia_css_set_xnr_table_config(params, &default_xnr_table); 3098 ia_css_set_ecd_config(params, &default_ecd_config); 3099 ia_css_set_ynr_config(params, &default_ynr_config); 3100 ia_css_set_fc_config(params, &default_fc_config); 3101 ia_css_set_cnr_config(params, &default_cnr_config); 3102 ia_css_set_macc_config(params, &default_macc_config); 3103 ia_css_set_ctc_config(params, &default_ctc_config); 3104 ia_css_set_aa_config(params, &default_aa_config); 3105 ia_css_set_r_gamma_config(params, &default_r_gamma_table); 3106 ia_css_set_g_gamma_config(params, &default_g_gamma_table); 3107 ia_css_set_b_gamma_config(params, &default_b_gamma_table); 3108 ia_css_set_yuv2rgb_config(params, &default_yuv2rgb_cc_config); 3109 ia_css_set_rgb2yuv_config(params, &default_rgb2yuv_cc_config); 3110 ia_css_set_xnr_config(params, &default_xnr_config); 3111 ia_css_set_sdis_config(params, &default_sdis_config); 3112 ia_css_set_sdis2_config(params, &default_sdis2_config); 3113 ia_css_set_formats_config(params, &default_formats_config); 3114 3115 params->fpn_config.data = NULL; 3116 params->config_changed[IA_CSS_FPN_ID] = true; 3117 params->fpn_config.enabled = 0; 3118 3119 params->motion_config = default_motion_config; 3120 params->motion_config_changed = true; 3121 3122 params->morph_table = NULL; 3123 params->morph_table_changed = true; 3124 3125 params->sc_table = NULL; 3126 params->sc_table_changed = true; 3127 params->sc_table_dirty = false; 3128 params->sc_table_last_pipe_num = 0; 3129 3130 ia_css_sdis2_clear_coefficients(¶ms->dvs2_coefs); 3131 params->dvs2_coef_table_changed = true; 3132 3133 ia_css_sdis_clear_coefficients(¶ms->dvs_coefs); 3134 params->dis_coef_table_changed = true; 3135 } else { 3136 ia_css_set_xnr3_config(params, &stream_params->xnr3_config); 3137 3138 sh_css_set_nr_config(params, &stream_params->nr_config); 3139 sh_css_set_ee_config(params, &stream_params->ee_config); 3140 if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) 3141 sh_css_set_macc_table(params, &stream_params->macc_table); 3142 else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) 3143 sh_css_set_macc_table(params, &stream_params->macc_table); 3144 sh_css_set_gamma_table(params, &stream_params->gc_table); 3145 sh_css_set_ctc_table(params, &stream_params->ctc_table); 3146 sh_css_set_baa_config(params, &stream_params->bds_config); 3147 sh_css_set_dz_config(params, &stream_params->dz_config); 3148 /* ------ deprecated(bz675) : from ------ */ 3149 sh_css_set_shading_settings(params, &stream_params->shading_settings); 3150 /* ------ deprecated(bz675) : to ------ */ 3151 3152 ia_css_set_s3a_config(params, &stream_params->s3a_config); 3153 ia_css_set_wb_config(params, &stream_params->wb_config); 3154 ia_css_set_csc_config(params, &stream_params->cc_config); 3155 ia_css_set_tnr_config(params, &stream_params->tnr_config); 3156 ia_css_set_ob_config(params, &stream_params->ob_config); 3157 ia_css_set_dp_config(params, &stream_params->dp_config); 3158 ia_css_set_de_config(params, &stream_params->de_config); 3159 ia_css_set_gc_config(params, &stream_params->gc_config); 3160 ia_css_set_anr_config(params, &stream_params->anr_config); 3161 ia_css_set_anr2_config(params, &stream_params->anr_thres); 3162 ia_css_set_ce_config(params, &stream_params->ce_config); 3163 ia_css_set_xnr_table_config(params, &stream_params->xnr_table); 3164 ia_css_set_ecd_config(params, &stream_params->ecd_config); 3165 ia_css_set_ynr_config(params, &stream_params->ynr_config); 3166 ia_css_set_fc_config(params, &stream_params->fc_config); 3167 ia_css_set_cnr_config(params, &stream_params->cnr_config); 3168 ia_css_set_macc_config(params, &stream_params->macc_config); 3169 ia_css_set_ctc_config(params, &stream_params->ctc_config); 3170 ia_css_set_aa_config(params, &stream_params->aa_config); 3171 ia_css_set_r_gamma_config(params, &stream_params->r_gamma_table); 3172 ia_css_set_g_gamma_config(params, &stream_params->g_gamma_table); 3173 ia_css_set_b_gamma_config(params, &stream_params->b_gamma_table); 3174 ia_css_set_yuv2rgb_config(params, &stream_params->yuv2rgb_cc_config); 3175 ia_css_set_rgb2yuv_config(params, &stream_params->rgb2yuv_cc_config); 3176 ia_css_set_xnr_config(params, &stream_params->xnr_config); 3177 ia_css_set_formats_config(params, &stream_params->formats_config); 3178 3179 for (i = 0; i < stream->num_pipes; i++) { 3180 if (IA_CSS_SUCCESS == 3181 sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { 3182 /* set the return value as false if both DPC and 3183 * BDS is enabled by the user. But we do not return 3184 * the value immediately to enable internal firmware 3185 * feature testing. */ 3186 3187 if (is_dp_10bpp) { 3188 retval = false; 3189 /* FIXME: should it ignore this error? */ 3190 } 3191 } else { 3192 retval = false; 3193 goto exit; 3194 } 3195 if (atomisp_hw_is_isp2401) { 3196 if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { 3197 sh_css_set_dp_config(stream->pipes[i], params, 3198 &stream_params->pipe_dp_config[stream->pipes[i]->mode]); 3199 ia_css_set_param_exceptions(stream->pipes[i], params); 3200 } else { 3201 retval = false; 3202 goto exit; 3203 } 3204 } 3205 } 3206 3207 if (!atomisp_hw_is_isp2401) 3208 ia_css_set_param_exceptions(pipe_in, params); 3209 3210 params->fpn_config.data = stream_params->fpn_config.data; 3211 params->config_changed[IA_CSS_FPN_ID] = 3212 stream_params->config_changed[IA_CSS_FPN_ID]; 3213 params->fpn_config.enabled = stream_params->fpn_config.enabled; 3214 3215 sh_css_set_motion_vector(params, &stream_params->motion_config); 3216 sh_css_set_morph_table(params, stream_params->morph_table); 3217 3218 if (stream_params->sc_table) { 3219 sh_css_update_shading_table_status(pipe_in, params); 3220 sh_css_set_shading_table(stream, params, stream_params->sc_table); 3221 } else { 3222 params->sc_table = NULL; 3223 params->sc_table_changed = true; 3224 params->sc_table_dirty = false; 3225 params->sc_table_last_pipe_num = 0; 3226 } 3227 3228 /* Only IA_CSS_PIPE_ID_VIDEO & IA_CSS_PIPE_ID_CAPTURE will support dvs_6axis_config*/ 3229 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 3230 if (stream_params->pipe_dvs_6axis_config[i]) { 3231 if (params->pipe_dvs_6axis_config[i]) { 3232 copy_dvs_6axis_table(params->pipe_dvs_6axis_config[i], 3233 stream_params->pipe_dvs_6axis_config[i]); 3234 } else { 3235 params->pipe_dvs_6axis_config[i] = 3236 generate_dvs_6axis_table_from_config(stream_params->pipe_dvs_6axis_config[i]); 3237 } 3238 } 3239 } 3240 ia_css_set_sdis_config(params, &stream_params->dvs_coefs); 3241 params->dis_coef_table_changed = stream_params->dis_coef_table_changed; 3242 3243 ia_css_set_sdis2_config(params, &stream_params->dvs2_coefs); 3244 params->dvs2_coef_table_changed = stream_params->dvs2_coef_table_changed; 3245 params->sensor_binning = stream_params->sensor_binning; 3246 } 3247 3248 exit: 3249 return retval; 3250 } 3251 3252 enum ia_css_err 3253 sh_css_params_init(void) { 3254 int i, p; 3255 3256 IA_CSS_ENTER_PRIVATE("void"); 3257 3258 /* TMP: tracking of paramsets */ 3259 g_param_buffer_dequeue_count = 0; 3260 g_param_buffer_enqueue_count = 0; 3261 3262 for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) 3263 { 3264 for (i = 0; i < SH_CSS_MAX_STAGES; i++) { 3265 xmem_sp_stage_ptrs[p][i] = 3266 ia_css_refcount_increment(-1, 3267 mmgr_alloc_attr(sizeof(struct sh_css_sp_stage), 3268 ATOMISP_MAP_FLAG_CLEARED)); 3269 xmem_isp_stage_ptrs[p][i] = 3270 ia_css_refcount_increment(-1, 3271 mmgr_alloc_attr(sizeof(struct sh_css_sp_stage), 3272 ATOMISP_MAP_FLAG_CLEARED)); 3273 3274 if ((xmem_sp_stage_ptrs[p][i] == mmgr_NULL) || 3275 (xmem_isp_stage_ptrs[p][i] == mmgr_NULL)) { 3276 sh_css_params_uninit(); 3277 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3278 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3279 } 3280 } 3281 } 3282 3283 ia_css_config_gamma_table(); 3284 ia_css_config_ctc_table(); 3285 ia_css_config_rgb_gamma_tables(); 3286 ia_css_config_xnr_table(); 3287 3288 sp_ddr_ptrs = ia_css_refcount_increment(-1, 3289 mmgr_alloc_attr(CEIL_MUL(sizeof(struct sh_css_ddr_address_map), 3290 HIVE_ISP_DDR_WORD_BYTES), 3291 ATOMISP_MAP_FLAG_CLEARED)); 3292 xmem_sp_group_ptrs = ia_css_refcount_increment(-1, 3293 mmgr_alloc_attr(sizeof(struct sh_css_sp_group), 3294 ATOMISP_MAP_FLAG_CLEARED)); 3295 3296 if ((sp_ddr_ptrs == mmgr_NULL) || 3297 (xmem_sp_group_ptrs == mmgr_NULL)) 3298 { 3299 ia_css_uninit(); 3300 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3301 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3302 } 3303 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 3304 return IA_CSS_SUCCESS; 3305 } 3306 3307 static void host_lut_store(const void *lut) 3308 { 3309 unsigned int i; 3310 3311 for (i = 0; i < N_GDC_ID; i++) 3312 gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); 3313 } 3314 3315 /* Note that allocation is in ipu address space. */ 3316 inline ia_css_ptr sh_css_params_alloc_gdc_lut(void) 3317 { 3318 return mmgr_alloc_attr(sizeof(zoom_table), 0); 3319 } 3320 3321 inline void sh_css_params_free_gdc_lut(ia_css_ptr addr) 3322 { 3323 if (addr != mmgr_NULL) 3324 hmm_free(addr); 3325 } 3326 3327 enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, 3328 const void *lut) 3329 { 3330 enum ia_css_err err = IA_CSS_SUCCESS; 3331 bool stream_started = false; 3332 3333 IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut); 3334 3335 if (!lut || !pipe) { 3336 err = IA_CSS_ERR_INVALID_ARGUMENTS; 3337 IA_CSS_LEAVE("err=%d", err); 3338 return err; 3339 } 3340 3341 /* If the pipe belongs to a stream and the stream has started, it is not 3342 * safe to store lut to gdc HW. If pipe->stream is NULL, then no stream is 3343 * created with this pipe, so it is safe to do this operation as long as 3344 * ia_css_init() has been called. */ 3345 if (pipe->stream && pipe->stream->started) { 3346 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, 3347 "unable to set scaler lut since stream has started\n"); 3348 stream_started = true; 3349 err = IA_CSS_ERR_NOT_SUPPORTED; 3350 } 3351 3352 /* Free any existing tables. */ 3353 sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); 3354 pipe->scaler_pp_lut = mmgr_NULL; 3355 3356 if (!stream_started) { 3357 if (!atomisp_hw_is_isp2401) 3358 pipe->scaler_pp_lut = mmgr_alloc_attr(sizeof(zoom_table), 0); 3359 else 3360 pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); 3361 3362 if (pipe->scaler_pp_lut == mmgr_NULL) { 3363 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, 3364 "unable to allocate scaler_pp_lut\n"); 3365 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3366 } else { 3367 gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, 3368 interleaved_lut_temp); 3369 hmm_store(pipe->scaler_pp_lut, 3370 (int *)interleaved_lut_temp, 3371 sizeof(zoom_table)); 3372 } 3373 } 3374 3375 IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); 3376 return err; 3377 } 3378 3379 /* if pipe is NULL, returns default lut addr. */ 3380 ia_css_ptr sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe) 3381 { 3382 assert(pipe); 3383 3384 if (pipe->scaler_pp_lut != mmgr_NULL) 3385 return pipe->scaler_pp_lut; 3386 else 3387 return sh_css_params_get_default_gdc_lut(); 3388 } 3389 3390 enum ia_css_err sh_css_params_map_and_store_default_gdc_lut(void) 3391 { 3392 enum ia_css_err err = IA_CSS_SUCCESS; 3393 3394 IA_CSS_ENTER_PRIVATE("void"); 3395 3396 /* Is table already mapped? Nothing to do if it is mapped. */ 3397 if (default_gdc_lut != mmgr_NULL) 3398 return err; 3399 3400 host_lut_store((void *)zoom_table); 3401 3402 if (!atomisp_hw_is_isp2401) 3403 default_gdc_lut = mmgr_alloc_attr(sizeof(zoom_table), 0); 3404 else 3405 default_gdc_lut = sh_css_params_alloc_gdc_lut(); 3406 3407 if (default_gdc_lut == mmgr_NULL) 3408 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3409 3410 gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])zoom_table, 3411 interleaved_lut_temp); 3412 hmm_store(default_gdc_lut, (int *)interleaved_lut_temp, 3413 sizeof(zoom_table)); 3414 3415 IA_CSS_LEAVE_PRIVATE("lut(%u) err=%d", default_gdc_lut, err); 3416 return err; 3417 } 3418 3419 void sh_css_params_free_default_gdc_lut(void) 3420 { 3421 IA_CSS_ENTER_PRIVATE("void"); 3422 3423 sh_css_params_free_gdc_lut(default_gdc_lut); 3424 default_gdc_lut = mmgr_NULL; 3425 3426 IA_CSS_LEAVE_PRIVATE("void"); 3427 } 3428 3429 ia_css_ptr sh_css_params_get_default_gdc_lut(void) 3430 { 3431 return default_gdc_lut; 3432 } 3433 3434 static void free_param_set_callback( 3435 ia_css_ptr ptr) 3436 { 3437 IA_CSS_ENTER_PRIVATE("void"); 3438 3439 free_ia_css_isp_parameter_set_info(ptr); 3440 3441 IA_CSS_LEAVE_PRIVATE("void"); 3442 } 3443 3444 static void free_buffer_callback( 3445 ia_css_ptr ptr) 3446 { 3447 IA_CSS_ENTER_PRIVATE("void"); 3448 3449 hmm_free(ptr); 3450 3451 IA_CSS_LEAVE_PRIVATE("void"); 3452 } 3453 3454 void 3455 sh_css_param_clear_param_sets(void) 3456 { 3457 IA_CSS_ENTER_PRIVATE("void"); 3458 3459 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); 3460 3461 IA_CSS_LEAVE_PRIVATE("void"); 3462 } 3463 3464 /* 3465 * MW: we can define hmm_free() to return a NULL 3466 * then you can write ptr = hmm_free(ptr); 3467 */ 3468 #define safe_free(id, x) \ 3469 do { \ 3470 ia_css_refcount_decrement(id, x); \ 3471 (x) = mmgr_NULL; \ 3472 } while (0) 3473 3474 static void free_map(struct sh_css_ddr_address_map *map) 3475 { 3476 unsigned int i; 3477 3478 ia_css_ptr *addrs = (ia_css_ptr *)map; 3479 3480 IA_CSS_ENTER_PRIVATE("void"); 3481 3482 /* free buffers */ 3483 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 3484 sizeof(size_t)); i++) { 3485 if (addrs[i] == mmgr_NULL) 3486 continue; 3487 safe_free(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); 3488 } 3489 3490 IA_CSS_LEAVE_PRIVATE("void"); 3491 } 3492 3493 void 3494 ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) 3495 { 3496 int i; 3497 struct ia_css_isp_parameters *params = stream->isp_params_configs; 3498 struct ia_css_isp_parameters *per_frame_params = 3499 stream->per_frame_isp_params_configs; 3500 3501 IA_CSS_ENTER_PRIVATE("void"); 3502 if (!params) { 3503 IA_CSS_LEAVE_PRIVATE("isp_param_configs is NULL"); 3504 return; 3505 } 3506 3507 /* free existing ddr_ptr maps */ 3508 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 3509 free_map(¶ms->pipe_ddr_ptrs[i]); 3510 if (per_frame_params) 3511 free_map(&per_frame_params->pipe_ddr_ptrs[i]); 3512 /* Free up theDVS table memory blocks before recomputing new table */ 3513 if (params->pipe_dvs_6axis_config[i]) 3514 free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); 3515 if (per_frame_params && per_frame_params->pipe_dvs_6axis_config[i]) 3516 free_dvs_6axis_table(&per_frame_params->pipe_dvs_6axis_config[i]); 3517 } 3518 free_map(¶ms->ddr_ptrs); 3519 if (per_frame_params) 3520 free_map(&per_frame_params->ddr_ptrs); 3521 3522 if (params->fpn_config.data) { 3523 sh_css_free(params->fpn_config.data); 3524 params->fpn_config.data = NULL; 3525 } 3526 3527 /* Free up sc_config (temporal shading table) if it is allocated. */ 3528 if (params->sc_config) { 3529 ia_css_shading_table_free(params->sc_config); 3530 params->sc_config = NULL; 3531 } 3532 if (per_frame_params) { 3533 if (per_frame_params->sc_config) { 3534 ia_css_shading_table_free(per_frame_params->sc_config); 3535 per_frame_params->sc_config = NULL; 3536 } 3537 } 3538 3539 sh_css_free(params); 3540 if (per_frame_params) 3541 sh_css_free(per_frame_params); 3542 stream->isp_params_configs = NULL; 3543 stream->per_frame_isp_params_configs = NULL; 3544 3545 IA_CSS_LEAVE_PRIVATE("void"); 3546 } 3547 3548 void 3549 sh_css_params_uninit(void) 3550 { 3551 unsigned int p, i; 3552 3553 IA_CSS_ENTER_PRIVATE("void"); 3554 3555 ia_css_refcount_decrement(-1, sp_ddr_ptrs); 3556 sp_ddr_ptrs = mmgr_NULL; 3557 ia_css_refcount_decrement(-1, xmem_sp_group_ptrs); 3558 xmem_sp_group_ptrs = mmgr_NULL; 3559 3560 for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) 3561 for (i = 0; i < SH_CSS_MAX_STAGES; i++) { 3562 ia_css_refcount_decrement(-1, xmem_sp_stage_ptrs[p][i]); 3563 xmem_sp_stage_ptrs[p][i] = mmgr_NULL; 3564 ia_css_refcount_decrement(-1, xmem_isp_stage_ptrs[p][i]); 3565 xmem_isp_stage_ptrs[p][i] = mmgr_NULL; 3566 } 3567 3568 /* go through the pools to clear references */ 3569 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); 3570 ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_BUFFER, &free_buffer_callback); 3571 ia_css_refcount_clear(-1, &free_buffer_callback); 3572 3573 IA_CSS_LEAVE_PRIVATE("void"); 3574 } 3575 3576 static struct ia_css_host_data * 3577 convert_allocate_morph_plane( 3578 unsigned short *data, 3579 unsigned int width, 3580 unsigned int height, 3581 unsigned int aligned_width) 3582 { 3583 unsigned int i, j, padding, w; 3584 struct ia_css_host_data *me; 3585 unsigned int isp_data_size; 3586 u16 *isp_data_ptr; 3587 3588 IA_CSS_ENTER_PRIVATE("void"); 3589 3590 /* currently we don't have morph table interpolation yet, 3591 * so we allow a wider table to be used. This will be removed 3592 * in the future. */ 3593 if (width > aligned_width) { 3594 padding = 0; 3595 w = aligned_width; 3596 } else { 3597 padding = aligned_width - width; 3598 w = width; 3599 } 3600 isp_data_size = height * (w + padding) * sizeof(uint16_t); 3601 3602 me = ia_css_host_data_allocate((size_t)isp_data_size); 3603 3604 if (!me) { 3605 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3606 return NULL; 3607 } 3608 3609 isp_data_ptr = (uint16_t *)me->address; 3610 3611 memset(isp_data_ptr, 0, (size_t)isp_data_size); 3612 3613 for (i = 0; i < height; i++) { 3614 for (j = 0; j < w; j++) 3615 *isp_data_ptr++ = (uint16_t)data[j]; 3616 isp_data_ptr += padding; 3617 data += width; 3618 } 3619 3620 IA_CSS_LEAVE_PRIVATE("void"); 3621 return me; 3622 } 3623 3624 static enum ia_css_err 3625 store_morph_plane( 3626 unsigned short *data, 3627 unsigned int width, 3628 unsigned int height, 3629 ia_css_ptr dest, 3630 unsigned int aligned_width) { 3631 struct ia_css_host_data *isp_data; 3632 3633 assert(dest != mmgr_NULL); 3634 3635 isp_data = convert_allocate_morph_plane(data, width, height, aligned_width); 3636 if (!isp_data) 3637 { 3638 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 3639 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 3640 } 3641 ia_css_params_store_ia_css_host_data(dest, isp_data); 3642 3643 ia_css_host_data_free(isp_data); 3644 return IA_CSS_SUCCESS; 3645 } 3646 3647 static void sh_css_update_isp_params_to_ddr( 3648 struct ia_css_isp_parameters *params, 3649 ia_css_ptr ddr_ptr) 3650 { 3651 size_t size = sizeof(params->uds); 3652 3653 IA_CSS_ENTER_PRIVATE("void"); 3654 3655 assert(params); 3656 3657 hmm_store(ddr_ptr, ¶ms->uds, size); 3658 IA_CSS_LEAVE_PRIVATE("void"); 3659 } 3660 3661 static void sh_css_update_isp_mem_params_to_ddr( 3662 const struct ia_css_binary *binary, 3663 ia_css_ptr ddr_mem_ptr, 3664 size_t size, 3665 enum ia_css_isp_memories mem) 3666 { 3667 const struct ia_css_host_data *params; 3668 3669 IA_CSS_ENTER_PRIVATE("void"); 3670 3671 params = ia_css_isp_param_get_mem_init(&binary->mem_params, 3672 IA_CSS_PARAM_CLASS_PARAM, mem); 3673 hmm_store(ddr_mem_ptr, params->address, size); 3674 3675 IA_CSS_LEAVE_PRIVATE("void"); 3676 } 3677 3678 void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) 3679 { 3680 unsigned int i; 3681 ia_css_ptr cpy; 3682 enum sh_css_queue_id param_queue_ids[3] = { IA_CSS_PARAMETER_SET_QUEUE_ID, 3683 IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID, 3684 SH_CSS_INVALID_QUEUE_ID 3685 }; 3686 3687 IA_CSS_ENTER_PRIVATE("void"); 3688 3689 if (!sh_css_sp_is_running()) { 3690 IA_CSS_LEAVE_PRIVATE("sp is not running"); 3691 /* SP is not running. The queues are not valid */ 3692 return; 3693 } 3694 3695 for (i = 0; SH_CSS_INVALID_QUEUE_ID != param_queue_ids[i]; i++) { 3696 cpy = (ia_css_ptr)0; 3697 /* clean-up old copy */ 3698 while (ia_css_bufq_dequeue_buffer(param_queue_ids[i], 3699 (uint32_t *)&cpy) == IA_CSS_SUCCESS) { 3700 /* TMP: keep track of dequeued param set count 3701 */ 3702 g_param_buffer_dequeue_count++; 3703 ia_css_bufq_enqueue_psys_event( 3704 IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, 3705 0, 3706 param_queue_ids[i], 3707 0); 3708 3709 IA_CSS_LOG("dequeued param set %x from %d, release ref", cpy, 0); 3710 free_ia_css_isp_parameter_set_info(cpy); 3711 cpy = (ia_css_ptr)0; 3712 } 3713 } 3714 3715 IA_CSS_LEAVE_PRIVATE("void"); 3716 } 3717 3718 static void 3719 process_kernel_parameters(unsigned int pipe_id, 3720 struct ia_css_pipeline_stage *stage, 3721 struct ia_css_isp_parameters *params, 3722 unsigned int isp_pipe_version, 3723 unsigned int raw_bit_depth) 3724 { 3725 unsigned int param_id; 3726 3727 (void)isp_pipe_version; 3728 (void)raw_bit_depth; 3729 3730 sh_css_enable_pipeline(stage->binary); 3731 3732 if (params->config_changed[IA_CSS_OB_ID]) { 3733 ia_css_ob_configure(¶ms->stream_configs.ob, 3734 isp_pipe_version, raw_bit_depth); 3735 } 3736 if (params->config_changed[IA_CSS_S3A_ID]) { 3737 ia_css_s3a_configure(raw_bit_depth); 3738 } 3739 /* Copy stage uds parameters to config, since they can differ per stage. 3740 */ 3741 params->crop_config.crop_pos = params->uds[stage->stage_num].crop_pos; 3742 params->uds_config.crop_pos = params->uds[stage->stage_num].crop_pos; 3743 params->uds_config.uds = params->uds[stage->stage_num].uds; 3744 /* Call parameter process functions for all kernels */ 3745 /* Skip SC, since that is called on a temp sc table */ 3746 for (param_id = 0; param_id < IA_CSS_NUM_PARAMETER_IDS; param_id++) { 3747 if (param_id == IA_CSS_SC_ID) continue; 3748 if (params->config_changed[param_id]) 3749 ia_css_kernel_process_param[param_id](pipe_id, stage, params); 3750 } 3751 } 3752 3753 enum ia_css_err 3754 sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, 3755 struct ia_css_isp_parameters *params, 3756 bool commit, 3757 struct ia_css_pipe *pipe_in) { 3758 enum ia_css_err err = IA_CSS_SUCCESS; 3759 ia_css_ptr cpy; 3760 int i; 3761 unsigned int raw_bit_depth = 10; 3762 unsigned int isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_1; 3763 bool acc_cluster_params_changed = false; 3764 unsigned int thread_id, pipe_num; 3765 3766 (void)acc_cluster_params_changed; 3767 3768 assert(curr_pipe); 3769 3770 IA_CSS_ENTER_PRIVATE("pipe=%p, isp_parameters_id=%d", pipe_in, params->isp_parameters_id); 3771 raw_bit_depth = ia_css_stream_input_format_bits_per_pixel(curr_pipe->stream); 3772 3773 /* now make the map available to the sp */ 3774 if (!commit) 3775 { 3776 IA_CSS_LEAVE_ERR_PRIVATE(err); 3777 return err; 3778 } 3779 /* enqueue a copies of the mem_map to 3780 the designated pipelines */ 3781 for (i = 0; i < curr_pipe->stream->num_pipes; i++) 3782 { 3783 struct ia_css_pipe *pipe; 3784 struct sh_css_ddr_address_map *cur_map; 3785 struct sh_css_ddr_address_map_size *cur_map_size; 3786 struct ia_css_isp_parameter_set_info isp_params_info; 3787 struct ia_css_pipeline *pipeline; 3788 struct ia_css_pipeline_stage *stage; 3789 3790 enum sh_css_queue_id queue_id; 3791 3792 pipe = curr_pipe->stream->pipes[i]; 3793 pipeline = ia_css_pipe_get_pipeline(pipe); 3794 pipe_num = ia_css_pipe_get_pipe_num(pipe); 3795 isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe); 3796 ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); 3797 3798 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3799 ia_css_query_internal_queue_id(params->output_frame 3800 ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET 3801 : IA_CSS_BUFFER_TYPE_PARAMETER_SET, 3802 thread_id, &queue_id); 3803 #else 3804 ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, 3805 &queue_id); 3806 #endif 3807 if (!sh_css_sp_is_running()) { 3808 /* SP is not running. The queues are not valid */ 3809 err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; 3810 break; 3811 } 3812 cur_map = ¶ms->pipe_ddr_ptrs[pipeline->pipe_id]; 3813 cur_map_size = ¶ms->pipe_ddr_ptrs_size[pipeline->pipe_id]; 3814 3815 /* TODO: Normally, zoom and motion parameters shouldn't 3816 * be part of "isp_params" as it is resolution/pipe dependent 3817 * Therefore, move the zoom config elsewhere (e.g. shading 3818 * table can be taken as an example! @GC 3819 * */ 3820 { 3821 /* we have to do this per pipeline because */ 3822 /* the processing is a.o. resolution dependent */ 3823 err = ia_css_process_zoom_and_motion(params, 3824 pipeline->stages); 3825 if (err != IA_CSS_SUCCESS) 3826 return err; 3827 } 3828 /* check if to actually update the parameters for this pipe */ 3829 /* When API change is implemented making good distinction between 3830 * stream config and pipe config this skipping code can be moved out of the #ifdef */ 3831 if (pipe_in && (pipe != pipe_in)) { 3832 IA_CSS_LOG("skipping pipe %p", pipe); 3833 continue; 3834 } 3835 3836 /* BZ 125915, should be moved till after "update other buff" */ 3837 /* update the other buffers to the pipe specific copies */ 3838 for (stage = pipeline->stages; stage; stage = stage->next) { 3839 unsigned int mem; 3840 3841 if (!stage || !stage->binary) 3842 continue; 3843 3844 process_kernel_parameters(pipeline->pipe_id, 3845 stage, params, 3846 isp_pipe_version, raw_bit_depth); 3847 3848 err = sh_css_params_write_to_ddr_internal( 3849 pipe, 3850 pipeline->pipe_id, 3851 params, 3852 stage, 3853 cur_map, 3854 cur_map_size); 3855 3856 if (err != IA_CSS_SUCCESS) 3857 break; 3858 for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { 3859 params->isp_mem_params_changed 3860 [pipeline->pipe_id][stage->stage_num][mem] = false; 3861 } 3862 } /* for */ 3863 if (err != IA_CSS_SUCCESS) 3864 break; 3865 /* update isp_params to pipe specific copies */ 3866 if (params->isp_params_changed) { 3867 reallocate_buffer(&cur_map->isp_param, 3868 &cur_map_size->isp_param, 3869 cur_map_size->isp_param, 3870 true, 3871 &err); 3872 if (err != IA_CSS_SUCCESS) 3873 break; 3874 sh_css_update_isp_params_to_ddr(params, cur_map->isp_param); 3875 } 3876 3877 /* last make referenced copy */ 3878 err = ref_sh_css_ddr_address_map( 3879 cur_map, 3880 &isp_params_info.mem_map); 3881 if (err != IA_CSS_SUCCESS) 3882 break; 3883 3884 /* Update Parameters ID */ 3885 isp_params_info.isp_parameters_id = params->isp_parameters_id; 3886 3887 /* Update output frame pointer */ 3888 isp_params_info.output_frame_ptr = 3889 (params->output_frame) ? params->output_frame->data : mmgr_NULL; 3890 3891 /* now write the copy to ddr */ 3892 err = write_ia_css_isp_parameter_set_info_to_ddr(&isp_params_info, &cpy); 3893 if (err != IA_CSS_SUCCESS) 3894 break; 3895 3896 /* enqueue the set to sp */ 3897 IA_CSS_LOG("queue param set %x to %d", cpy, thread_id); 3898 3899 err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); 3900 if (err != IA_CSS_SUCCESS) { 3901 free_ia_css_isp_parameter_set_info(cpy); 3902 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3903 IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", 3904 isp_params_info.isp_parameters_id, 3905 isp_params_info.output_frame_ptr, 3906 queue_id, thread_id); 3907 #endif 3908 break; 3909 } else { 3910 /* TMP: check discrepancy between nr of enqueued 3911 * parameter sets and dequeued sets 3912 */ 3913 g_param_buffer_enqueue_count++; 3914 assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count + 50); 3915 /* 3916 * Tell the SP which queues are not empty, 3917 * by sending the software event. 3918 */ 3919 if (!sh_css_sp_is_running()) { 3920 /* SP is not running. The queues are not valid */ 3921 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); 3922 return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; 3923 } 3924 ia_css_bufq_enqueue_psys_event( 3925 IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, 3926 (uint8_t)thread_id, 3927 (uint8_t)queue_id, 3928 0); 3929 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 3930 IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", 3931 isp_params_info.isp_parameters_id, 3932 isp_params_info.output_frame_ptr, 3933 queue_id, thread_id); 3934 #endif 3935 } 3936 /* clean-up old copy */ 3937 ia_css_dequeue_param_buffers(/*pipe_num*/); 3938 params->pipe_dvs_6axis_config_changed[pipeline->pipe_id] = false; 3939 } /* end for each 'active' pipeline */ 3940 /* clear the changed flags after all params 3941 for all pipelines have been updated */ 3942 params->isp_params_changed = false; 3943 params->sc_table_changed = false; 3944 params->dis_coef_table_changed = false; 3945 params->dvs2_coef_table_changed = false; 3946 params->morph_table_changed = false; 3947 params->dz_config_changed = false; 3948 params->motion_config_changed = false; 3949 /* ------ deprecated(bz675) : from ------ */ 3950 params->shading_settings_changed = false; 3951 /* ------ deprecated(bz675) : to ------ */ 3952 3953 memset(¶ms->config_changed[0], 0, sizeof(params->config_changed)); 3954 3955 IA_CSS_LEAVE_ERR_PRIVATE(err); 3956 return err; 3957 } 3958 3959 static enum ia_css_err 3960 sh_css_params_write_to_ddr_internal( 3961 struct ia_css_pipe *pipe, 3962 unsigned int pipe_id, 3963 struct ia_css_isp_parameters *params, 3964 const struct ia_css_pipeline_stage *stage, 3965 struct sh_css_ddr_address_map *ddr_map, 3966 struct sh_css_ddr_address_map_size *ddr_map_size) { 3967 enum ia_css_err err; 3968 const struct ia_css_binary *binary; 3969 3970 unsigned int stage_num; 3971 unsigned int mem; 3972 bool buff_realloced; 3973 3974 /* struct is > 128 bytes so it should not be on stack (see checkpatch) */ 3975 static struct ia_css_macc_table converted_macc_table; 3976 3977 IA_CSS_ENTER_PRIVATE("void"); 3978 assert(params); 3979 assert(ddr_map); 3980 assert(ddr_map_size); 3981 assert(stage); 3982 3983 binary = stage->binary; 3984 assert(binary); 3985 3986 stage_num = stage->stage_num; 3987 3988 if (binary->info->sp.enable.fpnr) 3989 { 3990 buff_realloced = reallocate_buffer(&ddr_map->fpn_tbl, 3991 &ddr_map_size->fpn_tbl, 3992 (size_t)(FPNTBL_BYTES(binary)), 3993 params->config_changed[IA_CSS_FPN_ID], 3994 &err); 3995 if (err != IA_CSS_SUCCESS) { 3996 IA_CSS_LEAVE_ERR_PRIVATE(err); 3997 return err; 3998 } 3999 if (params->config_changed[IA_CSS_FPN_ID] || buff_realloced) { 4000 if (params->fpn_config.enabled) { 4001 err = store_fpntbl(params, ddr_map->fpn_tbl); 4002 if (err != IA_CSS_SUCCESS) { 4003 IA_CSS_LEAVE_ERR_PRIVATE(err); 4004 return err; 4005 } 4006 } 4007 } 4008 } 4009 4010 if (binary->info->sp.enable.sc) 4011 { 4012 u32 enable_conv; 4013 size_t bytes; 4014 4015 if (!atomisp_hw_is_isp2401) 4016 bytes = ISP2400_SCTBL_BYTES(binary); 4017 else 4018 bytes = ISP2401_SCTBL_BYTES(binary); 4019 4020 enable_conv = params->shading_settings.enable_shading_table_conversion; 4021 4022 buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, 4023 &ddr_map_size->sc_tbl, 4024 bytes, 4025 params->sc_table_changed, 4026 &err); 4027 if (err != IA_CSS_SUCCESS) { 4028 IA_CSS_LEAVE_ERR_PRIVATE(err); 4029 return err; 4030 } 4031 4032 if (params->shading_settings_changed || 4033 params->sc_table_changed || buff_realloced) { 4034 if (enable_conv == 0) { 4035 if (params->sc_table) { 4036 /* store the shading table to ddr */ 4037 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_table); 4038 if (err != IA_CSS_SUCCESS) { 4039 IA_CSS_LEAVE_ERR_PRIVATE(err); 4040 return err; 4041 } 4042 /* set sc_config to isp */ 4043 params->sc_config = (struct ia_css_shading_table *)params->sc_table; 4044 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4045 params->sc_config = NULL; 4046 } else { 4047 /* generate the identical shading table */ 4048 if (params->sc_config) { 4049 ia_css_shading_table_free(params->sc_config); 4050 params->sc_config = NULL; 4051 } 4052 sh_css_params_shading_id_table_generate(¶ms->sc_config, 4053 binary->sctbl_width_per_color, 4054 binary->sctbl_height); 4055 if (!params->sc_config) { 4056 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4057 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4058 } 4059 4060 /* store the shading table to ddr */ 4061 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); 4062 if (err != IA_CSS_SUCCESS) { 4063 IA_CSS_LEAVE_ERR_PRIVATE(err); 4064 return err; 4065 } 4066 4067 /* set sc_config to isp */ 4068 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4069 4070 /* free the shading table */ 4071 ia_css_shading_table_free(params->sc_config); 4072 params->sc_config = NULL; 4073 } 4074 } else { /* legacy */ 4075 /* ------ deprecated(bz675) : from ------ */ 4076 /* shading table is full resolution, reduce */ 4077 if (params->sc_config) { 4078 ia_css_shading_table_free(params->sc_config); 4079 params->sc_config = NULL; 4080 } 4081 prepare_shading_table( 4082 (const struct ia_css_shading_table *)params->sc_table, 4083 params->sensor_binning, 4084 ¶ms->sc_config, 4085 binary, pipe->required_bds_factor); 4086 if (!params->sc_config) { 4087 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4088 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4089 } 4090 4091 /* store the shading table to ddr */ 4092 err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); 4093 if (err != IA_CSS_SUCCESS) { 4094 IA_CSS_LEAVE_ERR_PRIVATE(err); 4095 return err; 4096 } 4097 4098 /* set sc_config to isp */ 4099 ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); 4100 4101 /* free the shading table */ 4102 ia_css_shading_table_free(params->sc_config); 4103 params->sc_config = NULL; 4104 /* ------ deprecated(bz675) : to ------ */ 4105 } 4106 } 4107 } 4108 4109 /* DPC configuration is made pipe specific to allow flexibility in positioning of the 4110 * DPC kernel. The code below sets the pipe specific configuration to 4111 * individual binaries. */ 4112 if (atomisp_hw_is_isp2401 && 4113 params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) 4114 { 4115 unsigned int size = 4116 stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; 4117 4118 unsigned int offset = 4119 stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; 4120 4121 if (size) { 4122 ia_css_dp_encode((struct sh_css_isp_dp_params *) 4123 &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], 4124 ¶ms->pipe_dp_config[pipe_id], size); 4125 4126 params->isp_params_changed = true; 4127 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = 4128 true; 4129 } 4130 } 4131 4132 if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) 4133 { 4134 unsigned int i, j, idx; 4135 unsigned int idx_map[] = { 4136 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 4137 }; 4138 4139 for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { 4140 idx = 4 * idx_map[i]; 4141 j = 4 * i; 4142 4143 if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) { 4144 converted_macc_table.data[idx] = 4145 (int16_t)sDIGIT_FITTING(params->macc_table.data[j], 4146 13, SH_CSS_MACC_COEF_SHIFT); 4147 converted_macc_table.data[idx + 1] = 4148 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 1], 4149 13, SH_CSS_MACC_COEF_SHIFT); 4150 converted_macc_table.data[idx + 2] = 4151 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 2], 4152 13, SH_CSS_MACC_COEF_SHIFT); 4153 converted_macc_table.data[idx + 3] = 4154 (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 3], 4155 13, SH_CSS_MACC_COEF_SHIFT); 4156 } else if (binary->info->sp.pipeline.isp_pipe_version == 4157 SH_CSS_ISP_PIPE_VERSION_2_2) { 4158 converted_macc_table.data[idx] = 4159 params->macc_table.data[j]; 4160 converted_macc_table.data[idx + 1] = 4161 params->macc_table.data[j + 1]; 4162 converted_macc_table.data[idx + 2] = 4163 params->macc_table.data[j + 2]; 4164 converted_macc_table.data[idx + 3] = 4165 params->macc_table.data[j + 3]; 4166 } 4167 } 4168 reallocate_buffer(&ddr_map->macc_tbl, 4169 &ddr_map_size->macc_tbl, 4170 ddr_map_size->macc_tbl, 4171 true, 4172 &err); 4173 if (err != IA_CSS_SUCCESS) { 4174 IA_CSS_LEAVE_ERR_PRIVATE(err); 4175 return err; 4176 } 4177 hmm_store(ddr_map->macc_tbl, 4178 converted_macc_table.data, 4179 sizeof(converted_macc_table.data)); 4180 } 4181 4182 if (binary->info->sp.enable.dvs_6axis) 4183 { 4184 /* because UV is packed into the Y plane, calc total 4185 * YYU size = /2 gives size of UV-only, 4186 * total YYU size = UV-only * 3. 4187 */ 4188 buff_realloced = reallocate_buffer( 4189 &ddr_map->dvs_6axis_params_y, 4190 &ddr_map_size->dvs_6axis_params_y, 4191 (size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3), 4192 params->pipe_dvs_6axis_config_changed[pipe_id], 4193 &err); 4194 if (err != IA_CSS_SUCCESS) { 4195 IA_CSS_LEAVE_ERR_PRIVATE(err); 4196 return err; 4197 } 4198 4199 if (params->pipe_dvs_6axis_config_changed[pipe_id] || buff_realloced) { 4200 const struct ia_css_frame_info *dvs_in_frame_info; 4201 4202 if (stage->args.delay_frames[0]) { 4203 /*When delay frames are present(as in case of video), 4204 they are used for dvs. Configure DVS using those params*/ 4205 dvs_in_frame_info = &stage->args.delay_frames[0]->info; 4206 } else { 4207 /*Otherwise, use input frame to configure DVS*/ 4208 dvs_in_frame_info = &stage->args.in_frame->info; 4209 } 4210 4211 /* Generate default DVS unity table on start up*/ 4212 if (!params->pipe_dvs_6axis_config[pipe_id]) { 4213 struct ia_css_resolution dvs_offset = {0}; 4214 4215 if (!atomisp_hw_is_isp2401) { 4216 dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; 4217 } else { 4218 if (binary->dvs_envelope.width || binary->dvs_envelope.height) { 4219 dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; 4220 } 4221 } 4222 dvs_offset.height = (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; 4223 4224 params->pipe_dvs_6axis_config[pipe_id] = 4225 generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); 4226 if (!params->pipe_dvs_6axis_config[pipe_id]) { 4227 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); 4228 return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4229 } 4230 params->pipe_dvs_6axis_config_changed[pipe_id] = true; 4231 4232 store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], 4233 binary, 4234 dvs_in_frame_info, 4235 ddr_map->dvs_6axis_params_y); 4236 params->isp_params_changed = true; 4237 } 4238 } 4239 } 4240 4241 if (binary->info->sp.enable.ca_gdc) 4242 { 4243 unsigned int i; 4244 ia_css_ptr *virt_addr_tetra_x[ 4245 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4246 size_t *virt_size_tetra_x[ 4247 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4248 ia_css_ptr *virt_addr_tetra_y[ 4249 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4250 size_t *virt_size_tetra_y[ 4251 IA_CSS_MORPH_TABLE_NUM_PLANES]; 4252 4253 virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; 4254 virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; 4255 virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; 4256 virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; 4257 virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; 4258 virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; 4259 4260 virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; 4261 virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; 4262 virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; 4263 virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; 4264 virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; 4265 virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; 4266 4267 virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; 4268 virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; 4269 virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; 4270 virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; 4271 virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; 4272 virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; 4273 4274 virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; 4275 virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; 4276 virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; 4277 virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; 4278 virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; 4279 virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; 4280 4281 buff_realloced = false; 4282 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 4283 buff_realloced |= 4284 reallocate_buffer(virt_addr_tetra_x[i], 4285 virt_size_tetra_x[i], 4286 (size_t) 4287 (MORPH_PLANE_BYTES(binary)), 4288 params->morph_table_changed, 4289 &err); 4290 if (err != IA_CSS_SUCCESS) { 4291 IA_CSS_LEAVE_ERR_PRIVATE(err); 4292 return err; 4293 } 4294 buff_realloced |= 4295 reallocate_buffer(virt_addr_tetra_y[i], 4296 virt_size_tetra_y[i], 4297 (size_t) 4298 (MORPH_PLANE_BYTES(binary)), 4299 params->morph_table_changed, 4300 &err); 4301 if (err != IA_CSS_SUCCESS) { 4302 IA_CSS_LEAVE_ERR_PRIVATE(err); 4303 return err; 4304 } 4305 } 4306 if (params->morph_table_changed || buff_realloced) { 4307 const struct ia_css_morph_table *table = params->morph_table; 4308 struct ia_css_morph_table *id_table = NULL; 4309 4310 if ((table) && 4311 (table->width < binary->morph_tbl_width || 4312 table->height < binary->morph_tbl_height)) { 4313 table = NULL; 4314 } 4315 if (!table) { 4316 err = sh_css_params_default_morph_table(&id_table, 4317 binary); 4318 if (err != IA_CSS_SUCCESS) { 4319 IA_CSS_LEAVE_ERR_PRIVATE(err); 4320 return err; 4321 } 4322 table = id_table; 4323 } 4324 4325 for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { 4326 store_morph_plane(table->coordinates_x[i], 4327 table->width, 4328 table->height, 4329 *virt_addr_tetra_x[i], 4330 binary->morph_tbl_aligned_width); 4331 store_morph_plane(table->coordinates_y[i], 4332 table->width, 4333 table->height, 4334 *virt_addr_tetra_y[i], 4335 binary->morph_tbl_aligned_width); 4336 } 4337 if (id_table) 4338 ia_css_morph_table_free(id_table); 4339 } 4340 } 4341 4342 /* After special cases like SC, FPN since they may change parameters */ 4343 for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) 4344 { 4345 const struct ia_css_isp_data *isp_data = 4346 ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, 4347 IA_CSS_PARAM_CLASS_PARAM, mem); 4348 size_t size = isp_data->size; 4349 4350 if (!size) continue; 4351 buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], 4352 &ddr_map_size->isp_mem_param[stage_num][mem], 4353 size, 4354 params->isp_mem_params_changed[pipe_id][stage_num][mem], 4355 &err); 4356 if (err != IA_CSS_SUCCESS) { 4357 IA_CSS_LEAVE_ERR_PRIVATE(err); 4358 return err; 4359 } 4360 if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { 4361 sh_css_update_isp_mem_params_to_ddr(binary, 4362 ddr_map->isp_mem_param[stage_num][mem], 4363 ddr_map_size->isp_mem_param[stage_num][mem], mem); 4364 } 4365 } 4366 4367 IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); 4368 return IA_CSS_SUCCESS; 4369 } 4370 4371 const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream 4372 *stream) 4373 { 4374 struct ia_css_isp_parameters *params; 4375 4376 IA_CSS_ENTER_LEAVE("void"); 4377 assert(stream); 4378 4379 params = stream->isp_params_configs; 4380 4381 return ¶ms->fpn_config; 4382 } 4383 4384 struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream 4385 *stream) 4386 { 4387 struct ia_css_shading_table *table = NULL; 4388 struct ia_css_isp_parameters *params; 4389 4390 IA_CSS_ENTER("void"); 4391 4392 assert(stream); 4393 4394 params = stream->isp_params_configs; 4395 if (!params) 4396 return NULL; 4397 4398 if (params->shading_settings.enable_shading_table_conversion == 0) { 4399 if (params->sc_table) { 4400 table = (struct ia_css_shading_table *)params->sc_table; 4401 } else { 4402 const struct ia_css_binary *binary 4403 = ia_css_stream_get_shading_correction_binary(stream); 4404 if (binary) { 4405 /* generate the identical shading table */ 4406 if (params->sc_config) { 4407 ia_css_shading_table_free(params->sc_config); 4408 params->sc_config = NULL; 4409 } 4410 sh_css_params_shading_id_table_generate(¶ms->sc_config, 4411 binary->sctbl_width_per_color, 4412 binary->sctbl_height); 4413 table = params->sc_config; 4414 /* The sc_config will be freed in the 4415 * ia_css_stream_isp_parameters_uninit function. */ 4416 } 4417 } 4418 } else { 4419 /* ------ deprecated(bz675) : from ------ */ 4420 const struct ia_css_binary *binary 4421 = ia_css_stream_get_shading_correction_binary(stream); 4422 struct ia_css_pipe *pipe; 4423 4424 /**********************************************************************/ 4425 /* following code is copied from function ia_css_stream_get_shading_correction_binary() 4426 * to match with the binary */ 4427 pipe = stream->pipes[0]; 4428 4429 if (stream->num_pipes == 2) { 4430 assert(stream->pipes[1]); 4431 if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || 4432 stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) 4433 pipe = stream->pipes[1]; 4434 } 4435 /**********************************************************************/ 4436 if (binary) { 4437 if (params->sc_config) { 4438 ia_css_shading_table_free(params->sc_config); 4439 params->sc_config = NULL; 4440 } 4441 prepare_shading_table( 4442 (const struct ia_css_shading_table *)params->sc_table, 4443 params->sensor_binning, 4444 ¶ms->sc_config, 4445 binary, pipe->required_bds_factor); 4446 4447 table = params->sc_config; 4448 /* The sc_config will be freed in the 4449 * ia_css_stream_isp_parameters_uninit function. */ 4450 } 4451 /* ------ deprecated(bz675) : to ------ */ 4452 } 4453 4454 IA_CSS_LEAVE("table=%p", table); 4455 4456 return table; 4457 } 4458 4459 ia_css_ptr sh_css_store_sp_group_to_ddr(void) 4460 { 4461 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4462 hmm_store(xmem_sp_group_ptrs, 4463 &sh_css_sp_group, 4464 sizeof(struct sh_css_sp_group)); 4465 return xmem_sp_group_ptrs; 4466 } 4467 4468 ia_css_ptr sh_css_store_sp_stage_to_ddr( 4469 unsigned int pipe, 4470 unsigned int stage) 4471 { 4472 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4473 hmm_store(xmem_sp_stage_ptrs[pipe][stage], 4474 &sh_css_sp_stage, 4475 sizeof(struct sh_css_sp_stage)); 4476 return xmem_sp_stage_ptrs[pipe][stage]; 4477 } 4478 4479 ia_css_ptr sh_css_store_isp_stage_to_ddr( 4480 unsigned int pipe, 4481 unsigned int stage) 4482 { 4483 IA_CSS_ENTER_LEAVE_PRIVATE("void"); 4484 hmm_store(xmem_isp_stage_ptrs[pipe][stage], 4485 &sh_css_isp_stage, 4486 sizeof(struct sh_css_isp_stage)); 4487 return xmem_isp_stage_ptrs[pipe][stage]; 4488 } 4489 4490 static enum ia_css_err ref_sh_css_ddr_address_map( 4491 struct sh_css_ddr_address_map *map, 4492 struct sh_css_ddr_address_map *out) 4493 { 4494 enum ia_css_err err = IA_CSS_SUCCESS; 4495 unsigned int i; 4496 4497 /* we will use a union to copy things; overlaying an array 4498 with the struct; that way adding fields in the struct 4499 will keep things working, and we will not get type errors. 4500 */ 4501 union { 4502 struct sh_css_ddr_address_map *map; 4503 ia_css_ptr *addrs; 4504 } in_addrs, to_addrs; 4505 4506 IA_CSS_ENTER_PRIVATE("void"); 4507 assert(map); 4508 assert(out); 4509 4510 in_addrs.map = map; 4511 to_addrs.map = out; 4512 4513 assert(sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t) == 4514 sizeof(struct sh_css_ddr_address_map) / sizeof(ia_css_ptr)); 4515 4516 /* copy map using size info */ 4517 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 4518 sizeof(size_t)); i++) { 4519 if (in_addrs.addrs[i] == mmgr_NULL) 4520 to_addrs.addrs[i] = mmgr_NULL; 4521 else 4522 to_addrs.addrs[i] = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, 4523 in_addrs.addrs[i]); 4524 } 4525 4526 IA_CSS_LEAVE_ERR_PRIVATE(err); 4527 return err; 4528 } 4529 4530 static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( 4531 struct ia_css_isp_parameter_set_info *me, 4532 ia_css_ptr *out) 4533 { 4534 enum ia_css_err err = IA_CSS_SUCCESS; 4535 bool succ; 4536 4537 IA_CSS_ENTER_PRIVATE("void"); 4538 4539 assert(me); 4540 assert(out); 4541 4542 *out = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_SET_POOL, 4543 mmgr_alloc_attr(sizeof(struct ia_css_isp_parameter_set_info), 0)); 4544 succ = (*out != mmgr_NULL); 4545 if (succ) 4546 hmm_store(*out, 4547 me, sizeof(struct ia_css_isp_parameter_set_info)); 4548 else 4549 err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; 4550 4551 IA_CSS_LEAVE_ERR_PRIVATE(err); 4552 return err; 4553 } 4554 4555 static enum ia_css_err 4556 free_ia_css_isp_parameter_set_info( 4557 ia_css_ptr ptr) { 4558 enum ia_css_err err = IA_CSS_SUCCESS; 4559 struct ia_css_isp_parameter_set_info isp_params_info; 4560 unsigned int i; 4561 ia_css_ptr *addrs = (ia_css_ptr *) &isp_params_info.mem_map; 4562 4563 IA_CSS_ENTER_PRIVATE("ptr = %u", ptr); 4564 4565 /* sanity check - ptr must be valid */ 4566 if (!ia_css_refcount_is_valid(ptr)) 4567 { 4568 IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_SET_POOL(0x%x) invalid arg", __func__, 4569 ptr); 4570 err = IA_CSS_ERR_INVALID_ARGUMENTS; 4571 IA_CSS_LEAVE_ERR_PRIVATE(err); 4572 return err; 4573 } 4574 4575 hmm_load(ptr, &isp_params_info.mem_map, sizeof(struct sh_css_ddr_address_map)); 4576 /* copy map using size info */ 4577 for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / 4578 sizeof(size_t)); i++) 4579 { 4580 if (addrs[i] == mmgr_NULL) 4581 continue; 4582 4583 /* sanity check - ptr must be valid */ 4584 if (!ia_css_refcount_is_valid(addrs[i])) { 4585 IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, 4586 ptr); 4587 err = IA_CSS_ERR_INVALID_ARGUMENTS; 4588 continue; 4589 } 4590 4591 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); 4592 } 4593 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_SET_POOL, ptr); 4594 4595 IA_CSS_LEAVE_ERR_PRIVATE(err); 4596 return err; 4597 } 4598 4599 /* Mark all parameters as changed to force recomputing the derived ISP parameters */ 4600 void 4601 sh_css_invalidate_params(struct ia_css_stream *stream) 4602 { 4603 struct ia_css_isp_parameters *params; 4604 unsigned int i, j, mem; 4605 4606 IA_CSS_ENTER_PRIVATE("void"); 4607 assert(stream); 4608 4609 params = stream->isp_params_configs; 4610 params->isp_params_changed = true; 4611 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 4612 for (j = 0; j < SH_CSS_MAX_STAGES; j++) { 4613 for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) { 4614 params->isp_mem_params_changed[i][j][mem] = true; 4615 } 4616 } 4617 } 4618 4619 memset(¶ms->config_changed[0], 1, sizeof(params->config_changed)); 4620 params->dis_coef_table_changed = true; 4621 params->dvs2_coef_table_changed = true; 4622 params->morph_table_changed = true; 4623 params->sc_table_changed = true; 4624 params->dz_config_changed = true; 4625 params->motion_config_changed = true; 4626 4627 /*Free up theDVS table memory blocks before recomputing new table */ 4628 for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { 4629 if (params->pipe_dvs_6axis_config[i]) { 4630 free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); 4631 params->pipe_dvs_6axis_config_changed[i] = true; 4632 } 4633 } 4634 4635 IA_CSS_LEAVE_PRIVATE("void"); 4636 } 4637 4638 void 4639 sh_css_update_uds_and_crop_info( 4640 const struct ia_css_binary_info *info, 4641 const struct ia_css_frame_info *in_frame_info, 4642 const struct ia_css_frame_info *out_frame_info, 4643 const struct ia_css_resolution *dvs_env, 4644 const struct ia_css_dz_config *zoom, 4645 const struct ia_css_vector *motion_vector, 4646 struct sh_css_uds_info *uds, /* out */ 4647 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 4648 4649 bool enable_zoom) 4650 { 4651 IA_CSS_ENTER_PRIVATE("void"); 4652 4653 assert(info); 4654 assert(in_frame_info); 4655 assert(out_frame_info); 4656 assert(dvs_env); 4657 assert(zoom); 4658 assert(motion_vector); 4659 assert(uds); 4660 assert(sp_out_crop_pos); 4661 4662 uds->curr_dx = enable_zoom ? (uint16_t)zoom->dx : HRT_GDC_N; 4663 uds->curr_dy = enable_zoom ? (uint16_t)zoom->dy : HRT_GDC_N; 4664 4665 if (info->enable.dvs_envelope) { 4666 unsigned int crop_x = 0, 4667 crop_y = 0, 4668 uds_xc = 0, 4669 uds_yc = 0, 4670 env_width, env_height; 4671 int half_env_x, half_env_y; 4672 int motion_x = motion_vector->x; 4673 int motion_y = motion_vector->y; 4674 bool upscale_x = in_frame_info->res.width < out_frame_info->res.width; 4675 bool upscale_y = in_frame_info->res.height < out_frame_info->res.height; 4676 4677 if (info->enable.uds && !info->enable.ds) { 4678 /** 4679 * we calculate with the envelope that we can actually 4680 * use, the min dvs envelope is for the filter 4681 * initialization. 4682 */ 4683 env_width = dvs_env->width - 4684 SH_CSS_MIN_DVS_ENVELOPE; 4685 env_height = dvs_env->height - 4686 SH_CSS_MIN_DVS_ENVELOPE; 4687 half_env_x = env_width / 2; 4688 half_env_y = env_height / 2; 4689 /** 4690 * for digital zoom, we use the dvs envelope and make 4691 * sure that we don't include the 8 leftmost pixels or 4692 * 8 topmost rows. 4693 */ 4694 if (upscale_x) { 4695 uds_xc = (in_frame_info->res.width 4696 + env_width 4697 + SH_CSS_MIN_DVS_ENVELOPE) / 2; 4698 } else { 4699 uds_xc = (out_frame_info->res.width 4700 + env_width) / 2 4701 + SH_CSS_MIN_DVS_ENVELOPE; 4702 } 4703 if (upscale_y) { 4704 uds_yc = (in_frame_info->res.height 4705 + env_height 4706 + SH_CSS_MIN_DVS_ENVELOPE) / 2; 4707 } else { 4708 uds_yc = (out_frame_info->res.height 4709 + env_height) / 2 4710 + SH_CSS_MIN_DVS_ENVELOPE; 4711 } 4712 /* clip the motion vector to +/- half the envelope */ 4713 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4714 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4715 uds_xc += motion_x; 4716 uds_yc += motion_y; 4717 /* uds can be pipelined, remove top lines */ 4718 crop_y = 2; 4719 } else if (info->enable.ds) { 4720 env_width = dvs_env->width; 4721 env_height = dvs_env->height; 4722 half_env_x = env_width / 2; 4723 half_env_y = env_height / 2; 4724 /* clip the motion vector to +/- half the envelope */ 4725 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4726 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4727 /* for video with downscaling, the envelope is included 4728 in the input resolution. */ 4729 uds_xc = in_frame_info->res.width / 2 + motion_x; 4730 uds_yc = in_frame_info->res.height / 2 + motion_y; 4731 crop_x = info->pipeline.left_cropping; 4732 /* ds == 2 (yuv_ds) can be pipelined, remove top 4733 lines */ 4734 if (info->enable.ds & 1) 4735 crop_y = info->pipeline.top_cropping; 4736 else 4737 crop_y = 2; 4738 } else { 4739 /* video nodz: here we can only crop. We make sure we 4740 crop at least the first 8x8 pixels away. */ 4741 env_width = dvs_env->width - 4742 SH_CSS_MIN_DVS_ENVELOPE; 4743 env_height = dvs_env->height - 4744 SH_CSS_MIN_DVS_ENVELOPE; 4745 half_env_x = env_width / 2; 4746 half_env_y = env_height / 2; 4747 motion_x = clamp(motion_x, -half_env_x, half_env_x); 4748 motion_y = clamp(motion_y, -half_env_y, half_env_y); 4749 crop_x = SH_CSS_MIN_DVS_ENVELOPE 4750 + half_env_x + motion_x; 4751 crop_y = SH_CSS_MIN_DVS_ENVELOPE 4752 + half_env_y + motion_y; 4753 } 4754 4755 /* Must enforce that the crop position is even */ 4756 crop_x = EVEN_FLOOR(crop_x); 4757 crop_y = EVEN_FLOOR(crop_y); 4758 uds_xc = EVEN_FLOOR(uds_xc); 4759 uds_yc = EVEN_FLOOR(uds_yc); 4760 4761 uds->xc = (uint16_t)uds_xc; 4762 uds->yc = (uint16_t)uds_yc; 4763 sp_out_crop_pos->x = (uint16_t)crop_x; 4764 sp_out_crop_pos->y = (uint16_t)crop_y; 4765 } else { 4766 /* for down scaling, we always use the center of the image */ 4767 uds->xc = (uint16_t)in_frame_info->res.width / 2; 4768 uds->yc = (uint16_t)in_frame_info->res.height / 2; 4769 sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; 4770 sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; 4771 } 4772 IA_CSS_LEAVE_PRIVATE("void"); 4773 } 4774 4775 static enum ia_css_err 4776 sh_css_update_uds_and_crop_info_based_on_zoom_region( 4777 const struct ia_css_binary_info *info, 4778 const struct ia_css_frame_info *in_frame_info, 4779 const struct ia_css_frame_info *out_frame_info, 4780 const struct ia_css_resolution *dvs_env, 4781 const struct ia_css_dz_config *zoom, 4782 const struct ia_css_vector *motion_vector, 4783 struct sh_css_uds_info *uds, /* out */ 4784 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 4785 struct ia_css_resolution pipe_in_res, 4786 bool enable_zoom) { 4787 unsigned int x0 = 0, y0 = 0, x1 = 0, y1 = 0; 4788 enum ia_css_err err = IA_CSS_SUCCESS; 4789 /* Note: 4790 * Filter_Envelope = 0 for NND/LUT 4791 * Filter_Envelope = 1 for BCI 4792 * Filter_Envelope = 3 for BLI 4793 * Currently, not considering this filter envelope because, In uds.sp.c is recalculating 4794 * the dx/dy based on filter envelope and other information (ia_css_uds_sp_scale_params) 4795 * Ideally, That should be done on host side not on sp side. 4796 */ 4797 unsigned int filter_envelope = 0; 4798 4799 IA_CSS_ENTER_PRIVATE("void"); 4800 4801 assert(info); 4802 assert(in_frame_info); 4803 assert(out_frame_info); 4804 assert(dvs_env); 4805 assert(zoom); 4806 assert(motion_vector); 4807 assert(uds); 4808 assert(sp_out_crop_pos); 4809 x0 = zoom->zoom_region.origin.x; 4810 y0 = zoom->zoom_region.origin.y; 4811 x1 = zoom->zoom_region.resolution.width + x0; 4812 y1 = zoom->zoom_region.resolution.height + y0; 4813 4814 if ((x0 > x1) || (y0 > y1) || (x1 > pipe_in_res.width) || (y1 > pipe_in_res.height)) 4815 return IA_CSS_ERR_INVALID_ARGUMENTS; 4816 4817 if (!enable_zoom) 4818 { 4819 uds->curr_dx = HRT_GDC_N; 4820 uds->curr_dy = HRT_GDC_N; 4821 } 4822 4823 if (info->enable.dvs_envelope) 4824 { 4825 /* Zoom region is only supported by the UDS module on ISP 4826 * 2 and higher. It is not supported in video mode on ISP 1 */ 4827 return IA_CSS_ERR_INVALID_ARGUMENTS; 4828 } else 4829 { 4830 if (enable_zoom) { 4831 /* A. Calculate dx/dy based on crop region using in_frame_info 4832 * Scale the crop region if in_frame_info to the stage is not same as 4833 * actual effective input of the pipeline 4834 */ 4835 if (in_frame_info->res.width != pipe_in_res.width || 4836 in_frame_info->res.height != pipe_in_res.height) { 4837 x0 = (x0 * in_frame_info->res.width) / (pipe_in_res.width); 4838 y0 = (y0 * in_frame_info->res.height) / (pipe_in_res.height); 4839 x1 = (x1 * in_frame_info->res.width) / (pipe_in_res.width); 4840 y1 = (y1 * in_frame_info->res.height) / (pipe_in_res.height); 4841 } 4842 uds->curr_dx = 4843 ((x1 - x0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.width; 4844 uds->curr_dy = 4845 ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; 4846 4847 /* B. Calculate xc/yc based on crop region */ 4848 uds->xc = (uint16_t)x0 + (((x1) - (x0)) / 2); 4849 uds->yc = (uint16_t)y0 + (((y1) - (y0)) / 2); 4850 } else { 4851 uds->xc = (uint16_t)in_frame_info->res.width / 2; 4852 uds->yc = (uint16_t)in_frame_info->res.height / 2; 4853 } 4854 4855 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 4856 "uds->curr_dx=%d, uds->xc=%d, uds->yc=%d\n", 4857 uds->curr_dx, uds->xc, uds->yc); 4858 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x0=%d, y0=%d, x1=%d, y1=%d\n", 4859 x0, y0, x1, y1); 4860 sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; 4861 sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; 4862 } 4863 IA_CSS_LEAVE_PRIVATE("void"); 4864 return err; 4865 } 4866 4867 struct ia_css_3a_statistics * 4868 ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) 4869 { 4870 struct ia_css_3a_statistics *me; 4871 int grid_size; 4872 4873 IA_CSS_ENTER("grid=%p", grid); 4874 4875 assert(grid); 4876 4877 me = sh_css_calloc(1, sizeof(*me)); 4878 if (!me) 4879 goto err; 4880 4881 me->grid = *grid; 4882 grid_size = grid->width * grid->height; 4883 me->data = sh_css_malloc(grid_size * sizeof(*me->data)); 4884 if (!me->data) 4885 goto err; 4886 #if !defined(HAS_NO_HMEM) 4887 /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ 4888 me->rgby_data = (struct ia_css_3a_rgby_output *)sh_css_malloc(sizeof_hmem( 4889 HMEM0_ID)); 4890 #else 4891 me->rgby_data = NULL; 4892 #endif 4893 4894 IA_CSS_LEAVE("return=%p", me); 4895 return me; 4896 err: 4897 ia_css_3a_statistics_free(me); 4898 4899 IA_CSS_LEAVE("return=%p", NULL); 4900 return NULL; 4901 } 4902 4903 void 4904 ia_css_3a_statistics_free(struct ia_css_3a_statistics *me) 4905 { 4906 if (me) { 4907 sh_css_free(me->rgby_data); 4908 sh_css_free(me->data); 4909 memset(me, 0, sizeof(struct ia_css_3a_statistics)); 4910 sh_css_free(me); 4911 } 4912 } 4913 4914 struct ia_css_dvs_statistics * 4915 ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) 4916 { 4917 struct ia_css_dvs_statistics *me; 4918 4919 assert(grid); 4920 4921 me = sh_css_calloc(1, sizeof(*me)); 4922 if (!me) 4923 goto err; 4924 4925 me->grid = *grid; 4926 me->hor_proj = sh_css_malloc(grid->height * IA_CSS_DVS_NUM_COEF_TYPES * 4927 sizeof(*me->hor_proj)); 4928 if (!me->hor_proj) 4929 goto err; 4930 4931 me->ver_proj = sh_css_malloc(grid->width * IA_CSS_DVS_NUM_COEF_TYPES * 4932 sizeof(*me->ver_proj)); 4933 if (!me->ver_proj) 4934 goto err; 4935 4936 return me; 4937 err: 4938 ia_css_dvs_statistics_free(me); 4939 return NULL; 4940 } 4941 4942 void 4943 ia_css_dvs_statistics_free(struct ia_css_dvs_statistics *me) 4944 { 4945 if (me) { 4946 sh_css_free(me->hor_proj); 4947 sh_css_free(me->ver_proj); 4948 memset(me, 0, sizeof(struct ia_css_dvs_statistics)); 4949 sh_css_free(me); 4950 } 4951 } 4952 4953 struct ia_css_dvs_coefficients * 4954 ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) 4955 { 4956 struct ia_css_dvs_coefficients *me; 4957 4958 assert(grid); 4959 4960 me = sh_css_calloc(1, sizeof(*me)); 4961 if (!me) 4962 goto err; 4963 4964 me->grid = *grid; 4965 4966 me->hor_coefs = sh_css_malloc(grid->num_hor_coefs * 4967 IA_CSS_DVS_NUM_COEF_TYPES * 4968 sizeof(*me->hor_coefs)); 4969 if (!me->hor_coefs) 4970 goto err; 4971 4972 me->ver_coefs = sh_css_malloc(grid->num_ver_coefs * 4973 IA_CSS_DVS_NUM_COEF_TYPES * 4974 sizeof(*me->ver_coefs)); 4975 if (!me->ver_coefs) 4976 goto err; 4977 4978 return me; 4979 err: 4980 ia_css_dvs_coefficients_free(me); 4981 return NULL; 4982 } 4983 4984 void 4985 ia_css_dvs_coefficients_free(struct ia_css_dvs_coefficients *me) 4986 { 4987 if (me) { 4988 sh_css_free(me->hor_coefs); 4989 sh_css_free(me->ver_coefs); 4990 memset(me, 0, sizeof(struct ia_css_dvs_coefficients)); 4991 sh_css_free(me); 4992 } 4993 } 4994 4995 struct ia_css_dvs2_statistics * 4996 ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) 4997 { 4998 struct ia_css_dvs2_statistics *me; 4999 5000 assert(grid); 5001 5002 me = sh_css_calloc(1, sizeof(*me)); 5003 if (!me) 5004 goto err; 5005 5006 me->grid = *grid; 5007 5008 me->hor_prod.odd_real = sh_css_malloc(grid->aligned_width * 5009 grid->aligned_height * sizeof(*me->hor_prod.odd_real)); 5010 if (!me->hor_prod.odd_real) 5011 goto err; 5012 5013 me->hor_prod.odd_imag = sh_css_malloc(grid->aligned_width * 5014 grid->aligned_height * sizeof(*me->hor_prod.odd_imag)); 5015 if (!me->hor_prod.odd_imag) 5016 goto err; 5017 5018 me->hor_prod.even_real = sh_css_malloc(grid->aligned_width * 5019 grid->aligned_height * sizeof(*me->hor_prod.even_real)); 5020 if (!me->hor_prod.even_real) 5021 goto err; 5022 5023 me->hor_prod.even_imag = sh_css_malloc(grid->aligned_width * 5024 grid->aligned_height * sizeof(*me->hor_prod.even_imag)); 5025 if (!me->hor_prod.even_imag) 5026 goto err; 5027 5028 me->ver_prod.odd_real = sh_css_malloc(grid->aligned_width * 5029 grid->aligned_height * sizeof(*me->ver_prod.odd_real)); 5030 if (!me->ver_prod.odd_real) 5031 goto err; 5032 5033 me->ver_prod.odd_imag = sh_css_malloc(grid->aligned_width * 5034 grid->aligned_height * sizeof(*me->ver_prod.odd_imag)); 5035 if (!me->ver_prod.odd_imag) 5036 goto err; 5037 5038 me->ver_prod.even_real = sh_css_malloc(grid->aligned_width * 5039 grid->aligned_height * sizeof(*me->ver_prod.even_real)); 5040 if (!me->ver_prod.even_real) 5041 goto err; 5042 5043 me->ver_prod.even_imag = sh_css_malloc(grid->aligned_width * 5044 grid->aligned_height * sizeof(*me->ver_prod.even_imag)); 5045 if (!me->ver_prod.even_imag) 5046 goto err; 5047 5048 return me; 5049 err: 5050 ia_css_dvs2_statistics_free(me); 5051 return NULL; 5052 } 5053 5054 void 5055 ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me) 5056 { 5057 if (me) { 5058 sh_css_free(me->hor_prod.odd_real); 5059 sh_css_free(me->hor_prod.odd_imag); 5060 sh_css_free(me->hor_prod.even_real); 5061 sh_css_free(me->hor_prod.even_imag); 5062 sh_css_free(me->ver_prod.odd_real); 5063 sh_css_free(me->ver_prod.odd_imag); 5064 sh_css_free(me->ver_prod.even_real); 5065 sh_css_free(me->ver_prod.even_imag); 5066 memset(me, 0, sizeof(struct ia_css_dvs2_statistics)); 5067 sh_css_free(me); 5068 } 5069 } 5070 5071 struct ia_css_dvs2_coefficients * 5072 ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) 5073 { 5074 struct ia_css_dvs2_coefficients *me; 5075 5076 assert(grid); 5077 5078 me = sh_css_calloc(1, sizeof(*me)); 5079 if (!me) 5080 goto err; 5081 5082 me->grid = *grid; 5083 5084 me->hor_coefs.odd_real = sh_css_malloc(grid->num_hor_coefs * 5085 sizeof(*me->hor_coefs.odd_real)); 5086 if (!me->hor_coefs.odd_real) 5087 goto err; 5088 5089 me->hor_coefs.odd_imag = sh_css_malloc(grid->num_hor_coefs * 5090 sizeof(*me->hor_coefs.odd_imag)); 5091 if (!me->hor_coefs.odd_imag) 5092 goto err; 5093 5094 me->hor_coefs.even_real = sh_css_malloc(grid->num_hor_coefs * 5095 sizeof(*me->hor_coefs.even_real)); 5096 if (!me->hor_coefs.even_real) 5097 goto err; 5098 5099 me->hor_coefs.even_imag = sh_css_malloc(grid->num_hor_coefs * 5100 sizeof(*me->hor_coefs.even_imag)); 5101 if (!me->hor_coefs.even_imag) 5102 goto err; 5103 5104 me->ver_coefs.odd_real = sh_css_malloc(grid->num_ver_coefs * 5105 sizeof(*me->ver_coefs.odd_real)); 5106 if (!me->ver_coefs.odd_real) 5107 goto err; 5108 5109 me->ver_coefs.odd_imag = sh_css_malloc(grid->num_ver_coefs * 5110 sizeof(*me->ver_coefs.odd_imag)); 5111 if (!me->ver_coefs.odd_imag) 5112 goto err; 5113 5114 me->ver_coefs.even_real = sh_css_malloc(grid->num_ver_coefs * 5115 sizeof(*me->ver_coefs.even_real)); 5116 if (!me->ver_coefs.even_real) 5117 goto err; 5118 5119 me->ver_coefs.even_imag = sh_css_malloc(grid->num_ver_coefs * 5120 sizeof(*me->ver_coefs.even_imag)); 5121 if (!me->ver_coefs.even_imag) 5122 goto err; 5123 5124 return me; 5125 err: 5126 ia_css_dvs2_coefficients_free(me); 5127 return NULL; 5128 } 5129 5130 void 5131 ia_css_dvs2_coefficients_free(struct ia_css_dvs2_coefficients *me) 5132 { 5133 if (me) { 5134 sh_css_free(me->hor_coefs.odd_real); 5135 sh_css_free(me->hor_coefs.odd_imag); 5136 sh_css_free(me->hor_coefs.even_real); 5137 sh_css_free(me->hor_coefs.even_imag); 5138 sh_css_free(me->ver_coefs.odd_real); 5139 sh_css_free(me->ver_coefs.odd_imag); 5140 sh_css_free(me->ver_coefs.even_real); 5141 sh_css_free(me->ver_coefs.even_imag); 5142 memset(me, 0, sizeof(struct ia_css_dvs2_coefficients)); 5143 sh_css_free(me); 5144 } 5145 } 5146 5147 struct ia_css_dvs_6axis_config * 5148 ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream) 5149 { 5150 struct ia_css_dvs_6axis_config *dvs_config = NULL; 5151 struct ia_css_isp_parameters *params = NULL; 5152 unsigned int width_y; 5153 unsigned int height_y; 5154 unsigned int width_uv; 5155 unsigned int height_uv; 5156 5157 assert(stream); 5158 params = stream->isp_params_configs; 5159 5160 /* Backward compatibility by default consider pipe as Video*/ 5161 if (!params || (params && 5162 !params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO])) { 5163 goto err; 5164 } 5165 5166 dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_calloc(1, 5167 sizeof(struct ia_css_dvs_6axis_config)); 5168 if (!dvs_config) 5169 goto err; 5170 5171 dvs_config->width_y = width_y = 5172 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_y; 5173 dvs_config->height_y = height_y = 5174 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_y; 5175 dvs_config->width_uv = width_uv = 5176 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_uv; 5177 dvs_config->height_uv = height_uv = 5178 params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_uv; 5179 IA_CSS_LOG("table Y: W %d H %d", width_y, height_y); 5180 IA_CSS_LOG("table UV: W %d H %d", width_uv, height_uv); 5181 dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( 5182 uint32_t)); 5183 if (!dvs_config->xcoords_y) 5184 goto err; 5185 5186 dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( 5187 uint32_t)); 5188 if (!dvs_config->ycoords_y) 5189 goto err; 5190 5191 dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * 5192 sizeof(uint32_t)); 5193 if (!dvs_config->xcoords_uv) 5194 goto err; 5195 5196 dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * 5197 sizeof(uint32_t)); 5198 if (!dvs_config->ycoords_uv) 5199 goto err; 5200 5201 return dvs_config; 5202 err: 5203 ia_css_dvs2_6axis_config_free(dvs_config); 5204 return NULL; 5205 } 5206 5207 void 5208 ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config) 5209 { 5210 if (dvs_6axis_config) { 5211 sh_css_free(dvs_6axis_config->xcoords_y); 5212 sh_css_free(dvs_6axis_config->ycoords_y); 5213 sh_css_free(dvs_6axis_config->xcoords_uv); 5214 sh_css_free(dvs_6axis_config->ycoords_uv); 5215 memset(dvs_6axis_config, 0, sizeof(struct ia_css_dvs_6axis_config)); 5216 sh_css_free(dvs_6axis_config); 5217 } 5218 } 5219 5220 void 5221 ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) 5222 { 5223 struct ia_css_pipe *pipe; 5224 struct ia_css_pipeline *pipeline; 5225 struct ia_css_pipeline_stage *stage; 5226 enum ia_css_pipe_id pipe_id; 5227 enum ia_css_err err; 5228 int i; 5229 5230 if (!stream) 5231 return; 5232 5233 for (i = 0; i < stream->num_pipes; i++) { 5234 pipe = stream->pipes[i]; 5235 pipeline = ia_css_pipe_get_pipeline(pipe); 5236 pipe_id = pipeline->pipe_id; 5237 5238 if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) { 5239 err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, 5240 &stage); 5241 if (err == IA_CSS_SUCCESS) 5242 stage->enable_zoom = enable; 5243 break; 5244 } 5245 } 5246 } 5247