1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #ifndef _SH_CSS_INTERNAL_H_ 17 #define _SH_CSS_INTERNAL_H_ 18 19 #include <system_global.h> 20 #include <math_support.h> 21 #include <type_support.h> 22 #include <platform_support.h> 23 #include <stdarg.h> 24 25 #if !defined(HAS_NO_INPUT_FORMATTER) 26 #include "input_formatter.h" 27 #endif 28 #include "input_system.h" 29 30 #include "ia_css_types.h" 31 #include "ia_css_acc_types.h" 32 #include "ia_css_buffer.h" 33 34 #include "ia_css_binary.h" 35 #include "sh_css_firmware.h" /* not needed/desired on SP/ISP */ 36 #include "sh_css_legacy.h" 37 #include "sh_css_defs.h" 38 #include "sh_css_uds.h" 39 #include "dma.h" /* N_DMA_CHANNEL_ID */ 40 #include "ia_css_circbuf_comm.h" /* Circular buffer */ 41 #include "ia_css_frame_comm.h" 42 #include "ia_css_3a.h" 43 #include "ia_css_dvs.h" 44 #include "ia_css_metadata.h" 45 #include "runtime/bufq/interface/ia_css_bufq.h" 46 #include "ia_css_timer.h" 47 48 /* TODO: Move to a more suitable place when sp pipeline design is done. */ 49 #define IA_CSS_NUM_CB_SEM_READ_RESOURCE 2 50 #define IA_CSS_NUM_CB_SEM_WRITE_RESOURCE 1 51 #define IA_CSS_NUM_CBS 2 52 #define IA_CSS_CB_MAX_ELEMS 2 53 54 /* Use case specific. index limited to IA_CSS_NUM_CB_SEM_READ_RESOURCE or 55 * IA_CSS_NUM_CB_SEM_WRITE_RESOURCE for read and write respectively. 56 * TODO: Enforce the limitation above. 57 */ 58 #define IA_CSS_COPYSINK_SEM_INDEX 0 59 #define IA_CSS_TAGGER_SEM_INDEX 1 60 61 /* Force generation of output event. Used by acceleration pipe. */ 62 #define IA_CSS_POST_OUT_EVENT_FORCE 2 63 64 #define SH_CSS_MAX_BINARY_NAME 64 65 66 #define SP_DEBUG_NONE (0) 67 #define SP_DEBUG_DUMP (1) 68 #define SP_DEBUG_COPY (2) 69 #define SP_DEBUG_TRACE (3) 70 #define SP_DEBUG_MINIMAL (4) 71 72 #define SP_DEBUG SP_DEBUG_NONE 73 #define SP_DEBUG_MINIMAL_OVERWRITE 1 74 75 #define SH_CSS_TNR_BIT_DEPTH 8 76 #define SH_CSS_REF_BIT_DEPTH 8 77 78 /* keep next up to date with the definition for MAX_CB_ELEMS_FOR_TAGGER in tagger.sp.c */ 79 #define NUM_CONTINUOUS_FRAMES 15 80 #define NUM_MIPI_FRAMES_PER_STREAM 2 81 82 #define NUM_ONLINE_INIT_CONTINUOUS_FRAMES 2 83 84 #define NR_OF_PIPELINES IA_CSS_PIPE_ID_NUM /* Must match with IA_CSS_PIPE_ID_NUM */ 85 86 #define SH_CSS_MAX_IF_CONFIGS 3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/ 87 #define SH_CSS_IF_CONFIG_NOT_NEEDED 0xFF 88 89 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) 90 #define SH_CSS_ENABLE_METADATA 91 #endif 92 93 #if defined(SH_CSS_ENABLE_METADATA) && !defined(USE_INPUT_SYSTEM_VERSION_2401) 94 #define SH_CSS_ENABLE_METADATA_THREAD 95 #endif 96 97 /* 98 * SH_CSS_MAX_SP_THREADS: 99 * sp threads visible to host with connected communication queues 100 * these threads are capable of running an image pipe 101 * SH_CSS_MAX_SP_INTERNAL_THREADS: 102 * internal sp service threads, no communication queues to host 103 * these threads can't be used as image pipe 104 */ 105 106 #if defined(SH_CSS_ENABLE_METADATA_THREAD) 107 #define SH_CSS_SP_INTERNAL_METADATA_THREAD 1 108 #else 109 #define SH_CSS_SP_INTERNAL_METADATA_THREAD 0 110 #endif 111 112 #define SH_CSS_SP_INTERNAL_SERVICE_THREAD 1 113 114 #define SH_CSS_MAX_SP_THREADS 5 115 116 #define SH_CSS_MAX_SP_INTERNAL_THREADS (\ 117 SH_CSS_SP_INTERNAL_SERVICE_THREAD +\ 118 SH_CSS_SP_INTERNAL_METADATA_THREAD) 119 120 #define SH_CSS_MAX_PIPELINES SH_CSS_MAX_SP_THREADS 121 122 /** 123 * The C99 standard does not specify the exact object representation of structs; 124 * the representation is compiler dependent. 125 * 126 * The structs that are communicated between host and SP/ISP should have the 127 * exact same object representation. The compiler that is used to compile the 128 * firmware is hivecc. 129 * 130 * To check if a different compiler, used to compile a host application, uses 131 * another object representation, macros are defined specifying the size of 132 * the structs as expected by the firmware. 133 * 134 * A host application shall verify that a sizeof( ) of the struct is equal to 135 * the SIZE_OF_XXX macro of the corresponding struct. If they are not 136 * equal, functionality will break. 137 */ 138 #define CALC_ALIGNMENT_MEMBER(x, y) (CEIL_MUL(x, y) - x) 139 #define SIZE_OF_HRT_VADDRESS sizeof(hive_uint32) 140 #define SIZE_OF_IA_CSS_PTR sizeof(uint32_t) 141 142 /* Number of SP's */ 143 #define NUM_OF_SPS 1 144 145 #define NUM_OF_BLS 0 146 147 /* Enum for order of Binaries */ 148 enum sh_css_order_binaries { 149 SP_FIRMWARE = 0, 150 ISP_FIRMWARE 151 }; 152 153 /* 154 * JB: keep next enum in sync with thread id's 155 * and pipe id's 156 */ 157 enum sh_css_pipe_config_override { 158 SH_CSS_PIPE_CONFIG_OVRD_NONE = 0, 159 SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD = 0xffff 160 }; 161 162 enum host2sp_commands { 163 host2sp_cmd_error = 0, 164 /* 165 * The host2sp_cmd_ready command is the only command written by the SP 166 * It acknowledges that is previous command has been received. 167 * (this does not mean that the command has been executed) 168 * It also indicates that a new command can be send (it is a queue 169 * with depth 1). 170 */ 171 host2sp_cmd_ready = 1, 172 /* Command written by the Host */ 173 host2sp_cmd_dummy, /* No action, can be used as watchdog */ 174 host2sp_cmd_start_flash, /* Request SP to start the flash */ 175 host2sp_cmd_terminate, /* SP should terminate itself */ 176 N_host2sp_cmd 177 }; 178 179 /* Enumeration used to indicate the events that are produced by 180 * the SP and consumed by the Host. 181 * 182 * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: 183 * 1) "enum ia_css_event_type" (ia_css_event_public.h) 184 * 2) "enum sh_css_sp_event_type" (sh_css_internal.h) 185 * 3) "enum ia_css_event_type event_id_2_event_mask" (event_handler.sp.c) 186 * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) 187 */ 188 enum sh_css_sp_event_type { 189 SH_CSS_SP_EVENT_OUTPUT_FRAME_DONE, 190 SH_CSS_SP_EVENT_SECOND_OUTPUT_FRAME_DONE, 191 SH_CSS_SP_EVENT_VF_OUTPUT_FRAME_DONE, 192 SH_CSS_SP_EVENT_SECOND_VF_OUTPUT_FRAME_DONE, 193 SH_CSS_SP_EVENT_3A_STATISTICS_DONE, 194 SH_CSS_SP_EVENT_DIS_STATISTICS_DONE, 195 SH_CSS_SP_EVENT_PIPELINE_DONE, 196 SH_CSS_SP_EVENT_FRAME_TAGGED, 197 SH_CSS_SP_EVENT_INPUT_FRAME_DONE, 198 SH_CSS_SP_EVENT_METADATA_DONE, 199 SH_CSS_SP_EVENT_LACE_STATISTICS_DONE, 200 SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE, 201 SH_CSS_SP_EVENT_TIMER, 202 SH_CSS_SP_EVENT_PORT_EOF, 203 SH_CSS_SP_EVENT_FW_WARNING, 204 SH_CSS_SP_EVENT_FW_ASSERT, 205 SH_CSS_SP_EVENT_NR_OF_TYPES /* must be last */ 206 }; 207 208 /* xmem address map allocation per pipeline, css pointers */ 209 /* Note that the struct below should only consist of ia_css_ptr-es 210 Otherwise this will cause a fail in the function ref_sh_css_ddr_address_map 211 */ 212 struct sh_css_ddr_address_map { 213 ia_css_ptr isp_param; 214 ia_css_ptr isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; 215 ia_css_ptr macc_tbl; 216 ia_css_ptr fpn_tbl; 217 ia_css_ptr sc_tbl; 218 ia_css_ptr tetra_r_x; 219 ia_css_ptr tetra_r_y; 220 ia_css_ptr tetra_gr_x; 221 ia_css_ptr tetra_gr_y; 222 ia_css_ptr tetra_gb_x; 223 ia_css_ptr tetra_gb_y; 224 ia_css_ptr tetra_b_x; 225 ia_css_ptr tetra_b_y; 226 ia_css_ptr tetra_ratb_x; 227 ia_css_ptr tetra_ratb_y; 228 ia_css_ptr tetra_batr_x; 229 ia_css_ptr tetra_batr_y; 230 ia_css_ptr dvs_6axis_params_y; 231 }; 232 233 #define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT \ 234 (SIZE_OF_HRT_VADDRESS + \ 235 (SH_CSS_MAX_STAGES * IA_CSS_NUM_MEMORIES * SIZE_OF_HRT_VADDRESS) + \ 236 (16 * SIZE_OF_HRT_VADDRESS)) 237 238 /* xmem address map allocation per pipeline */ 239 struct sh_css_ddr_address_map_size { 240 size_t isp_param; 241 size_t isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; 242 size_t macc_tbl; 243 size_t fpn_tbl; 244 size_t sc_tbl; 245 size_t tetra_r_x; 246 size_t tetra_r_y; 247 size_t tetra_gr_x; 248 size_t tetra_gr_y; 249 size_t tetra_gb_x; 250 size_t tetra_gb_y; 251 size_t tetra_b_x; 252 size_t tetra_b_y; 253 size_t tetra_ratb_x; 254 size_t tetra_ratb_y; 255 size_t tetra_batr_x; 256 size_t tetra_batr_y; 257 size_t dvs_6axis_params_y; 258 }; 259 260 struct sh_css_ddr_address_map_compound { 261 struct sh_css_ddr_address_map map; 262 struct sh_css_ddr_address_map_size size; 263 }; 264 265 struct ia_css_isp_parameter_set_info { 266 struct sh_css_ddr_address_map 267 mem_map;/** pointers to Parameters in ISP format IMPT: 268 This should be first member of this struct */ 269 u32 270 isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */ 271 ia_css_ptr 272 output_frame_ptr;/** Output frame to which this config has to be applied (optional) */ 273 }; 274 275 /* this struct contains all arguments that can be passed to 276 a binary. It depends on the binary which ones are used. */ 277 struct sh_css_binary_args { 278 struct ia_css_frame *in_frame; /* input frame */ 279 const struct ia_css_frame 280 *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ 281 const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ 282 struct ia_css_frame 283 *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ 284 struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ 285 bool copy_vf; 286 bool copy_output; 287 unsigned int vf_downscale_log2; 288 }; 289 290 #if SP_DEBUG == SP_DEBUG_DUMP 291 292 #define SH_CSS_NUM_SP_DEBUG 48 293 294 struct sh_css_sp_debug_state { 295 unsigned int error; 296 unsigned int debug[SH_CSS_NUM_SP_DEBUG]; 297 }; 298 299 #elif SP_DEBUG == SP_DEBUG_COPY 300 301 #define SH_CSS_SP_DBG_TRACE_DEPTH (40) 302 303 struct sh_css_sp_debug_trace { 304 u16 frame; 305 u16 line; 306 u16 pixel_distance; 307 u16 mipi_used_dword; 308 u16 sp_index; 309 }; 310 311 struct sh_css_sp_debug_state { 312 u16 if_start_line; 313 u16 if_start_column; 314 u16 if_cropped_height; 315 u16 if_cropped_width; 316 unsigned int index; 317 struct sh_css_sp_debug_trace 318 trace[SH_CSS_SP_DBG_TRACE_DEPTH]; 319 }; 320 321 #elif SP_DEBUG == SP_DEBUG_TRACE 322 323 #if 1 324 /* Example of just one global trace */ 325 #define SH_CSS_SP_DBG_NR_OF_TRACES (1) 326 #define SH_CSS_SP_DBG_TRACE_DEPTH (40) 327 #else 328 /* E.g. if you like separate traces for 4 threads */ 329 #define SH_CSS_SP_DBG_NR_OF_TRACES (4) 330 #define SH_CSS_SP_DBG_TRACE_DEPTH (10) 331 #endif 332 333 #define SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS (13) 334 335 struct sh_css_sp_debug_trace { 336 u16 time_stamp; 337 u16 location; /* bit 15..13 = file_id, 12..0 = line nr. */ 338 u32 data; 339 }; 340 341 struct sh_css_sp_debug_state { 342 struct sh_css_sp_debug_trace 343 trace[SH_CSS_SP_DBG_NR_OF_TRACES][SH_CSS_SP_DBG_TRACE_DEPTH]; 344 u16 index_last[SH_CSS_SP_DBG_NR_OF_TRACES]; 345 u8 index[SH_CSS_SP_DBG_NR_OF_TRACES]; 346 }; 347 348 #elif SP_DEBUG == SP_DEBUG_MINIMAL 349 350 #define SH_CSS_NUM_SP_DEBUG 128 351 352 struct sh_css_sp_debug_state { 353 unsigned int error; 354 unsigned int debug[SH_CSS_NUM_SP_DEBUG]; 355 }; 356 357 #endif 358 359 struct sh_css_sp_debug_command { 360 /* 361 * The DMA software-mask, 362 * Bit 31...24: unused. 363 * Bit 23...16: unused. 364 * Bit 15...08: reading-request enabling bits for DMA channel 7..0 365 * Bit 07...00: writing-request enabling bits for DMA channel 7..0 366 * 367 * For example, "0...0 0...0 11111011 11111101" indicates that the 368 * writing request through DMA Channel 1 and the reading request 369 * through DMA channel 2 are both disabled. The others are enabled. 370 */ 371 u32 dma_sw_reg; 372 }; 373 374 #if !defined(HAS_NO_INPUT_FORMATTER) 375 /* SP input formatter configuration.*/ 376 struct sh_css_sp_input_formatter_set { 377 u32 stream_format; 378 input_formatter_cfg_t config_a; 379 input_formatter_cfg_t config_b; 380 }; 381 #endif 382 383 #define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3) 384 385 /* SP configuration information */ 386 struct sh_css_sp_config { 387 u8 no_isp_sync; /* Signal host immediately after start */ 388 u8 enable_raw_pool_locking; /** Enable Raw Buffer Locking for HALv3 Support */ 389 u8 lock_all; 390 /** If raw buffer locking is enabled, this flag indicates whether raw 391 frames are locked when their EOF event is successfully sent to the 392 host (true) or when they are passed to the preview/video pipe 393 (false). */ 394 #if !defined(HAS_NO_INPUT_FORMATTER) 395 struct { 396 u8 a_changed; 397 u8 b_changed; 398 u8 isp_2ppc; 399 struct sh_css_sp_input_formatter_set 400 set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */ 401 } input_formatter; 402 #endif 403 #if defined(USE_INPUT_SYSTEM_VERSION_2) 404 sync_generator_cfg_t sync_gen; 405 tpg_cfg_t tpg; 406 prbs_cfg_t prbs; 407 input_system_cfg_t input_circuit; 408 u8 input_circuit_cfg_changed; 409 u32 mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; 410 #endif 411 u8 enable_isys_event_queue; 412 u8 disable_cont_vf; 413 }; 414 415 enum sh_css_stage_type { 416 SH_CSS_SP_STAGE_TYPE = 0, 417 SH_CSS_ISP_STAGE_TYPE = 1 418 }; 419 420 #define SH_CSS_NUM_STAGE_TYPES 2 421 422 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS BIT(0) 423 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS_MASK \ 424 ((SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << SH_CSS_MAX_SP_THREADS) - 1) 425 426 #if defined(USE_INPUT_SYSTEM_VERSION_2401) 427 struct sh_css_sp_pipeline_terminal { 428 union { 429 /* Input System 2401 */ 430 virtual_input_system_stream_t 431 virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; 432 } context; 433 /* 434 * TODO 435 * - Remove "virtual_input_system_cfg" when the ISYS2401 DLI is ready. 436 */ 437 union { 438 /* Input System 2401 */ 439 virtual_input_system_stream_cfg_t 440 virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; 441 } ctrl; 442 }; 443 444 struct sh_css_sp_pipeline_io { 445 struct sh_css_sp_pipeline_terminal input; 446 /* pqiao: comment out temporarily to save dmem */ 447 /*struct sh_css_sp_pipeline_terminal output;*/ 448 }; 449 450 /* This struct tracks how many streams are registered per CSI port. 451 * This is used to track which streams have already been configured. 452 * Only when all streams are configured, the CSI RX is started for that port. 453 */ 454 struct sh_css_sp_pipeline_io_status { 455 u32 active[N_INPUT_SYSTEM_CSI_PORT]; /** registered streams */ 456 u32 running[N_INPUT_SYSTEM_CSI_PORT]; /** configured streams */ 457 }; 458 459 #endif 460 enum sh_css_port_dir { 461 SH_CSS_PORT_INPUT = 0, 462 SH_CSS_PORT_OUTPUT = 1 463 }; 464 465 enum sh_css_port_type { 466 SH_CSS_HOST_TYPE = 0, 467 SH_CSS_COPYSINK_TYPE = 1, 468 SH_CSS_TAGGERSINK_TYPE = 2 469 }; 470 471 /* Pipe inout settings: output port on 7-4bits, input port on 3-0bits */ 472 #define SH_CSS_PORT_FLD_WIDTH_IN_BITS (4) 473 #define SH_CSS_PORT_TYPE_BIT_FLD(pt) (0x1 << (pt)) 474 #define SH_CSS_PORT_FLD(pd) ((pd) ? SH_CSS_PORT_FLD_WIDTH_IN_BITS : 0) 475 #define SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) ((p) |= (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) 476 #define SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt) ((p) &= ~(SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) 477 #define SH_CSS_PIPE_PORT_CONFIG_SET(p, pd, pt, val) ((val) ? \ 478 SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) : SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt)) 479 #define SH_CSS_PIPE_PORT_CONFIG_GET(p, pd, pt) ((p) & (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) 480 #define SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(p) \ 481 (!(SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_INPUT, SH_CSS_HOST_TYPE) && \ 482 SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_OUTPUT, SH_CSS_HOST_TYPE))) 483 484 #define IA_CSS_ACQUIRE_ISP_POS 31 485 486 /* Flags for metadata processing */ 487 #define SH_CSS_METADATA_ENABLED 0x01 488 #define SH_CSS_METADATA_PROCESSED 0x02 489 #define SH_CSS_METADATA_OFFLINE_MODE 0x04 490 #define SH_CSS_METADATA_WAIT_INPUT 0x08 491 492 /* @brief Free an array of metadata buffers. 493 * 494 * @param[in] num_bufs Number of metadata buffers to be freed. 495 * @param[in] bufs Pointer of array of metadata buffers. 496 * 497 * This function frees an array of metadata buffers. 498 */ 499 void 500 ia_css_metadata_free_multiple(unsigned int num_bufs, 501 struct ia_css_metadata **bufs); 502 503 /* Macro for handling pipe_qos_config */ 504 #define QOS_INVALID (~0U) 505 #define QOS_ALL_STAGES_DISABLED (0U) 506 #define QOS_STAGE_MASK(num) (0x00000001 << num) 507 #define SH_CSS_IS_QOS_PIPE(pipe) ((pipe)->pipe_qos_config != QOS_INVALID) 508 #define SH_CSS_QOS_STAGE_ENABLE(pipe, num) ((pipe)->pipe_qos_config |= QOS_STAGE_MASK(num)) 509 #define SH_CSS_QOS_STAGE_DISABLE(pipe, num) ((pipe)->pipe_qos_config &= ~QOS_STAGE_MASK(num)) 510 #define SH_CSS_QOS_STAGE_IS_ENABLED(pipe, num) ((pipe)->pipe_qos_config & QOS_STAGE_MASK(num)) 511 #define SH_CSS_QOS_STAGE_IS_ALL_DISABLED(pipe) ((pipe)->pipe_qos_config == QOS_ALL_STAGES_DISABLED) 512 #define SH_CSS_QOS_MODE_PIPE_ADD(mode, pipe) ((mode) |= (0x1 << (pipe)->pipe_id)) 513 #define SH_CSS_QOS_MODE_PIPE_REMOVE(mode, pipe) ((mode) &= ~(0x1 << (pipe)->pipe_id)) 514 #define SH_CSS_IS_QOS_ONLY_MODE(mode) ((mode) == (0x1 << IA_CSS_PIPE_ID_ACC)) 515 516 /* Information for a pipeline */ 517 struct sh_css_sp_pipeline { 518 u32 pipe_id; /* the pipe ID */ 519 u32 pipe_num; /* the dynamic pipe number */ 520 u32 thread_id; /* the sp thread ID */ 521 u32 pipe_config; /* the pipe config */ 522 u32 pipe_qos_config; /* Bitmap of multiple QOS extension fw state. 523 (0xFFFFFFFF) indicates non QOS pipe.*/ 524 u32 inout_port_config; 525 u32 required_bds_factor; 526 u32 dvs_frame_delay; 527 u32 input_system_mode; /* enum ia_css_input_mode */ 528 u32 port_id; /* port_id for input system */ 529 u32 num_stages; /* the pipe config */ 530 u32 running; /* needed for pipe termination */ 531 ia_css_ptr sp_stage_addr[SH_CSS_MAX_STAGES]; 532 ia_css_ptr scaler_pp_lut; /* Early bound LUT */ 533 u32 dummy; /* stage ptr is only used on sp but lives in 534 this struct; needs cleanup */ 535 s32 num_execs; /* number of times to run if this is 536 an acceleration pipe. */ 537 #if defined(SH_CSS_ENABLE_METADATA) 538 struct { 539 u32 format; /* Metadata format in hrt format */ 540 u32 width; /* Width of a line */ 541 u32 height; /* Number of lines */ 542 u32 stride; /* Stride (in bytes) per line */ 543 u32 size; /* Total size (in bytes) */ 544 ia_css_ptr cont_buf; /* Address of continuous buffer */ 545 } metadata; 546 #endif 547 #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) 548 u32 output_frame_queue_id; 549 #endif 550 union { 551 struct { 552 u32 bytes_available; 553 } bin; 554 struct { 555 u32 height; 556 u32 width; 557 u32 padded_width; 558 u32 max_input_width; 559 u32 raw_bit_depth; 560 } raw; 561 } copy; 562 563 /* ISP2401 */ 564 565 /* Parameters passed to Shading Correction kernel. */ 566 struct { 567 u32 internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */ 568 u32 internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */ 569 } shading; 570 }; 571 572 /* 573 * The first frames (with comment Dynamic) can be dynamic or static 574 * The other frames (ref_in and below) can only be static 575 * Static means that the data address will not change during the life time 576 * of the associated pipe. Dynamic means that the data address can 577 * change with every (frame) iteration of the associated pipe 578 * 579 * s3a and dis are now also dynamic but (stil) handled separately 580 */ 581 #define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3) 582 583 struct ia_css_frames_sp { 584 struct ia_css_frame_sp in; 585 struct ia_css_frame_sp out[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; 586 struct ia_css_resolution effective_in_res; 587 struct ia_css_frame_sp out_vf; 588 struct ia_css_frame_sp_info internal_frame_info; 589 struct ia_css_buffer_sp s3a_buf; 590 struct ia_css_buffer_sp dvs_buf; 591 #if defined SH_CSS_ENABLE_METADATA 592 struct ia_css_buffer_sp metadata_buf; 593 #endif 594 }; 595 596 /* Information for a single pipeline stage for an ISP */ 597 struct sh_css_isp_stage { 598 /* 599 * For compatibility and portabilty, only types 600 * from "stdint.h" are allowed 601 * 602 * Use of "enum" and "bool" is prohibited 603 * Multiple boolean flags can be stored in an 604 * integer 605 */ 606 struct ia_css_blob_info blob_info; 607 struct ia_css_binary_info binary_info; 608 char binary_name[SH_CSS_MAX_BINARY_NAME]; 609 struct ia_css_isp_param_css_segments mem_initializers; 610 }; 611 612 /* Information for a single pipeline stage */ 613 struct sh_css_sp_stage { 614 /* 615 * For compatibility and portabilty, only types 616 * from "stdint.h" are allowed 617 * 618 * Use of "enum" and "bool" is prohibited 619 * Multiple boolean flags can be stored in an 620 * integer 621 */ 622 u8 num; /* Stage number */ 623 u8 isp_online; 624 u8 isp_copy_vf; 625 u8 isp_copy_output; 626 u8 sp_enable_xnr; 627 u8 isp_deci_log_factor; 628 u8 isp_vf_downscale_bits; 629 u8 deinterleaved; 630 /* 631 * NOTE: Programming the input circuit can only be done at the 632 * start of a session. It is illegal to program it during execution 633 * The input circuit defines the connectivity 634 */ 635 u8 program_input_circuit; 636 /* enum ia_css_pipeline_stage_sp_func func; */ 637 u8 func; 638 /* The type of the pipe-stage */ 639 /* enum sh_css_stage_type stage_type; */ 640 u8 stage_type; 641 u8 num_stripes; 642 u8 isp_pipe_version; 643 struct { 644 u8 vf_output; 645 u8 s3a; 646 u8 sdis; 647 u8 dvs_stats; 648 u8 lace_stats; 649 } enable; 650 /* Add padding to come to a word boundary */ 651 /* unsigned char padding[0]; */ 652 653 struct sh_css_crop_pos sp_out_crop_pos; 654 struct ia_css_frames_sp frames; 655 struct ia_css_resolution dvs_envelope; 656 struct sh_css_uds_info uds; 657 ia_css_ptr isp_stage_addr; 658 ia_css_ptr xmem_bin_addr; 659 ia_css_ptr xmem_map_addr; 660 661 u16 top_cropping; 662 u16 row_stripes_height; 663 u16 row_stripes_overlap_lines; 664 u8 if_config_index; /* Which should be applied by this stage. */ 665 }; 666 667 /* 668 * Time: 2012-07-19, 17:40. 669 * Note: Add a new data memeber "debug" in "sh_css_sp_group". This 670 * data member is used to pass the debugging command from the 671 * Host to the SP. 672 * 673 * Time: Before 2012-07-19. 674 * Note: 675 * Group all host initialized SP variables into this struct. 676 * This is initialized every stage through dma. 677 * The stage part itself is transferred through sh_css_sp_stage. 678 */ 679 struct sh_css_sp_group { 680 struct sh_css_sp_config config; 681 struct sh_css_sp_pipeline pipe[SH_CSS_MAX_SP_THREADS]; 682 #if defined(USE_INPUT_SYSTEM_VERSION_2401) 683 struct sh_css_sp_pipeline_io pipe_io[SH_CSS_MAX_SP_THREADS]; 684 struct sh_css_sp_pipeline_io_status pipe_io_status; 685 #endif 686 struct sh_css_sp_debug_command debug; 687 }; 688 689 /* Data in SP dmem that is set from the host every stage. */ 690 struct sh_css_sp_per_frame_data { 691 /* ddr address of sp_group and sp_stage */ 692 ia_css_ptr sp_group_addr; 693 }; 694 695 #define SH_CSS_NUM_SDW_IRQS 3 696 697 /* Output data from SP to css */ 698 struct sh_css_sp_output { 699 unsigned int bin_copy_bytes_copied; 700 #if SP_DEBUG != SP_DEBUG_NONE 701 struct sh_css_sp_debug_state debug; 702 #endif 703 unsigned int sw_interrupt_value[SH_CSS_NUM_SDW_IRQS]; 704 }; 705 706 #define CONFIG_ON_FRAME_ENQUEUE() 0 707 708 /** 709 * @brief Data structure for the circular buffer. 710 * The circular buffer is empty if "start == end". The 711 * circular buffer is full if "(end + 1) % size == start". 712 */ 713 /* Variable Sized Buffer Queue Elements */ 714 715 #define IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE 6 716 #define IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE 3 717 #define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 6 718 719 /* sp-to-host queue is expected to be emptied in ISR since 720 * it is used instead of HW interrupts (due to HW design issue). 721 * We need one queue element per CSI port. */ 722 #define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) 723 /* The host-to-sp queue needs to allow for some delay 724 * in the emptying of this queue in the SP since there is no 725 * separate SP thread for this. */ 726 #define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) 727 728 #define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13 729 #define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 19 730 #define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 26 /* holds events for all type of buffers, hence deeper */ 731 732 struct sh_css_hmm_buffer { 733 union { 734 struct ia_css_isp_3a_statistics s3a; 735 struct ia_css_isp_dvs_statistics dis; 736 ia_css_ptr skc_dvs_statistics; 737 ia_css_ptr lace_stat; 738 struct ia_css_metadata metadata; 739 struct frame_data_wrapper { 740 ia_css_ptr frame_data; 741 u32 flashed; 742 u32 exp_id; 743 u32 isp_parameters_id; /** Unique ID to track which config was 744 actually applied to a particular frame */ 745 #if CONFIG_ON_FRAME_ENQUEUE() 746 struct sh_css_config_on_frame_enqueue config_on_frame_enqueue; 747 #endif 748 } frame; 749 ia_css_ptr ddr_ptrs; 750 } payload; 751 /* 752 * kernel_ptr is present for host administration purposes only. 753 * type is uint64_t in order to be 64-bit host compatible. 754 * uint64_t does not exist on SP/ISP. 755 * Size of the struct is checked by sp.hive.c. 756 */ 757 CSS_ALIGN(u64 cookie_ptr, 8); /* TODO: check if this alignment is needed */ 758 u64 kernel_ptr; 759 struct ia_css_time_meas timing_data; 760 clock_value_t isys_eof_clock_tick; 761 }; 762 763 #if CONFIG_ON_FRAME_ENQUEUE() 764 #define SIZE_OF_FRAME_STRUCT \ 765 (SIZE_OF_HRT_VADDRESS + \ 766 (3 * sizeof(uint32_t)) + \ 767 sizeof(uint32_t)) 768 #else 769 #define SIZE_OF_FRAME_STRUCT \ 770 (SIZE_OF_HRT_VADDRESS + \ 771 (3 * sizeof(uint32_t))) 772 #endif 773 774 #define SIZE_OF_PAYLOAD_UNION \ 775 (MAX(MAX(MAX(MAX( \ 776 SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT, \ 777 SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT), \ 778 SIZE_OF_IA_CSS_METADATA_STRUCT), \ 779 SIZE_OF_FRAME_STRUCT), \ 780 SIZE_OF_HRT_VADDRESS)) 781 782 /* Do not use sizeof(uint64_t) since that does not exist of SP */ 783 #define SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT \ 784 (SIZE_OF_PAYLOAD_UNION + \ 785 CALC_ALIGNMENT_MEMBER(SIZE_OF_PAYLOAD_UNION, 8) + \ 786 8 + \ 787 8 + \ 788 SIZE_OF_IA_CSS_TIME_MEAS_STRUCT + \ 789 SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT + \ 790 CALC_ALIGNMENT_MEMBER(SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT, 8)) 791 792 enum sh_css_queue_type { 793 sh_css_invalid_queue_type = -1, 794 sh_css_host2sp_buffer_queue, 795 sh_css_sp2host_buffer_queue, 796 sh_css_host2sp_psys_event_queue, 797 sh_css_sp2host_psys_event_queue, 798 sh_css_sp2host_isys_event_queue, 799 sh_css_host2sp_isys_event_queue, 800 sh_css_host2sp_tag_cmd_queue, 801 }; 802 803 struct sh_css_event_irq_mask { 804 u16 or_mask; 805 u16 and_mask; 806 }; 807 808 #define SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT \ 809 (2 * sizeof(uint16_t)) 810 811 struct host_sp_communication { 812 /* 813 * Don't use enum host2sp_commands, because the sizeof an enum is 814 * compiler dependent and thus non-portable 815 */ 816 u32 host2sp_command; 817 818 /* 819 * The frame buffers that are reused by the 820 * copy pipe in the offline preview mode. 821 * 822 * host2sp_offline_frames[0]: the input frame of the preview pipe. 823 * host2sp_offline_frames[1]: the output frame of the copy pipe. 824 * 825 * TODO: 826 * Remove it when the Host and the SP is decoupled. 827 */ 828 ia_css_ptr host2sp_offline_frames[NUM_CONTINUOUS_FRAMES]; 829 ia_css_ptr host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES]; 830 831 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) 832 ia_css_ptr host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; 833 ia_css_ptr host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; 834 u32 host2sp_num_mipi_frames[N_CSI_PORTS]; 835 #endif 836 u32 host2sp_cont_avail_num_raw_frames; 837 u32 host2sp_cont_extra_num_raw_frames; 838 u32 host2sp_cont_target_num_raw_frames; 839 struct sh_css_event_irq_mask host2sp_event_irq_mask[NR_OF_PIPELINES]; 840 841 }; 842 843 #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) 844 #define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \ 845 (sizeof(uint32_t) + \ 846 (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \ 847 (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM * SIZE_OF_HRT_VADDRESS * 2) + \ 848 ((3 + N_CSI_PORTS) * sizeof(uint32_t)) + \ 849 (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT)) 850 #else 851 #define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \ 852 (sizeof(uint32_t) + \ 853 (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \ 854 (3 * sizeof(uint32_t)) + \ 855 (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT)) 856 #endif 857 858 struct host_sp_queues { 859 /* 860 * Queues for the dynamic frame information, 861 * i.e. the "in_frame" buffer, the "out_frame" 862 * buffer and the "vf_out_frame" buffer. 863 */ 864 ia_css_circbuf_desc_t host2sp_buffer_queues_desc 865 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; 866 ia_css_circbuf_elem_t host2sp_buffer_queues_elems 867 [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES] 868 [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE]; 869 ia_css_circbuf_desc_t sp2host_buffer_queues_desc 870 [SH_CSS_MAX_NUM_QUEUES]; 871 ia_css_circbuf_elem_t sp2host_buffer_queues_elems 872 [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE]; 873 874 /* 875 * The queues for the events. 876 */ 877 ia_css_circbuf_desc_t host2sp_psys_event_queue_desc; 878 879 ia_css_circbuf_elem_t host2sp_psys_event_queue_elems 880 [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE]; 881 ia_css_circbuf_desc_t sp2host_psys_event_queue_desc; 882 883 ia_css_circbuf_elem_t sp2host_psys_event_queue_elems 884 [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE]; 885 886 /* 887 * The queues for the ISYS events. 888 */ 889 ia_css_circbuf_desc_t host2sp_isys_event_queue_desc; 890 891 ia_css_circbuf_elem_t host2sp_isys_event_queue_elems 892 [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE]; 893 ia_css_circbuf_desc_t sp2host_isys_event_queue_desc; 894 895 ia_css_circbuf_elem_t sp2host_isys_event_queue_elems 896 [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE]; 897 /* 898 * The queue for the tagger commands. 899 * CHECK: are these last two present on the 2401 ? 900 */ 901 ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc; 902 903 ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems 904 [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE]; 905 }; 906 907 #define SIZE_OF_QUEUES_ELEMS \ 908 (SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT * \ 909 ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE) + \ 910 (SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE) + \ 911 (IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE) + \ 912 (IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE) + \ 913 (IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE) + \ 914 (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) + \ 915 (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE))) 916 917 #define IA_CSS_NUM_CIRCBUF_DESCS 5 918 919 #define SIZE_OF_QUEUES_DESC \ 920 ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \ 921 SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \ 922 (SH_CSS_MAX_NUM_QUEUES * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \ 923 (IA_CSS_NUM_CIRCBUF_DESCS * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT)) 924 925 #define SIZE_OF_HOST_SP_QUEUES_STRUCT \ 926 (SIZE_OF_QUEUES_ELEMS + SIZE_OF_QUEUES_DESC) 927 928 extern int (*sh_css_printf)(const char *fmt, va_list args); 929 930 static inline void 931 sh_css_print(const char *fmt, ...) 932 { 933 va_list ap; 934 935 if (sh_css_printf) { 936 va_start(ap, fmt); 937 sh_css_printf(fmt, ap); 938 va_end(ap); 939 } 940 } 941 942 static inline void 943 sh_css_vprint(const char *fmt, va_list args) 944 { 945 if (sh_css_printf) 946 sh_css_printf(fmt, args); 947 } 948 949 /* The following #if is there because this header file is also included 950 by SP and ISP code but they do not need this data and HIVECC has alignment 951 issue with the firmware struct/union's. 952 More permanent solution will be to refactor this include. 953 */ 954 ia_css_ptr sh_css_params_ddr_address_map(void); 955 956 int 957 sh_css_params_init(void); 958 959 void 960 sh_css_params_uninit(void); 961 962 /* For Acceleration API: Flush FW (shared buffer pointer) arguments */ 963 void sh_css_flush(struct ia_css_acc_fw *fw); 964 965 void 966 sh_css_binary_args_reset(struct sh_css_binary_args *args); 967 968 /* Check two frames for equality (format, resolution, bits per element) */ 969 bool 970 sh_css_frame_equal_types(const struct ia_css_frame *frame_a, 971 const struct ia_css_frame *frame_b); 972 973 bool 974 sh_css_frame_info_equal_resolution(const struct ia_css_frame_info *info_a, 975 const struct ia_css_frame_info *info_b); 976 977 void 978 sh_css_capture_enable_bayer_downscaling(bool enable); 979 980 void 981 sh_css_binary_print(const struct ia_css_binary *binary); 982 983 /* aligned argument of sh_css_frame_info_set_width can be used for an extra alignment requirement. 984 When 0, no extra alignment is done. */ 985 void 986 sh_css_frame_info_set_width(struct ia_css_frame_info *info, 987 unsigned int width, 988 unsigned int aligned); 989 990 #if defined(USE_INPUT_SYSTEM_VERSION_2) 991 992 unsigned int 993 sh_css_get_mipi_sizes_for_check(const unsigned int port, 994 const unsigned int idx); 995 996 #endif 997 998 ia_css_ptr 999 sh_css_store_sp_group_to_ddr(void); 1000 1001 ia_css_ptr 1002 sh_css_store_sp_stage_to_ddr(unsigned int pipe, unsigned int stage); 1003 1004 ia_css_ptr 1005 sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage); 1006 1007 void 1008 sh_css_update_uds_and_crop_info( 1009 const struct ia_css_binary_info *info, 1010 const struct ia_css_frame_info *in_frame_info, 1011 const struct ia_css_frame_info *out_frame_info, 1012 const struct ia_css_resolution *dvs_env, 1013 const struct ia_css_dz_config *zoom, 1014 const struct ia_css_vector *motion_vector, 1015 struct sh_css_uds_info *uds, /* out */ 1016 struct sh_css_crop_pos *sp_out_crop_pos, /* out */ 1017 1018 bool enable_zoom 1019 ); 1020 1021 void 1022 sh_css_invalidate_shading_tables(struct ia_css_stream *stream); 1023 1024 struct ia_css_pipeline * 1025 ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe); 1026 1027 unsigned int 1028 ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe); 1029 1030 unsigned int 1031 ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe); 1032 1033 bool 1034 sh_css_continuous_is_enabled(uint8_t pipe_num); 1035 1036 struct ia_css_pipe * 1037 find_pipe_by_num(uint32_t pipe_num); 1038 1039 #ifdef USE_INPUT_SYSTEM_VERSION_2401 1040 void 1041 ia_css_get_crop_offsets( 1042 struct ia_css_pipe *pipe, 1043 struct ia_css_frame_info *in_frame); 1044 #endif 1045 1046 #endif /* _SH_CSS_INTERNAL_H_ */ 1047