1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #include "platform_support.h" 17 18 #include "sh_css_hrt.h" 19 #include "ia_css_debug.h" 20 21 #include "device_access.h" 22 23 #define __INLINE_EVENT__ 24 #include "event_fifo.h" 25 #define __INLINE_SP__ 26 #include "sp.h" 27 #define __INLINE_ISP__ 28 #include "isp.h" 29 #define __INLINE_IRQ__ 30 #include "irq.h" 31 #define __INLINE_FIFO_MONITOR__ 32 #include "fifo_monitor.h" 33 34 /* System independent */ 35 #include "sh_css_internal.h" 36 37 bool sh_css_hrt_system_is_idle(void) 38 { 39 bool not_idle = false, idle; 40 fifo_channel_t ch; 41 42 idle = sp_ctrl_getbit(SP0_ID, SP_SC_REG, SP_IDLE_BIT); 43 not_idle |= !idle; 44 if (!idle) 45 IA_CSS_WARNING("SP not idle"); 46 47 idle = isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT); 48 not_idle |= !idle; 49 if (!idle) 50 IA_CSS_WARNING("ISP not idle"); 51 52 for (ch = 0; ch < N_FIFO_CHANNEL; ch++) { 53 fifo_channel_state_t state; 54 55 fifo_channel_get_state(FIFO_MONITOR0_ID, ch, &state); 56 if (state.fifo_valid) { 57 IA_CSS_WARNING("FIFO channel %d is not empty", ch); 58 not_idle = true; 59 } 60 } 61 62 return !not_idle; 63 } 64 65 int sh_css_hrt_sp_wait(void) 66 { 67 irq_sw_channel_id_t irq_id = IRQ_SW_CHANNEL0_ID; 68 /* 69 * Wait till SP is idle or till there is a SW2 interrupt 70 * The SW2 interrupt will be used when frameloop runs on SP 71 * and signals an event with similar meaning as SP idle 72 * (e.g. frame_done) 73 */ 74 while (!sp_ctrl_getbit(SP0_ID, SP_SC_REG, SP_IDLE_BIT) && 75 ((irq_reg_load(IRQ0_ID, 76 _HRT_IRQ_CONTROLLER_STATUS_REG_IDX) & 77 (1U << (irq_id + IRQ_SW_CHANNEL_OFFSET))) == 0)) { 78 udelay(1); 79 } 80 81 return 0; 82 } 83