1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #ifndef _SH_CSS_DEFS_H_ 17 #define _SH_CSS_DEFS_H_ 18 19 #include "isp.h" 20 21 /*#include "vamem.h"*/ /* Cannot include for VAMEM properties this file is visible on ISP -> pipeline generator */ 22 23 #include "math_support.h" /* max(), min, etc etc */ 24 25 /* ID's for refcount */ 26 #define IA_CSS_REFCOUNT_PARAM_SET_POOL 0xCAFE0001 27 #define IA_CSS_REFCOUNT_PARAM_BUFFER 0xCAFE0002 28 29 /* Digital Image Stabilization */ 30 #define SH_CSS_DIS_DECI_FACTOR_LOG2 6 31 32 /* UV offset: 1:uv=-128...127, 0:uv=0...255 */ 33 #define SH_CSS_UV_OFFSET_IS_0 0 34 35 /* Bits of bayer is adjusted as 13 in ISP */ 36 #define SH_CSS_BAYER_BITS 13 37 38 /* Max value of bayer data (unsigned 13bit in ISP) */ 39 #define SH_CSS_BAYER_MAXVAL ((1U << SH_CSS_BAYER_BITS) - 1) 40 41 /* Bits of yuv in ISP */ 42 #define SH_CSS_ISP_YUV_BITS 8 43 44 #define SH_CSS_DP_GAIN_SHIFT 5 45 #define SH_CSS_BNR_GAIN_SHIFT 13 46 #define SH_CSS_YNR_GAIN_SHIFT 13 47 #define SH_CSS_AE_YCOEF_SHIFT 13 48 #define SH_CSS_AF_FIR_SHIFT 13 49 #define SH_CSS_YEE_DETAIL_GAIN_SHIFT 8 /* [u5.8] */ 50 #define SH_CSS_YEE_SCALE_SHIFT 8 51 #define SH_CSS_TNR_COEF_SHIFT 13 52 #define SH_CSS_MACC_COEF_SHIFT 11 /* [s2.11] for ISP1 */ 53 #define SH_CSS_MACC2_COEF_SHIFT 13 /* [s[exp].[13-exp]] for ISP2 */ 54 #define SH_CSS_DIS_COEF_SHIFT 13 55 56 /* enumeration of the bayer downscale factors. When a binary supports multiple 57 * factors, the OR of these defines is used to build the mask of supported 58 * factors. The BDS factor is used in pre-processor expressions so we cannot 59 * use an enum here. */ 60 #define SH_CSS_BDS_FACTOR_1_00 (0) 61 #define SH_CSS_BDS_FACTOR_1_25 (1) 62 #define SH_CSS_BDS_FACTOR_1_50 (2) 63 #define SH_CSS_BDS_FACTOR_2_00 (3) 64 #define SH_CSS_BDS_FACTOR_2_25 (4) 65 #define SH_CSS_BDS_FACTOR_2_50 (5) 66 #define SH_CSS_BDS_FACTOR_3_00 (6) 67 #define SH_CSS_BDS_FACTOR_4_00 (7) 68 #define SH_CSS_BDS_FACTOR_4_50 (8) 69 #define SH_CSS_BDS_FACTOR_5_00 (9) 70 #define SH_CSS_BDS_FACTOR_6_00 (10) 71 #define SH_CSS_BDS_FACTOR_8_00 (11) 72 #define NUM_BDS_FACTORS (12) 73 74 #define PACK_BDS_FACTOR(factor) (1 << (factor)) 75 76 /* Following macros should match with the type enum ia_css_pipe_version in 77 * ia_css_pipe_public.h. The reason to add these macros is that enum type 78 * will be evaluted to 0 in preprocessing time. */ 79 #define SH_CSS_ISP_PIPE_VERSION_1 1 80 #define SH_CSS_ISP_PIPE_VERSION_2_2 2 81 #define SH_CSS_ISP_PIPE_VERSION_2_6_1 3 82 #define SH_CSS_ISP_PIPE_VERSION_2_7 4 83 84 /*--------------- sRGB Gamma ----------------- 85 CCM : YCgCo[0,8191] -> RGB[0,4095] 86 sRGB Gamma : RGB [0,4095] -> RGB[0,8191] 87 CSC : RGB [0,8191] -> YUV[0,8191] 88 89 CCM: 90 Y[0,8191],CgCo[-4096,4095],coef[-8192,8191] -> RGB[0,4095] 91 92 sRGB Gamma: 93 RGB[0,4095] -(interpolation step16)-> RGB[0,255] -(LUT 12bit)-> RGB[0,4095] -> RGB[0,8191] 94 95 CSC: 96 RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] 97 --------------------------------------------*/ 98 /* Bits of input/output of sRGB Gamma */ 99 #define SH_CSS_RGB_GAMMA_INPUT_BITS 12 /* [0,4095] */ 100 #define SH_CSS_RGB_GAMMA_OUTPUT_BITS 13 /* [0,8191] */ 101 102 /* Bits of fractional part of interpolation in vamem, [0,4095]->[0,255] */ 103 #define SH_CSS_RGB_GAMMA_FRAC_BITS \ 104 (SH_CSS_RGB_GAMMA_INPUT_BITS - SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE_LOG2) 105 #define SH_CSS_RGB_GAMMA_ONE BIT(SH_CSS_RGB_GAMMA_FRAC_BITS) 106 107 /* Bits of input of CCM, = 13, Y[0,8191],CgCo[-4096,4095] */ 108 #define SH_CSS_YUV2RGB_CCM_INPUT_BITS SH_CSS_BAYER_BITS 109 110 /* Bits of output of CCM, = 12, RGB[0,4095] */ 111 #define SH_CSS_YUV2RGB_CCM_OUTPUT_BITS SH_CSS_RGB_GAMMA_INPUT_BITS 112 113 /* Maximum value of output of CCM */ 114 #define SH_CSS_YUV2RGB_CCM_MAX_OUTPUT \ 115 ((1 << SH_CSS_YUV2RGB_CCM_OUTPUT_BITS) - 1) 116 117 #define SH_CSS_NUM_INPUT_BUF_LINES 4 118 119 /* Left cropping only applicable for sufficiently large nway */ 120 #if ISP_VEC_NELEMS == 16 121 #define SH_CSS_MAX_LEFT_CROPPING 0 122 #define SH_CSS_MAX_TOP_CROPPING 0 123 #else 124 #define SH_CSS_MAX_LEFT_CROPPING 12 125 #define SH_CSS_MAX_TOP_CROPPING 12 126 #endif 127 128 #define SH_CSS_SP_MAX_WIDTH 1280 129 130 /* This is the maximum grid we can handle in the ISP binaries. 131 * The host code makes sure no bigger grid is ever selected. */ 132 #define SH_CSS_MAX_BQ_GRID_WIDTH 80 133 #define SH_CSS_MAX_BQ_GRID_HEIGHT 60 134 135 /* The minimum dvs envelope is 12x12(for IPU2) to make sure the 136 * invalid rows/columns that result from filter initialization are skipped. */ 137 #define SH_CSS_MIN_DVS_ENVELOPE 12U 138 139 /* The FPGA system (vec_nelems == 16) only supports upto 5MP */ 140 #if ISP_VEC_NELEMS == 16 141 #define SH_CSS_MAX_SENSOR_WIDTH 2560 142 #define SH_CSS_MAX_SENSOR_HEIGHT 1920 143 #else 144 #define SH_CSS_MAX_SENSOR_WIDTH 4608 145 #define SH_CSS_MAX_SENSOR_HEIGHT 3450 146 #endif 147 148 /* Limited to reduce vmem pressure */ 149 #if ISP_VMEM_DEPTH >= 3072 150 #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH SH_CSS_MAX_SENSOR_WIDTH 151 #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT SH_CSS_MAX_SENSOR_HEIGHT 152 #else 153 #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH 3264 154 #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT 2448 155 #endif 156 /* When using bayer decimation */ 157 /* 158 #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC 4224 159 #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC 3168 160 */ 161 #define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC SH_CSS_MAX_SENSOR_WIDTH 162 #define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC SH_CSS_MAX_SENSOR_HEIGHT 163 164 #define SH_CSS_MIN_SENSOR_WIDTH 2 165 #define SH_CSS_MIN_SENSOR_HEIGHT 2 166 167 /* 168 #define SH_CSS_MAX_VF_WIDTH_DEC 1920 169 #define SH_CSS_MAX_VF_HEIGHT_DEC 1080 170 */ 171 #define SH_CSS_MAX_VF_WIDTH_DEC SH_CSS_MAX_VF_WIDTH 172 #define SH_CSS_MAX_VF_HEIGHT_DEC SH_CSS_MAX_VF_HEIGHT 173 174 /* We use 16 bits per coordinate component, including integer 175 and fractional bits */ 176 #define SH_CSS_MORPH_TABLE_GRID ISP_VEC_NELEMS 177 #define SH_CSS_MORPH_TABLE_ELEM_BYTES 2 178 #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ 179 (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES) 180 181 #define ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) 182 #define ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) 183 184 #define ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ 185 CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) 186 187 /* TODO: I will move macros of "*_SCTBL_*" to SC kernel. 188 "+ 2" should be "+ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT". (michie, Sep/23/2014) */ 189 #define ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) 190 #define ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) 191 192 #define ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ 193 CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) 194 195 /* Each line of this table is aligned to the maximum line width. */ 196 #define SH_CSS_MAX_S3ATBL_WIDTH SH_CSS_MAX_BQ_GRID_WIDTH 197 198 /* Video mode specific DVS define */ 199 /* The video binary supports a delay of 1 or 2 frames */ 200 #define VIDEO_FRAME_DELAY 2 201 /* +1 because DVS reads the previous and writes the current frame concurrently */ 202 #define MAX_NUM_VIDEO_DELAY_FRAMES (VIDEO_FRAME_DELAY + 1) 203 204 /* Preview mode specific DVS define. */ 205 /* In preview we only need GDC functionality (and not the DVS functionality) */ 206 /* The minimum number of DVS frames you need is 2, one were GDC reads from and another where GDC writes into */ 207 #define NUM_PREVIEW_DVS_FRAMES (2) 208 209 /* TNR is no longer exclusive to video, SkyCam preview has TNR too (same kernel as video). 210 * All uses the generic define NUM_TNR_FRAMES. The define NUM_VIDEO_TNR_FRAMES has been deprecated. 211 * 212 * Notes 213 * 1) The value depends on the used TNR kernel and is not something that depends on the mode 214 * and it is not something you just could choice. 215 * 2) For the luma only pipeline a version that supports two different sets of TNR reference frames 216 * is being used. 217 *. 218 */ 219 #define NUM_VALID_TNR_REF_FRAMES (1) /* At least one valid TNR reference frame is required */ 220 #define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) 221 /* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ 222 #define NUM_TNR_REF_BUF_SETS (1) 223 224 #define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) 225 226 #define NUM_VIDEO_TNR_FRAMES 2 227 228 /* Note that this is the define used to configure all data structures common for all modes */ 229 /* It should be equal or bigger to the max number of DVS frames for all possible modes */ 230 /* Rules: these implement logic shared between the host code and ISP firmware. 231 The ISP firmware needs these rules to be applied at pre-processor time, 232 that's why these are macros, not functions. */ 233 #define _ISP_BQS(num) ((num) / 2) 234 #define _ISP_VECS(width) CEIL_DIV(width, ISP_VEC_NELEMS) 235 236 #define ISP_BQ_GRID_WIDTH(elements_per_line, deci_factor_log2) \ 237 CEIL_SHIFT(elements_per_line / 2, deci_factor_log2) 238 #define ISP_BQ_GRID_HEIGHT(lines_per_frame, deci_factor_log2) \ 239 CEIL_SHIFT(lines_per_frame / 2, deci_factor_log2) 240 #define ISP_C_VECTORS_PER_LINE(elements_per_line) \ 241 _ISP_VECS(elements_per_line / 2) 242 243 /* The morphing table is similar to the shading table in the sense that we 244 have 1 more value than we have cells in the grid. */ 245 #define _ISP_MORPH_TABLE_WIDTH(int_width) \ 246 (CEIL_DIV(int_width, SH_CSS_MORPH_TABLE_GRID) + 1) 247 #define _ISP_MORPH_TABLE_HEIGHT(int_height) \ 248 (CEIL_DIV(int_height, SH_CSS_MORPH_TABLE_GRID) + 1) 249 #define _ISP_MORPH_TABLE_ALIGNED_WIDTH(width) \ 250 CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ 251 SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) 252 253 #define _ISP2400_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ 254 (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) 255 #define _ISP2400_SCTBL_HEIGHT(input_height, deci_factor_log2) \ 256 (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1) 257 #define _ISP2400_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ 258 CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ 259 ISP_VEC_NELEMS) 260 261 /* To position the shading center grid point on the center of output image, 262 * one more grid cell is needed as margin. */ 263 #define SH_CSS_SCTBL_CENTERING_MARGIN 1 264 265 /* The shading table width and height are the number of grids, not cells. The last grid should be counted. */ 266 #define SH_CSS_SCTBL_LAST_GRID_COUNT 1 267 268 /* Number of horizontal grids per color in the shading table. */ 269 #define _ISP2401_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ 270 (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \ 271 SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) 272 273 /* Number of vertical grids per color in the shading table. */ 274 #define _ISP2401_SCTBL_HEIGHT(input_height, deci_factor_log2) \ 275 (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \ 276 SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) 277 278 /* ISP2401: Legacy API: Number of horizontal grids per color in the shading table. */ 279 #define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ 280 (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) 281 282 /* ISP2401: Legacy API: Number of vertical grids per color in the shading table. */ 283 #define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \ 284 (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) 285 286 /* ***************************************************************** 287 * Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure) 288 * *****************************************************************/ 289 /* if left cropping is used, 3A statistics are also cropped by 2 vectors. */ 290 #define _ISP_S3ATBL_WIDTH(in_width, deci_factor_log2) \ 291 (_ISP_BQS(in_width) >> deci_factor_log2) 292 #define _ISP_S3ATBL_HEIGHT(in_height, deci_factor_log2) \ 293 (_ISP_BQS(in_height) >> deci_factor_log2) 294 #define _ISP_S3A_ELEMS_ISP_WIDTH(width, left_crop) \ 295 (width - ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) 296 297 #define _ISP_S3ATBL_ISP_WIDTH(in_width, deci_factor_log2) \ 298 CEIL_SHIFT(_ISP_BQS(in_width), deci_factor_log2) 299 #define _ISP_S3ATBL_ISP_HEIGHT(in_height, deci_factor_log2) \ 300 CEIL_SHIFT(_ISP_BQS(in_height), deci_factor_log2) 301 #define ISP_S3ATBL_VECTORS \ 302 _ISP_VECS(SH_CSS_MAX_S3ATBL_WIDTH * \ 303 (sizeof(struct ia_css_3a_output) / sizeof(int32_t))) 304 #define ISP_S3ATBL_HI_LO_STRIDE \ 305 (ISP_S3ATBL_VECTORS * ISP_VEC_NELEMS) 306 #define ISP_S3ATBL_HI_LO_STRIDE_BYTES \ 307 (sizeof(unsigned short) * ISP_S3ATBL_HI_LO_STRIDE) 308 309 /* Viewfinder support */ 310 #define __ISP_MAX_VF_OUTPUT_WIDTH(width, left_crop) \ 311 (width - 2 * ISP_VEC_NELEMS + ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) 312 313 #define __ISP_VF_OUTPUT_WIDTH_VECS(out_width, vf_log_downscale) \ 314 (_ISP_VECS((out_width) >> (vf_log_downscale))) 315 316 #define _ISP_VF_OUTPUT_WIDTH(vf_out_vecs) ((vf_out_vecs) * ISP_VEC_NELEMS) 317 #define _ISP_VF_OUTPUT_HEIGHT(out_height, vf_log_ds) \ 318 ((out_height) >> (vf_log_ds)) 319 320 #define _ISP_LOG_VECTOR_STEP(mode) \ 321 ((mode) == IA_CSS_BINARY_MODE_CAPTURE_PP ? 2 : 1) 322 323 /* It is preferred to have not more than 2x scaling at one step 324 * in GDC (assumption is for capture_pp and yuv_scale stages) */ 325 #define MAX_PREFERRED_YUV_DS_PER_STEP 2 326 327 /* Rules for computing the internal width. This is extremely complicated 328 * and definitely needs to be commented and explained. */ 329 #define _ISP_LEFT_CROP_EXTRA(left_crop) ((left_crop) > 0 ? 2 * ISP_VEC_NELEMS : 0) 330 331 #define __ISP_MIN_INTERNAL_WIDTH(num_chunks, pipelining, mode) \ 332 ((num_chunks) * (pipelining) * (1 << _ISP_LOG_VECTOR_STEP(mode)) * \ 333 ISP_VEC_NELEMS) 334 335 #define __ISP_PADDED_OUTPUT_WIDTH(out_width, dvs_env_width, left_crop) \ 336 ((out_width) + MAX(dvs_env_width, _ISP_LEFT_CROP_EXTRA(left_crop))) 337 338 #define __ISP_CHUNK_STRIDE_ISP(mode) \ 339 ((1 << _ISP_LOG_VECTOR_STEP(mode)) * ISP_VEC_NELEMS) 340 341 #define __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \ 342 ((c_subsampling) * (num_chunks) * HIVE_ISP_DDR_WORD_BYTES) 343 #define __ISP_INTERNAL_WIDTH(out_width, \ 344 dvs_env_width, \ 345 left_crop, \ 346 mode, \ 347 c_subsampling, \ 348 num_chunks, \ 349 pipelining) \ 350 CEIL_MUL2(CEIL_MUL2(MAX(__ISP_PADDED_OUTPUT_WIDTH(out_width, \ 351 dvs_env_width, \ 352 left_crop), \ 353 __ISP_MIN_INTERNAL_WIDTH(num_chunks, \ 354 pipelining, \ 355 mode) \ 356 ), \ 357 __ISP_CHUNK_STRIDE_ISP(mode) \ 358 ), \ 359 __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \ 360 ) 361 362 #define __ISP_INTERNAL_HEIGHT(out_height, dvs_env_height, top_crop) \ 363 ((out_height) + (dvs_env_height) + top_crop) 364 365 /* @GC: Input can be up to sensor resolution when either bayer downscaling 366 * or raw binning is enabled. 367 * Also, during continuous mode, we need to align to 4*NWAY since input 368 * should support binning */ 369 #define _ISP_MAX_INPUT_WIDTH(max_internal_width, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \ 370 enable_continuous) \ 371 ((enable_ds) ? \ 372 SH_CSS_MAX_SENSOR_WIDTH :\ 373 (enable_fixed_bayer_ds) ? \ 374 CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC, 4 * ISP_VEC_NELEMS) : \ 375 (enable_raw_bin) ? \ 376 CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH, 4 * ISP_VEC_NELEMS) : \ 377 (enable_continuous) ? \ 378 SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH \ 379 : max_internal_width) 380 381 #define _ISP_INPUT_WIDTH(internal_width, ds_input_width, enable_ds) \ 382 ((enable_ds) ? (ds_input_width) : (internal_width)) 383 384 #define _ISP_MAX_INPUT_HEIGHT(max_internal_height, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \ 385 enable_continuous) \ 386 ((enable_ds) ? \ 387 SH_CSS_MAX_SENSOR_HEIGHT :\ 388 (enable_fixed_bayer_ds) ? \ 389 SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC : \ 390 (enable_raw_bin || enable_continuous) ? \ 391 SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT \ 392 : max_internal_height) 393 394 #define _ISP_INPUT_HEIGHT(internal_height, ds_input_height, enable_ds) \ 395 ((enable_ds) ? (ds_input_height) : (internal_height)) 396 397 #define SH_CSS_MAX_STAGES 8 /* primary_stage[1-6], capture_pp, vf_pp */ 398 399 /* For CSI2+ input system, it requires extra paddinga from vmem */ 400 #define _ISP_EXTRA_PADDING_VECS 0 401 402 #endif /* _SH_CSS_DEFS_H_ */ 403