19d4fa1a1SMauro Carvalho Chehab /* 29d4fa1a1SMauro Carvalho Chehab * Support for Intel Camera Imaging ISP subsystem. 33c0538fbSMauro Carvalho Chehab * Copyright (c) 2010 - 2015, Intel Corporation. 49d4fa1a1SMauro Carvalho Chehab * 59d4fa1a1SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify it 69d4fa1a1SMauro Carvalho Chehab * under the terms and conditions of the GNU General Public License, 79d4fa1a1SMauro Carvalho Chehab * version 2, as published by the Free Software Foundation. 89d4fa1a1SMauro Carvalho Chehab * 99d4fa1a1SMauro Carvalho Chehab * This program is distributed in the hope it will be useful, but WITHOUT 109d4fa1a1SMauro Carvalho Chehab * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 119d4fa1a1SMauro Carvalho Chehab * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 129d4fa1a1SMauro Carvalho Chehab * more details. 139d4fa1a1SMauro Carvalho Chehab */ 149d4fa1a1SMauro Carvalho Chehab 159d4fa1a1SMauro Carvalho Chehab #include "input_system.h" 169d4fa1a1SMauro Carvalho Chehab 179d4fa1a1SMauro Carvalho Chehab #ifdef HAS_INPUT_SYSTEM_VERSION_2 189d4fa1a1SMauro Carvalho Chehab #include "ia_css_isys.h" 199d4fa1a1SMauro Carvalho Chehab #include "platform_support.h" 209d4fa1a1SMauro Carvalho Chehab 219d4fa1a1SMauro Carvalho Chehab #ifdef USE_INPUT_SYSTEM_VERSION_2401 229d4fa1a1SMauro Carvalho Chehab #include "isys_dma.h" /* isys2401_dma_set_max_burst_size() */ 239d4fa1a1SMauro Carvalho Chehab #include "isys_irq.h" 249d4fa1a1SMauro Carvalho Chehab #endif 259d4fa1a1SMauro Carvalho Chehab 269d4fa1a1SMauro Carvalho Chehab #if defined(USE_INPUT_SYSTEM_VERSION_2) 279d4fa1a1SMauro Carvalho Chehab input_system_error_t ia_css_isys_init(void) 289d4fa1a1SMauro Carvalho Chehab { 299d4fa1a1SMauro Carvalho Chehab backend_channel_cfg_t backend_ch0; 309d4fa1a1SMauro Carvalho Chehab backend_channel_cfg_t backend_ch1; 319d4fa1a1SMauro Carvalho Chehab target_cfg2400_t targetB; 329d4fa1a1SMauro Carvalho Chehab target_cfg2400_t targetC; 339d4fa1a1SMauro Carvalho Chehab u32 acq_mem_region_size = 24; 349d4fa1a1SMauro Carvalho Chehab u32 acq_nof_mem_regions = 2; 359d4fa1a1SMauro Carvalho Chehab input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; 369d4fa1a1SMauro Carvalho Chehab 379d4fa1a1SMauro Carvalho Chehab memset(&backend_ch0, 0, sizeof(backend_channel_cfg_t)); 389d4fa1a1SMauro Carvalho Chehab memset(&backend_ch1, 0, sizeof(backend_channel_cfg_t)); 399d4fa1a1SMauro Carvalho Chehab memset(&targetB, 0, sizeof(targetB)); 409d4fa1a1SMauro Carvalho Chehab memset(&targetC, 0, sizeof(targetC)); 419d4fa1a1SMauro Carvalho Chehab 429d4fa1a1SMauro Carvalho Chehab error = input_system_configuration_reset(); 439d4fa1a1SMauro Carvalho Chehab if (error != INPUT_SYSTEM_ERR_NO_ERROR) 449d4fa1a1SMauro Carvalho Chehab return error; 459d4fa1a1SMauro Carvalho Chehab 469d4fa1a1SMauro Carvalho Chehab error = input_system_csi_xmem_channel_cfg( 479d4fa1a1SMauro Carvalho Chehab 0, /*ch_id */ 489d4fa1a1SMauro Carvalho Chehab INPUT_SYSTEM_PORT_A, /*port */ 499d4fa1a1SMauro Carvalho Chehab backend_ch0, /*backend_ch */ 509d4fa1a1SMauro Carvalho Chehab 32, /*mem_region_size */ 519d4fa1a1SMauro Carvalho Chehab 6, /*nof_mem_regions */ 529d4fa1a1SMauro Carvalho Chehab acq_mem_region_size, /*acq_mem_region_size */ 539d4fa1a1SMauro Carvalho Chehab acq_nof_mem_regions, /*acq_nof_mem_regions */ 549d4fa1a1SMauro Carvalho Chehab targetB, /*target */ 559d4fa1a1SMauro Carvalho Chehab 3); /*nof_xmem_buffers */ 569d4fa1a1SMauro Carvalho Chehab if (error != INPUT_SYSTEM_ERR_NO_ERROR) 579d4fa1a1SMauro Carvalho Chehab return error; 589d4fa1a1SMauro Carvalho Chehab 599d4fa1a1SMauro Carvalho Chehab error = input_system_csi_xmem_channel_cfg( 609d4fa1a1SMauro Carvalho Chehab 1, /*ch_id */ 619d4fa1a1SMauro Carvalho Chehab INPUT_SYSTEM_PORT_B, /*port */ 629d4fa1a1SMauro Carvalho Chehab backend_ch0, /*backend_ch */ 639d4fa1a1SMauro Carvalho Chehab 16, /*mem_region_size */ 649d4fa1a1SMauro Carvalho Chehab 3, /*nof_mem_regions */ 659d4fa1a1SMauro Carvalho Chehab acq_mem_region_size, /*acq_mem_region_size */ 669d4fa1a1SMauro Carvalho Chehab acq_nof_mem_regions, /*acq_nof_mem_regions */ 679d4fa1a1SMauro Carvalho Chehab targetB, /*target */ 689d4fa1a1SMauro Carvalho Chehab 3); /*nof_xmem_buffers */ 699d4fa1a1SMauro Carvalho Chehab if (error != INPUT_SYSTEM_ERR_NO_ERROR) 709d4fa1a1SMauro Carvalho Chehab return error; 719d4fa1a1SMauro Carvalho Chehab 729d4fa1a1SMauro Carvalho Chehab error = input_system_csi_xmem_channel_cfg( 739d4fa1a1SMauro Carvalho Chehab 2, /*ch_id */ 749d4fa1a1SMauro Carvalho Chehab INPUT_SYSTEM_PORT_C, /*port */ 759d4fa1a1SMauro Carvalho Chehab backend_ch1, /*backend_ch */ 769d4fa1a1SMauro Carvalho Chehab 32, /*mem_region_size */ 779d4fa1a1SMauro Carvalho Chehab 3, /*nof_mem_regions */ 789d4fa1a1SMauro Carvalho Chehab acq_mem_region_size, /*acq_mem_region_size */ 799d4fa1a1SMauro Carvalho Chehab acq_nof_mem_regions, /*acq_nof_mem_regions */ 809d4fa1a1SMauro Carvalho Chehab targetC, /*target */ 819d4fa1a1SMauro Carvalho Chehab 2); /*nof_xmem_buffers */ 829d4fa1a1SMauro Carvalho Chehab if (error != INPUT_SYSTEM_ERR_NO_ERROR) 839d4fa1a1SMauro Carvalho Chehab return error; 849d4fa1a1SMauro Carvalho Chehab 859d4fa1a1SMauro Carvalho Chehab error = input_system_configuration_commit(); 869d4fa1a1SMauro Carvalho Chehab 879d4fa1a1SMauro Carvalho Chehab return error; 889d4fa1a1SMauro Carvalho Chehab } 899d4fa1a1SMauro Carvalho Chehab #elif defined(USE_INPUT_SYSTEM_VERSION_2401) 909d4fa1a1SMauro Carvalho Chehab input_system_error_t ia_css_isys_init(void) 919d4fa1a1SMauro Carvalho Chehab { 929d4fa1a1SMauro Carvalho Chehab ia_css_isys_csi_rx_lut_rmgr_init(); 939d4fa1a1SMauro Carvalho Chehab ia_css_isys_ibuf_rmgr_init(); 949d4fa1a1SMauro Carvalho Chehab ia_css_isys_dma_channel_rmgr_init(); 959d4fa1a1SMauro Carvalho Chehab ia_css_isys_stream2mmio_sid_rmgr_init(); 969d4fa1a1SMauro Carvalho Chehab 979d4fa1a1SMauro Carvalho Chehab isys2401_dma_set_max_burst_size(ISYS2401_DMA0_ID, 989d4fa1a1SMauro Carvalho Chehab 1 /* Non Burst DMA transactions */); 999d4fa1a1SMauro Carvalho Chehab 1009d4fa1a1SMauro Carvalho Chehab /* Enable 2401 input system IRQ status for driver to retrieve */ 1019d4fa1a1SMauro Carvalho Chehab isys_irqc_status_enable(ISYS_IRQ0_ID); 1029d4fa1a1SMauro Carvalho Chehab isys_irqc_status_enable(ISYS_IRQ1_ID); 1039d4fa1a1SMauro Carvalho Chehab isys_irqc_status_enable(ISYS_IRQ2_ID); 1049d4fa1a1SMauro Carvalho Chehab 1059d4fa1a1SMauro Carvalho Chehab return INPUT_SYSTEM_ERR_NO_ERROR; 1069d4fa1a1SMauro Carvalho Chehab } 1079d4fa1a1SMauro Carvalho Chehab #endif 1089d4fa1a1SMauro Carvalho Chehab 1099d4fa1a1SMauro Carvalho Chehab #if defined(USE_INPUT_SYSTEM_VERSION_2) 1109d4fa1a1SMauro Carvalho Chehab void ia_css_isys_uninit(void) 1119d4fa1a1SMauro Carvalho Chehab { 1129d4fa1a1SMauro Carvalho Chehab } 1139d4fa1a1SMauro Carvalho Chehab #elif defined(USE_INPUT_SYSTEM_VERSION_2401) 1149d4fa1a1SMauro Carvalho Chehab void ia_css_isys_uninit(void) 1159d4fa1a1SMauro Carvalho Chehab { 1169d4fa1a1SMauro Carvalho Chehab ia_css_isys_csi_rx_lut_rmgr_uninit(); 1179d4fa1a1SMauro Carvalho Chehab ia_css_isys_ibuf_rmgr_uninit(); 1189d4fa1a1SMauro Carvalho Chehab ia_css_isys_dma_channel_rmgr_uninit(); 1199d4fa1a1SMauro Carvalho Chehab ia_css_isys_stream2mmio_sid_rmgr_uninit(); 1209d4fa1a1SMauro Carvalho Chehab } 1219d4fa1a1SMauro Carvalho Chehab #endif 1229d4fa1a1SMauro Carvalho Chehab 1239d4fa1a1SMauro Carvalho Chehab #endif 124