1f5fbb83fSMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0
29d4fa1a1SMauro Carvalho Chehab /*
39d4fa1a1SMauro Carvalho Chehab * Support for Intel Camera Imaging ISP subsystem.
43c0538fbSMauro Carvalho Chehab * Copyright (c) 2010 - 2015, Intel Corporation.
59d4fa1a1SMauro Carvalho Chehab *
69d4fa1a1SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify it
79d4fa1a1SMauro Carvalho Chehab * under the terms and conditions of the GNU General Public License,
89d4fa1a1SMauro Carvalho Chehab * version 2, as published by the Free Software Foundation.
99d4fa1a1SMauro Carvalho Chehab *
109d4fa1a1SMauro Carvalho Chehab * This program is distributed in the hope it will be useful, but WITHOUT
119d4fa1a1SMauro Carvalho Chehab * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
129d4fa1a1SMauro Carvalho Chehab * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
139d4fa1a1SMauro Carvalho Chehab * more details.
149d4fa1a1SMauro Carvalho Chehab */
159d4fa1a1SMauro Carvalho Chehab
169d4fa1a1SMauro Carvalho Chehab #include "system_global.h"
179d4fa1a1SMauro Carvalho Chehab
18641c2292SMauro Carvalho Chehab #ifdef ISP2401
199d4fa1a1SMauro Carvalho Chehab
209d4fa1a1SMauro Carvalho Chehab #include "assert_support.h"
219d4fa1a1SMauro Carvalho Chehab #include "platform_support.h"
229d4fa1a1SMauro Carvalho Chehab #include "ia_css_isys.h"
239d4fa1a1SMauro Carvalho Chehab #include "bitop_support.h"
249d4fa1a1SMauro Carvalho Chehab #include "isys_dma_rmgr.h"
259d4fa1a1SMauro Carvalho Chehab
269d4fa1a1SMauro Carvalho Chehab static isys_dma_rsrc_t isys_dma_rsrc[N_ISYS2401_DMA_ID];
279d4fa1a1SMauro Carvalho Chehab
ia_css_isys_dma_channel_rmgr_init(void)289d4fa1a1SMauro Carvalho Chehab void ia_css_isys_dma_channel_rmgr_init(void)
299d4fa1a1SMauro Carvalho Chehab {
309d4fa1a1SMauro Carvalho Chehab memset(&isys_dma_rsrc, 0, sizeof(isys_dma_rsrc_t));
319d4fa1a1SMauro Carvalho Chehab }
329d4fa1a1SMauro Carvalho Chehab
ia_css_isys_dma_channel_rmgr_uninit(void)339d4fa1a1SMauro Carvalho Chehab void ia_css_isys_dma_channel_rmgr_uninit(void)
349d4fa1a1SMauro Carvalho Chehab {
359d4fa1a1SMauro Carvalho Chehab memset(&isys_dma_rsrc, 0, sizeof(isys_dma_rsrc_t));
369d4fa1a1SMauro Carvalho Chehab }
379d4fa1a1SMauro Carvalho Chehab
ia_css_isys_dma_channel_rmgr_acquire(isys2401_dma_ID_t dma_id,isys2401_dma_channel * channel)389d4fa1a1SMauro Carvalho Chehab bool ia_css_isys_dma_channel_rmgr_acquire(
399d4fa1a1SMauro Carvalho Chehab isys2401_dma_ID_t dma_id,
409d4fa1a1SMauro Carvalho Chehab isys2401_dma_channel *channel)
419d4fa1a1SMauro Carvalho Chehab {
429d4fa1a1SMauro Carvalho Chehab bool retval = false;
439d4fa1a1SMauro Carvalho Chehab isys2401_dma_channel i;
449d4fa1a1SMauro Carvalho Chehab isys2401_dma_channel max_dma_channel;
459d4fa1a1SMauro Carvalho Chehab isys_dma_rsrc_t *cur_rsrc = NULL;
469d4fa1a1SMauro Carvalho Chehab
479d4fa1a1SMauro Carvalho Chehab assert(dma_id < N_ISYS2401_DMA_ID);
489d4fa1a1SMauro Carvalho Chehab assert(channel);
499d4fa1a1SMauro Carvalho Chehab
509d4fa1a1SMauro Carvalho Chehab max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id];
519d4fa1a1SMauro Carvalho Chehab cur_rsrc = &isys_dma_rsrc[dma_id];
529d4fa1a1SMauro Carvalho Chehab
539d4fa1a1SMauro Carvalho Chehab if (cur_rsrc->num_active < max_dma_channel) {
549d4fa1a1SMauro Carvalho Chehab for (i = ISYS2401_DMA_CHANNEL_0; i < N_ISYS2401_DMA_CHANNEL; i++) {
559d4fa1a1SMauro Carvalho Chehab if (bitop_getbit(cur_rsrc->active_table, i) == 0) {
569d4fa1a1SMauro Carvalho Chehab bitop_setbit(cur_rsrc->active_table, i);
579d4fa1a1SMauro Carvalho Chehab *channel = i;
589d4fa1a1SMauro Carvalho Chehab cur_rsrc->num_active++;
599d4fa1a1SMauro Carvalho Chehab retval = true;
609d4fa1a1SMauro Carvalho Chehab break;
619d4fa1a1SMauro Carvalho Chehab }
629d4fa1a1SMauro Carvalho Chehab }
639d4fa1a1SMauro Carvalho Chehab }
649d4fa1a1SMauro Carvalho Chehab
659d4fa1a1SMauro Carvalho Chehab return retval;
669d4fa1a1SMauro Carvalho Chehab }
679d4fa1a1SMauro Carvalho Chehab
ia_css_isys_dma_channel_rmgr_release(isys2401_dma_ID_t dma_id,isys2401_dma_channel * channel)689d4fa1a1SMauro Carvalho Chehab void ia_css_isys_dma_channel_rmgr_release(
699d4fa1a1SMauro Carvalho Chehab isys2401_dma_ID_t dma_id,
709d4fa1a1SMauro Carvalho Chehab isys2401_dma_channel *channel)
719d4fa1a1SMauro Carvalho Chehab {
729d4fa1a1SMauro Carvalho Chehab isys2401_dma_channel max_dma_channel;
739d4fa1a1SMauro Carvalho Chehab isys_dma_rsrc_t *cur_rsrc = NULL;
749d4fa1a1SMauro Carvalho Chehab
759d4fa1a1SMauro Carvalho Chehab assert(dma_id < N_ISYS2401_DMA_ID);
769d4fa1a1SMauro Carvalho Chehab assert(channel);
779d4fa1a1SMauro Carvalho Chehab
789d4fa1a1SMauro Carvalho Chehab max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id];
799d4fa1a1SMauro Carvalho Chehab cur_rsrc = &isys_dma_rsrc[dma_id];
809d4fa1a1SMauro Carvalho Chehab
819d4fa1a1SMauro Carvalho Chehab if ((*channel < max_dma_channel) && (cur_rsrc->num_active > 0)) {
829d4fa1a1SMauro Carvalho Chehab if (bitop_getbit(cur_rsrc->active_table, *channel) == 1) {
839d4fa1a1SMauro Carvalho Chehab bitop_clearbit(cur_rsrc->active_table, *channel);
849d4fa1a1SMauro Carvalho Chehab cur_rsrc->num_active--;
859d4fa1a1SMauro Carvalho Chehab }
869d4fa1a1SMauro Carvalho Chehab }
879d4fa1a1SMauro Carvalho Chehab }
889d4fa1a1SMauro Carvalho Chehab #endif
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