1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 #ifndef _isp_acquisition_defs_h 17 #define _isp_acquisition_defs_h 18 19 #define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ 20 #define _ISP_ACQUISITION_BYTES_PER_ELEM 4 21 22 /* --------------------------------------------------*/ 23 24 #define NOF_ACQ_IRQS 1 25 26 /* --------------------------------------------------*/ 27 /* FSM */ 28 /* --------------------------------------------------*/ 29 #define MEM2STREAM_FSM_STATE_BITS 2 30 #define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 31 32 /* --------------------------------------------------*/ 33 /* REGISTER INFO */ 34 /* --------------------------------------------------*/ 35 36 #define NOF_ACQ_REGS 12 37 38 // Register id's of MMIO slave accesible registers 39 #define ACQ_START_ADDR_REG_ID 0 40 #define ACQ_MEM_REGION_SIZE_REG_ID 1 41 #define ACQ_NUM_MEM_REGIONS_REG_ID 2 42 #define ACQ_INIT_REG_ID 3 43 #define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 44 #define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 45 #define ACQ_LAST_COMMAND_REG_ID 6 46 #define ACQ_NEXT_COMMAND_REG_ID 7 47 #define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 48 #define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 49 #define ACQ_FSM_STATE_INFO_REG_ID 10 50 #define ACQ_INT_CNTR_INFO_REG_ID 11 51 52 // Register width 53 #define ACQ_START_ADDR_REG_WIDTH 9 54 #define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 55 #define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 56 #define ACQ_INIT_REG_WIDTH 3 57 #define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 58 #define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 59 #define ACQ_LAST_COMMAND_REG_WIDTH 32 60 #define ACQ_NEXT_COMMAND_REG_WIDTH 32 61 #define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 62 #define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 63 #define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) 64 #define ACQ_INT_CNTR_INFO_REG_WIDTH 32 65 66 /* register reset value */ 67 #define ACQ_START_ADDR_REG_RSTVAL 0 68 #define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 69 #define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 70 #define ACQ_INIT_REG_RSTVAL 0 71 #define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 72 #define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 73 #define ACQ_LAST_COMMAND_REG_RSTVAL 0 74 #define ACQ_NEXT_COMMAND_REG_RSTVAL 0 75 #define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 76 #define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 77 #define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 78 #define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 79 80 /* bit definitions */ 81 #define ACQ_INIT_RST_REG_BIT 0 82 #define ACQ_INIT_RESYNC_BIT 2 83 #define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT 84 #define ACQ_INIT_RST_BITS 1 85 #define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT 86 #define ACQ_INIT_RESYNC_BITS 1 87 88 /* --------------------------------------------------*/ 89 /* TOKEN INFO */ 90 /* --------------------------------------------------*/ 91 #define ACQ_TOKEN_ID_LSB 0 92 #define ACQ_TOKEN_ID_MSB 3 93 #define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 94 #define ACQ_TOKEN_ID_IDX 0 95 #define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH 96 #define ACQ_INIT_CMD_INIT_IDX 4 97 #define ACQ_INIT_CMD_INIT_BITS 3 98 #define ACQ_CMD_START_ADDR_IDX 4 99 #define ACQ_CMD_START_ADDR_BITS 9 100 #define ACQ_CMD_NOFWORDS_IDX 13 101 #define ACQ_CMD_NOFWORDS_BITS 9 102 #define ACQ_MEM_REGION_ID_IDX 22 103 #define ACQ_MEM_REGION_ID_BITS 9 104 #define ACQ_PACKET_LENGTH_TOKEN_MSB 21 105 #define ACQ_PACKET_LENGTH_TOKEN_LSB 13 106 #define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 107 #define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 108 #define ACQ_PACKET_CH_ID_TOKEN_MSB 11 109 #define ACQ_PACKET_CH_ID_TOKEN_LSB 10 110 #define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ 111 #define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ 112 113 /* Command tokens IDs */ 114 #define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b 115 #define ACQ_READ_REGION_TOKEN_ID 1 //0001b 116 #define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b 117 #define ACQ_INIT_TOKEN_ID 8 //1000b 118 119 /* Acknowledge token IDs */ 120 #define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b 121 #define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b 122 #define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b 123 #define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b 124 #define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b 125 126 #define ACQ_TOKEN_MEMREGIONID_MSB 30 127 #define ACQ_TOKEN_MEMREGIONID_LSB 22 128 #define ACQ_TOKEN_NOFWORDS_MSB 21 129 #define ACQ_TOKEN_NOFWORDS_LSB 13 130 #define ACQ_TOKEN_STARTADDR_MSB 12 131 #define ACQ_TOKEN_STARTADDR_LSB 4 132 133 /* --------------------------------------------------*/ 134 /* MIPI */ 135 /* --------------------------------------------------*/ 136 137 #define WORD_COUNT_WIDTH 16 138 #define PKT_CODE_WIDTH 6 139 #define CHN_NO_WIDTH 2 140 #define ERROR_INFO_WIDTH 8 141 142 #define LONG_PKTCODE_MAX 63 143 #define LONG_PKTCODE_MIN 16 144 #define SHORT_PKTCODE_MAX 15 145 146 #define EOF_CODE 1 147 148 /* --------------------------------------------------*/ 149 /* Packet Info */ 150 /* --------------------------------------------------*/ 151 #define ACQ_START_OF_FRAME 0 152 #define ACQ_END_OF_FRAME 1 153 #define ACQ_START_OF_LINE 2 154 #define ACQ_END_OF_LINE 3 155 #define ACQ_LINE_PAYLOAD 4 156 #define ACQ_GEN_SH_PKT 5 157 158 /* bit definition */ 159 #define ACQ_PKT_TYPE_IDX 16 160 #define ACQ_PKT_TYPE_BITS 6 161 #define ACQ_PKT_SOP_IDX 32 162 #define ACQ_WORD_CNT_IDX 0 163 #define ACQ_WORD_CNT_BITS 16 164 #define ACQ_PKT_INFO_IDX 16 165 #define ACQ_PKT_INFO_BITS 8 166 #define ACQ_HEADER_DATA_IDX 0 167 #define ACQ_HEADER_DATA_BITS 16 168 #define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX 169 #define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS 170 #define ACQ_ACK_NOFWORDS_IDX 13 171 #define ACQ_ACK_NOFWORDS_BITS 9 172 #define ACQ_ACK_PKT_LEN_IDX 4 173 #define ACQ_ACK_PKT_LEN_BITS 16 174 175 /* --------------------------------------------------*/ 176 /* Packet Data Type */ 177 /* --------------------------------------------------*/ 178 179 #define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ 180 #define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ 181 #define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ 182 #define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ 183 #define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ 184 #define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ 185 #define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ 186 #define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ 187 #define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ 188 #define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ 189 #define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ 190 #define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ 191 #define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ 192 #define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ 193 #define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ 194 #define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ 195 #define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ 196 #define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ 197 #define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ 198 #define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ 199 #define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ 200 #define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ 201 #define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ 202 #define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ 203 #define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ 204 #define ACQ_SOF_DATA 0 /* 00 0000 frame start */ 205 #define ACQ_EOF_DATA 1 /* 00 0001 frame end */ 206 #define ACQ_SOL_DATA 2 /* 00 0010 line start */ 207 #define ACQ_EOL_DATA 3 /* 00 0011 line end */ 208 #define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ 209 #define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ 210 #define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ 211 #define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ 212 #define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ 213 #define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ 214 #define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ 215 #define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ 216 #define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ 217 #define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ 218 #define ACQ_RESERVED_DATA_TYPE_MIN 56 219 #define ACQ_RESERVED_DATA_TYPE_MAX 63 220 #define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 221 #define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 222 #define ACQ_YUV_RESERVED_DATA_TYPE 27 223 #define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 224 #define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 225 #define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 226 #define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 227 228 /* --------------------------------------------------*/ 229 230 #endif /* _isp_acquisition_defs_h */ 231