1 /* SPDX-License-Identifier: GPL-2.0 */
2 // SPDX-License-Identifier: GPL-2.0-or-later
3 /*
4  *    (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
5  */
6 
7 #include "type_support.h"
8 #include "input_system_global.h"
9 
10 typedef enum {
11 	INPUT_SYSTEM_PORT_A = 0,
12 	INPUT_SYSTEM_PORT_B,
13 	INPUT_SYSTEM_PORT_C,
14 	N_INPUT_SYSTEM_PORTS
15 } input_system_csi_port_t;
16 
17 typedef struct ctrl_unit_cfg_s			ctrl_unit_cfg_t;
18 typedef struct input_system_network_cfg_s	input_system_network_cfg_t;
19 typedef struct target_cfg2400_s		target_cfg2400_t;
20 typedef struct channel_cfg_s			channel_cfg_t;
21 typedef struct backend_channel_cfg_s		backend_channel_cfg_t;
22 typedef struct input_system_cfg2400_s		input_system_cfg2400_t;
23 typedef struct mipi_port_state_s		mipi_port_state_t;
24 typedef struct rx_channel_state_s		rx_channel_state_t;
25 typedef struct input_switch_cfg_channel_s	input_switch_cfg_channel_t;
26 typedef struct input_switch_cfg_s		input_switch_cfg_t;
27 
28 struct ctrl_unit_cfg_s {
29 	isp2400_ib_buffer_t		buffer_mipi[N_CAPTURE_UNIT_ID];
30 	isp2400_ib_buffer_t		buffer_acquire[N_ACQUISITION_UNIT_ID];
31 };
32 
33 struct input_system_network_cfg_s {
34 	input_system_connection_t	multicast_cfg[N_CAPTURE_UNIT_ID];
35 	input_system_multiplex_t	mux_cfg;
36 	ctrl_unit_cfg_t				ctrl_unit_cfg[N_CTRL_UNIT_ID];
37 };
38 
39 typedef struct {
40 // TBD.
41 	u32	dummy_parameter;
42 } target_isp_cfg_t;
43 
44 typedef struct {
45 // TBD.
46 	u32	dummy_parameter;
47 } target_sp_cfg_t;
48 
49 typedef struct {
50 // TBD.
51 	u32	dummy_parameter;
52 } target_strm2mem_cfg_t;
53 
54 struct input_switch_cfg_channel_s {
55 	u32 hsync_data_reg[2];
56 	u32 vsync_data_reg;
57 };
58 
59 struct backend_channel_cfg_s {
60 	u32	fmt_control_word_1; // Format config.
61 	u32	fmt_control_word_2;
62 	u32	no_side_band;
63 };
64 
65 typedef union  {
66 	csi_cfg_t	csi_cfg;
67 	tpg_cfg_t	tpg_cfg;
68 	prbs_cfg_t	prbs_cfg;
69 	gpfifo_cfg_t	gpfifo_cfg;
70 } source_cfg_t;
71 
72 struct input_switch_cfg_s {
73 	u32 hsync_data_reg[N_RX_CHANNEL_ID * 2];
74 	u32 vsync_data_reg;
75 };
76 
77 /*
78  * In 2300 ports can be configured independently and stream
79  * formats need to be specified. In 2400, there are only 8
80  * supported configurations but the HW is fused to support
81  * only a single one.
82  *
83  * In 2300 the compressed format types are programmed by the
84  * user. In 2400 all stream formats are encoded on the stream.
85  *
86  * Use the enum to check validity of a user configuration
87  */
88 typedef enum {
89 	MONO_4L_1L_0L = 0,
90 	MONO_3L_1L_0L,
91 	MONO_2L_1L_0L,
92 	MONO_1L_1L_0L,
93 	STEREO_2L_1L_2L,
94 	STEREO_3L_1L_1L,
95 	STEREO_2L_1L_1L,
96 	STEREO_1L_1L_1L,
97 	N_RX_MODE
98 } rx_mode_t;
99 
100 #define UNCOMPRESSED_BITS_PER_PIXEL_10	10
101 #define UNCOMPRESSED_BITS_PER_PIXEL_12	12
102 #define COMPRESSED_BITS_PER_PIXEL_6	6
103 #define COMPRESSED_BITS_PER_PIXEL_7	7
104 #define COMPRESSED_BITS_PER_PIXEL_8	8
105 enum mipi_compressor {
106 	MIPI_COMPRESSOR_NONE = 0,
107 	MIPI_COMPRESSOR_10_6_10,
108 	MIPI_COMPRESSOR_10_7_10,
109 	MIPI_COMPRESSOR_10_8_10,
110 	MIPI_COMPRESSOR_12_6_12,
111 	MIPI_COMPRESSOR_12_7_12,
112 	MIPI_COMPRESSOR_12_8_12,
113 	N_MIPI_COMPRESSOR_METHODS
114 };
115 
116 typedef enum mipi_compressor mipi_compressor_t;
117 
118 typedef enum {
119 	MIPI_PREDICTOR_NONE = 0,
120 	MIPI_PREDICTOR_TYPE1,
121 	MIPI_PREDICTOR_TYPE2,
122 	N_MIPI_PREDICTOR_TYPES
123 } mipi_predictor_t;
124 
125 typedef struct rx_cfg_s		rx_cfg_t;
126 
127 /*
128  * Applied per port
129  */
130 struct rx_cfg_s {
131 	rx_mode_t			mode;	/* The HW config */
132 	enum mipi_port_id		port;	/* The port ID to apply the control on */
133 	unsigned int		timeout;
134 	unsigned int		initcount;
135 	unsigned int		synccount;
136 	unsigned int		rxcount;
137 	mipi_predictor_t	comp;	/* Just for backward compatibility */
138 	bool                is_two_ppc;
139 };
140 
141 #ifdef ISP2401
142 #  include "isp2401_input_system_local.h"
143 #else
144 #  include "isp2400_input_system_local.h"
145 #endif
146