1f5fbb83fSMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0 */ 29d4fa1a1SMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0-or-later 39d4fa1a1SMauro Carvalho Chehab /* 49d4fa1a1SMauro Carvalho Chehab * (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> 59d4fa1a1SMauro Carvalho Chehab */ 69d4fa1a1SMauro Carvalho Chehab 7*4005eceeSMauro Carvalho Chehab #include "type_support.h" 8*4005eceeSMauro Carvalho Chehab #include "input_system_global.h" 9*4005eceeSMauro Carvalho Chehab 10*4005eceeSMauro Carvalho Chehab typedef enum { 11*4005eceeSMauro Carvalho Chehab INPUT_SYSTEM_PORT_A = 0, 12*4005eceeSMauro Carvalho Chehab INPUT_SYSTEM_PORT_B, 13*4005eceeSMauro Carvalho Chehab INPUT_SYSTEM_PORT_C, 14*4005eceeSMauro Carvalho Chehab N_INPUT_SYSTEM_PORTS 15*4005eceeSMauro Carvalho Chehab } input_system_csi_port_t; 16*4005eceeSMauro Carvalho Chehab 17*4005eceeSMauro Carvalho Chehab typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; 18*4005eceeSMauro Carvalho Chehab typedef struct input_system_network_cfg_s input_system_network_cfg_t; 19*4005eceeSMauro Carvalho Chehab typedef struct target_cfg2400_s target_cfg2400_t; 20*4005eceeSMauro Carvalho Chehab typedef struct channel_cfg_s channel_cfg_t; 21*4005eceeSMauro Carvalho Chehab typedef struct backend_channel_cfg_s backend_channel_cfg_t; 22*4005eceeSMauro Carvalho Chehab typedef struct input_system_cfg2400_s input_system_cfg2400_t; 23*4005eceeSMauro Carvalho Chehab typedef struct mipi_port_state_s mipi_port_state_t; 24*4005eceeSMauro Carvalho Chehab typedef struct rx_channel_state_s rx_channel_state_t; 25*4005eceeSMauro Carvalho Chehab typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; 26*4005eceeSMauro Carvalho Chehab typedef struct input_switch_cfg_s input_switch_cfg_t; 27*4005eceeSMauro Carvalho Chehab 28*4005eceeSMauro Carvalho Chehab struct ctrl_unit_cfg_s { 29*4005eceeSMauro Carvalho Chehab isp2400_ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; 30*4005eceeSMauro Carvalho Chehab isp2400_ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; 31*4005eceeSMauro Carvalho Chehab }; 32*4005eceeSMauro Carvalho Chehab 33*4005eceeSMauro Carvalho Chehab struct input_system_network_cfg_s { 34*4005eceeSMauro Carvalho Chehab input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; 35*4005eceeSMauro Carvalho Chehab input_system_multiplex_t mux_cfg; 36*4005eceeSMauro Carvalho Chehab ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; 37*4005eceeSMauro Carvalho Chehab }; 38*4005eceeSMauro Carvalho Chehab 39*4005eceeSMauro Carvalho Chehab typedef struct { 40*4005eceeSMauro Carvalho Chehab // TBD. 41*4005eceeSMauro Carvalho Chehab u32 dummy_parameter; 42*4005eceeSMauro Carvalho Chehab } target_isp_cfg_t; 43*4005eceeSMauro Carvalho Chehab 44*4005eceeSMauro Carvalho Chehab typedef struct { 45*4005eceeSMauro Carvalho Chehab // TBD. 46*4005eceeSMauro Carvalho Chehab u32 dummy_parameter; 47*4005eceeSMauro Carvalho Chehab } target_sp_cfg_t; 48*4005eceeSMauro Carvalho Chehab 49*4005eceeSMauro Carvalho Chehab typedef struct { 50*4005eceeSMauro Carvalho Chehab // TBD. 51*4005eceeSMauro Carvalho Chehab u32 dummy_parameter; 52*4005eceeSMauro Carvalho Chehab } target_strm2mem_cfg_t; 53*4005eceeSMauro Carvalho Chehab 54*4005eceeSMauro Carvalho Chehab struct input_switch_cfg_channel_s { 55*4005eceeSMauro Carvalho Chehab u32 hsync_data_reg[2]; 56*4005eceeSMauro Carvalho Chehab u32 vsync_data_reg; 57*4005eceeSMauro Carvalho Chehab }; 58*4005eceeSMauro Carvalho Chehab 59*4005eceeSMauro Carvalho Chehab struct backend_channel_cfg_s { 60*4005eceeSMauro Carvalho Chehab u32 fmt_control_word_1; // Format config. 61*4005eceeSMauro Carvalho Chehab u32 fmt_control_word_2; 62*4005eceeSMauro Carvalho Chehab u32 no_side_band; 63*4005eceeSMauro Carvalho Chehab }; 64*4005eceeSMauro Carvalho Chehab 65*4005eceeSMauro Carvalho Chehab typedef union { 66*4005eceeSMauro Carvalho Chehab csi_cfg_t csi_cfg; 67*4005eceeSMauro Carvalho Chehab tpg_cfg_t tpg_cfg; 68*4005eceeSMauro Carvalho Chehab prbs_cfg_t prbs_cfg; 69*4005eceeSMauro Carvalho Chehab gpfifo_cfg_t gpfifo_cfg; 70*4005eceeSMauro Carvalho Chehab } source_cfg_t; 71*4005eceeSMauro Carvalho Chehab 72*4005eceeSMauro Carvalho Chehab struct input_switch_cfg_s { 73*4005eceeSMauro Carvalho Chehab u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; 74*4005eceeSMauro Carvalho Chehab u32 vsync_data_reg; 75*4005eceeSMauro Carvalho Chehab }; 76*4005eceeSMauro Carvalho Chehab 77*4005eceeSMauro Carvalho Chehab /* 78*4005eceeSMauro Carvalho Chehab * In 2300 ports can be configured independently and stream 79*4005eceeSMauro Carvalho Chehab * formats need to be specified. In 2400, there are only 8 80*4005eceeSMauro Carvalho Chehab * supported configurations but the HW is fused to support 81*4005eceeSMauro Carvalho Chehab * only a single one. 82*4005eceeSMauro Carvalho Chehab * 83*4005eceeSMauro Carvalho Chehab * In 2300 the compressed format types are programmed by the 84*4005eceeSMauro Carvalho Chehab * user. In 2400 all stream formats are encoded on the stream. 85*4005eceeSMauro Carvalho Chehab * 86*4005eceeSMauro Carvalho Chehab * Use the enum to check validity of a user configuration 87*4005eceeSMauro Carvalho Chehab */ 88*4005eceeSMauro Carvalho Chehab typedef enum { 89*4005eceeSMauro Carvalho Chehab MONO_4L_1L_0L = 0, 90*4005eceeSMauro Carvalho Chehab MONO_3L_1L_0L, 91*4005eceeSMauro Carvalho Chehab MONO_2L_1L_0L, 92*4005eceeSMauro Carvalho Chehab MONO_1L_1L_0L, 93*4005eceeSMauro Carvalho Chehab STEREO_2L_1L_2L, 94*4005eceeSMauro Carvalho Chehab STEREO_3L_1L_1L, 95*4005eceeSMauro Carvalho Chehab STEREO_2L_1L_1L, 96*4005eceeSMauro Carvalho Chehab STEREO_1L_1L_1L, 97*4005eceeSMauro Carvalho Chehab N_RX_MODE 98*4005eceeSMauro Carvalho Chehab } rx_mode_t; 99*4005eceeSMauro Carvalho Chehab 100*4005eceeSMauro Carvalho Chehab #define UNCOMPRESSED_BITS_PER_PIXEL_10 10 101*4005eceeSMauro Carvalho Chehab #define UNCOMPRESSED_BITS_PER_PIXEL_12 12 102*4005eceeSMauro Carvalho Chehab #define COMPRESSED_BITS_PER_PIXEL_6 6 103*4005eceeSMauro Carvalho Chehab #define COMPRESSED_BITS_PER_PIXEL_7 7 104*4005eceeSMauro Carvalho Chehab #define COMPRESSED_BITS_PER_PIXEL_8 8 105*4005eceeSMauro Carvalho Chehab enum mipi_compressor { 106*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_NONE = 0, 107*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_10_6_10, 108*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_10_7_10, 109*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_10_8_10, 110*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_12_6_12, 111*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_12_7_12, 112*4005eceeSMauro Carvalho Chehab MIPI_COMPRESSOR_12_8_12, 113*4005eceeSMauro Carvalho Chehab N_MIPI_COMPRESSOR_METHODS 114*4005eceeSMauro Carvalho Chehab }; 115*4005eceeSMauro Carvalho Chehab 116*4005eceeSMauro Carvalho Chehab typedef enum mipi_compressor mipi_compressor_t; 117*4005eceeSMauro Carvalho Chehab 118*4005eceeSMauro Carvalho Chehab typedef enum { 119*4005eceeSMauro Carvalho Chehab MIPI_PREDICTOR_NONE = 0, 120*4005eceeSMauro Carvalho Chehab MIPI_PREDICTOR_TYPE1, 121*4005eceeSMauro Carvalho Chehab MIPI_PREDICTOR_TYPE2, 122*4005eceeSMauro Carvalho Chehab N_MIPI_PREDICTOR_TYPES 123*4005eceeSMauro Carvalho Chehab } mipi_predictor_t; 124*4005eceeSMauro Carvalho Chehab 125*4005eceeSMauro Carvalho Chehab typedef struct rx_cfg_s rx_cfg_t; 126*4005eceeSMauro Carvalho Chehab 127*4005eceeSMauro Carvalho Chehab /* 128*4005eceeSMauro Carvalho Chehab * Applied per port 129*4005eceeSMauro Carvalho Chehab */ 130*4005eceeSMauro Carvalho Chehab struct rx_cfg_s { 131*4005eceeSMauro Carvalho Chehab rx_mode_t mode; /* The HW config */ 132*4005eceeSMauro Carvalho Chehab enum mipi_port_id port; /* The port ID to apply the control on */ 133*4005eceeSMauro Carvalho Chehab unsigned int timeout; 134*4005eceeSMauro Carvalho Chehab unsigned int initcount; 135*4005eceeSMauro Carvalho Chehab unsigned int synccount; 136*4005eceeSMauro Carvalho Chehab unsigned int rxcount; 137*4005eceeSMauro Carvalho Chehab mipi_predictor_t comp; /* Just for backward compatibility */ 138*4005eceeSMauro Carvalho Chehab bool is_two_ppc; 139*4005eceeSMauro Carvalho Chehab }; 140*4005eceeSMauro Carvalho Chehab 1419d4fa1a1SMauro Carvalho Chehab #ifdef ISP2401 1429d4fa1a1SMauro Carvalho Chehab # include "isp2401_input_system_local.h" 1439d4fa1a1SMauro Carvalho Chehab #else 1449d4fa1a1SMauro Carvalho Chehab # include "isp2400_input_system_local.h" 1459d4fa1a1SMauro Carvalho Chehab #endif 146