1f5fbb83fSMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0 */ 29d4fa1a1SMauro Carvalho Chehab /* 39d4fa1a1SMauro Carvalho Chehab * Support for Intel Camera Imaging ISP subsystem. 49d4fa1a1SMauro Carvalho Chehab * Copyright (c) 2015, Intel Corporation. 59d4fa1a1SMauro Carvalho Chehab * 69d4fa1a1SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify it 79d4fa1a1SMauro Carvalho Chehab * under the terms and conditions of the GNU General Public License, 89d4fa1a1SMauro Carvalho Chehab * version 2, as published by the Free Software Foundation. 99d4fa1a1SMauro Carvalho Chehab * 109d4fa1a1SMauro Carvalho Chehab * This program is distributed in the hope it will be useful, but WITHOUT 119d4fa1a1SMauro Carvalho Chehab * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 129d4fa1a1SMauro Carvalho Chehab * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 139d4fa1a1SMauro Carvalho Chehab * more details. 149d4fa1a1SMauro Carvalho Chehab */ 159d4fa1a1SMauro Carvalho Chehab 169d4fa1a1SMauro Carvalho Chehab #ifndef _input_system_ctrl_defs_h 179d4fa1a1SMauro Carvalho Chehab #define _input_system_ctrl_defs_h 189d4fa1a1SMauro Carvalho Chehab 199d4fa1a1SMauro Carvalho Chehab #define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ 209d4fa1a1SMauro Carvalho Chehab 219d4fa1a1SMauro Carvalho Chehab /* --------------------------------------------------*/ 229d4fa1a1SMauro Carvalho Chehab 239d4fa1a1SMauro Carvalho Chehab /* --------------------------------------------------*/ 249d4fa1a1SMauro Carvalho Chehab /* REGISTER INFO */ 259d4fa1a1SMauro Carvalho Chehab /* --------------------------------------------------*/ 269d4fa1a1SMauro Carvalho Chehab 279d4fa1a1SMauro Carvalho Chehab // Number of registers 289d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_REGS 23 299d4fa1a1SMauro Carvalho Chehab 30*e6f23873SRicardo Ribalda // Register id's of MMIO slave accessible registers 319d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 329d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 339d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 349d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 359d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 369d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 379d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 389d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 399d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 409d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 419d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 429d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 439d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_INIT_REG_ID 12 449d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_COMMAND_REG_ID 13 459d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 469d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 479d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 489d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 499d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 509d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 519d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 529d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 539d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 549d4fa1a1SMauro Carvalho Chehab 559d4fa1a1SMauro Carvalho Chehab /* register reset value */ 569d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 579d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 589d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 599d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 609d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 619d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 629d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 639d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 649d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 659d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 669d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 679d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 689d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_INIT_REG_RSTVAL 0 699d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) 709d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) 719d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) 729d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) 739d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 749d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 759d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 769d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 779d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 789d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 799d4fa1a1SMauro Carvalho Chehab 809d4fa1a1SMauro Carvalho Chehab /* register width value */ 819d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 829d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 839d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 849d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 859d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 869d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 879d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 889d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 899d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 909d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 919d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 929d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 939d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_INIT_REG_WIDTH 3 949d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ 959d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 969d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 979d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 989d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 999d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 1009d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 1019d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 1029d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 1039d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 1049d4fa1a1SMauro Carvalho Chehab 1059d4fa1a1SMauro Carvalho Chehab /* bit definitions */ 1069d4fa1a1SMauro Carvalho Chehab 1079d4fa1a1SMauro Carvalho Chehab /* --------------------------------------------------*/ 1089d4fa1a1SMauro Carvalho Chehab /* TOKEN INFO */ 1099d4fa1a1SMauro Carvalho Chehab /* --------------------------------------------------*/ 1109d4fa1a1SMauro Carvalho Chehab 1119d4fa1a1SMauro Carvalho Chehab /* 1129d4fa1a1SMauro Carvalho Chehab InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 1139d4fa1a1SMauro Carvalho Chehab [7:4] - CaptPortId, 1149d4fa1a1SMauro Carvalho Chehab CaptA-'b0000 1159d4fa1a1SMauro Carvalho Chehab CaptB-'b0001 1169d4fa1a1SMauro Carvalho Chehab CaptC-'b0010 1179d4fa1a1SMauro Carvalho Chehab [31:16] - NOF_frames 1189d4fa1a1SMauro Carvalho Chehab InpSysCaptFrameExt 2/0 [3:0] - 'b0001' 1199d4fa1a1SMauro Carvalho Chehab [7:4] - CaptPortId, 1209d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1219d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1229d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1239d4fa1a1SMauro Carvalho Chehab 1249d4fa1a1SMauro Carvalho Chehab 2/1 [31:0] - external capture address 1259d4fa1a1SMauro Carvalho Chehab InpSysAcqFrame 2/0 [3:0] - 'b0010, 1269d4fa1a1SMauro Carvalho Chehab [31:4] - NOF_ext_mem_words 1279d4fa1a1SMauro Carvalho Chehab 2/1 [31:0] - external memory read start address 1289d4fa1a1SMauro Carvalho Chehab InpSysOverruleON 1/0 [3:0] - 'b0011, 1299d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1309d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1319d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1329d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1339d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1349d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1359d4fa1a1SMauro Carvalho Chehab 1369d4fa1a1SMauro Carvalho Chehab InpSysOverruleOFF 1/0 [3:0] - 'b0100, 1379d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1389d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1399d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1409d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1419d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1429d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1439d4fa1a1SMauro Carvalho Chehab 1449d4fa1a1SMauro Carvalho Chehab InpSysOverruleCmd 2/0 [3:0] - 'b0101, 1459d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1469d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1479d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1489d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1499d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1509d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1519d4fa1a1SMauro Carvalho Chehab 1529d4fa1a1SMauro Carvalho Chehab 2/1 [31:0] - command token value for port opid 1539d4fa1a1SMauro Carvalho Chehab 1549d4fa1a1SMauro Carvalho Chehab acknowledge tokens: 1559d4fa1a1SMauro Carvalho Chehab 1569d4fa1a1SMauro Carvalho Chehab InpSysAckCFA 1/0 [3:0] - 'b0000 1579d4fa1a1SMauro Carvalho Chehab [7:4] - CaptPortId, 1589d4fa1a1SMauro Carvalho Chehab CaptA-'b0000 1599d4fa1a1SMauro Carvalho Chehab CaptB- 'b0001 1609d4fa1a1SMauro Carvalho Chehab CaptC-'b0010 1619d4fa1a1SMauro Carvalho Chehab [31:16] - NOF_frames 1629d4fa1a1SMauro Carvalho Chehab InpSysAckCFE 1/0 [3:0] - 'b0001' 1639d4fa1a1SMauro Carvalho Chehab [7:4] - CaptPortId, 1649d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1659d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1669d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1679d4fa1a1SMauro Carvalho Chehab 1689d4fa1a1SMauro Carvalho Chehab InpSysAckAF 1/0 [3:0] - 'b0010 1699d4fa1a1SMauro Carvalho Chehab InpSysAckOverruleON 1/0 [3:0] - 'b0011, 1709d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1719d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1729d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1739d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1749d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1759d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1769d4fa1a1SMauro Carvalho Chehab 1779d4fa1a1SMauro Carvalho Chehab InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, 1789d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1799d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1809d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1819d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1829d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1839d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1849d4fa1a1SMauro Carvalho Chehab 1859d4fa1a1SMauro Carvalho Chehab InpSysAckOverrule 2/0 [3:0] - 'b0101, 1869d4fa1a1SMauro Carvalho Chehab [7:4] - overrule port id (opid) 1879d4fa1a1SMauro Carvalho Chehab 'b0000 - CaptA 1889d4fa1a1SMauro Carvalho Chehab 'b0001 - CaptB 1899d4fa1a1SMauro Carvalho Chehab 'b0010 - CaptC 1909d4fa1a1SMauro Carvalho Chehab 'b0011 - Acq 1919d4fa1a1SMauro Carvalho Chehab 'b0100 - DMA 1929d4fa1a1SMauro Carvalho Chehab 1939d4fa1a1SMauro Carvalho Chehab 2/1 [31:0] - acknowledge token value from port opid 1949d4fa1a1SMauro Carvalho Chehab 1959d4fa1a1SMauro Carvalho Chehab */ 1969d4fa1a1SMauro Carvalho Chehab 1979d4fa1a1SMauro Carvalho Chehab /* Command and acknowledge tokens IDs */ 1989d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ 1999d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ 2009d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ 2019d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ 2029d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ 2039d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ 2049d4fa1a1SMauro Carvalho Chehab 2059d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 2069d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 2079d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_AF_TOKEN_ID 2 2089d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 2099d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 2109d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 2119d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 2129d4fa1a1SMauro Carvalho Chehab 2139d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_TOKEN_ID_MSB 3 2149d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_TOKEN_ID_LSB 0 2159d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 2169d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 2179d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 2189d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 2199d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 2209d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 2219d4fa1a1SMauro Carvalho Chehab 2229d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_TOKEN_ID_IDX 0 2239d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) 2249d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) 2259d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) 2269d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB 2279d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) 2289d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB 2299d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) 2309d4fa1a1SMauro Carvalho Chehab 2319d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ 2329d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ 2339d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ 2349d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ 2359d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ 2369d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ 2379d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ 2389d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ 2399d4fa1a1SMauro Carvalho Chehab 2409d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ 2419d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NO_DMA_ACK 0 2429d4fa1a1SMauro Carvalho Chehab #define ISYS_CTRL_NO_CAPT_ACK 16 2439d4fa1a1SMauro Carvalho Chehab 2449d4fa1a1SMauro Carvalho Chehab #endif /* _input_system_ctrl_defs_h */ 245