19d4fa1a1SMauro Carvalho Chehab /*
29d4fa1a1SMauro Carvalho Chehab  * Support for Intel Camera Imaging ISP subsystem.
39d4fa1a1SMauro Carvalho Chehab  * Copyright (c) 2015, Intel Corporation.
49d4fa1a1SMauro Carvalho Chehab  *
59d4fa1a1SMauro Carvalho Chehab  * This program is free software; you can redistribute it and/or modify it
69d4fa1a1SMauro Carvalho Chehab  * under the terms and conditions of the GNU General Public License,
79d4fa1a1SMauro Carvalho Chehab  * version 2, as published by the Free Software Foundation.
89d4fa1a1SMauro Carvalho Chehab  *
99d4fa1a1SMauro Carvalho Chehab  * This program is distributed in the hope it will be useful, but WITHOUT
109d4fa1a1SMauro Carvalho Chehab  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
119d4fa1a1SMauro Carvalho Chehab  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
129d4fa1a1SMauro Carvalho Chehab  * more details.
139d4fa1a1SMauro Carvalho Chehab  */
149d4fa1a1SMauro Carvalho Chehab 
159d4fa1a1SMauro Carvalho Chehab #ifndef _HRT_HIVE_TYPES_H
169d4fa1a1SMauro Carvalho Chehab #define _HRT_HIVE_TYPES_H
179d4fa1a1SMauro Carvalho Chehab 
189d4fa1a1SMauro Carvalho Chehab #include "version.h"
199d4fa1a1SMauro Carvalho Chehab #include "defs.h"
209d4fa1a1SMauro Carvalho Chehab 
219d4fa1a1SMauro Carvalho Chehab #ifndef HRTCAT3
229d4fa1a1SMauro Carvalho Chehab #define _HRTCAT3(m, n, o)     m##n##o
239d4fa1a1SMauro Carvalho Chehab #define HRTCAT3(m, n, o)      _HRTCAT3(m, n, o)
249d4fa1a1SMauro Carvalho Chehab #endif
259d4fa1a1SMauro Carvalho Chehab 
269d4fa1a1SMauro Carvalho Chehab #ifndef HRTCAT4
279d4fa1a1SMauro Carvalho Chehab #define _HRTCAT4(m, n, o, p)     m##n##o##p
289d4fa1a1SMauro Carvalho Chehab #define HRTCAT4(m, n, o, p)      _HRTCAT4(m, n, o, p)
299d4fa1a1SMauro Carvalho Chehab #endif
309d4fa1a1SMauro Carvalho Chehab 
319d4fa1a1SMauro Carvalho Chehab #ifndef HRTMIN
329d4fa1a1SMauro Carvalho Chehab #define HRTMIN(a, b) (((a) < (b)) ? (a) : (b))
339d4fa1a1SMauro Carvalho Chehab #endif
349d4fa1a1SMauro Carvalho Chehab 
359d4fa1a1SMauro Carvalho Chehab #ifndef HRTMAX
369d4fa1a1SMauro Carvalho Chehab #define HRTMAX(a, b) (((a) > (b)) ? (a) : (b))
379d4fa1a1SMauro Carvalho Chehab #endif
389d4fa1a1SMauro Carvalho Chehab 
399d4fa1a1SMauro Carvalho Chehab /* boolean data type */
409d4fa1a1SMauro Carvalho Chehab typedef unsigned int hive_bool;
419d4fa1a1SMauro Carvalho Chehab #define hive_false 0
429d4fa1a1SMauro Carvalho Chehab #define hive_true  1
439d4fa1a1SMauro Carvalho Chehab 
449d4fa1a1SMauro Carvalho Chehab typedef char                 hive_int8;
459d4fa1a1SMauro Carvalho Chehab typedef short                hive_int16;
469d4fa1a1SMauro Carvalho Chehab typedef int                  hive_int32;
479d4fa1a1SMauro Carvalho Chehab typedef long long            hive_int64;
489d4fa1a1SMauro Carvalho Chehab 
499d4fa1a1SMauro Carvalho Chehab typedef unsigned char        hive_uint8;
509d4fa1a1SMauro Carvalho Chehab typedef unsigned short       hive_uint16;
519d4fa1a1SMauro Carvalho Chehab typedef unsigned int         hive_uint32;
529d4fa1a1SMauro Carvalho Chehab typedef unsigned long long   hive_uint64;
539d4fa1a1SMauro Carvalho Chehab 
549d4fa1a1SMauro Carvalho Chehab /* by default assume 32 bit master port (both data and address) */
559d4fa1a1SMauro Carvalho Chehab #ifndef HRT_DATA_WIDTH
569d4fa1a1SMauro Carvalho Chehab #define HRT_DATA_WIDTH 32
579d4fa1a1SMauro Carvalho Chehab #endif
589d4fa1a1SMauro Carvalho Chehab #ifndef HRT_ADDRESS_WIDTH
599d4fa1a1SMauro Carvalho Chehab #define HRT_ADDRESS_WIDTH 32
609d4fa1a1SMauro Carvalho Chehab #endif
619d4fa1a1SMauro Carvalho Chehab 
629d4fa1a1SMauro Carvalho Chehab #define HRT_DATA_BYTES    (HRT_DATA_WIDTH / 8)
639d4fa1a1SMauro Carvalho Chehab #define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8)
649d4fa1a1SMauro Carvalho Chehab 
659d4fa1a1SMauro Carvalho Chehab #if HRT_DATA_WIDTH == 64
669d4fa1a1SMauro Carvalho Chehab typedef hive_uint64 hrt_data;
679d4fa1a1SMauro Carvalho Chehab #elif HRT_DATA_WIDTH == 32
689d4fa1a1SMauro Carvalho Chehab typedef hive_uint32 hrt_data;
699d4fa1a1SMauro Carvalho Chehab #else
709d4fa1a1SMauro Carvalho Chehab #error data width not supported
719d4fa1a1SMauro Carvalho Chehab #endif
729d4fa1a1SMauro Carvalho Chehab 
739d4fa1a1SMauro Carvalho Chehab #if HRT_ADDRESS_WIDTH == 64
749d4fa1a1SMauro Carvalho Chehab typedef hive_uint64 hrt_address;
759d4fa1a1SMauro Carvalho Chehab #elif HRT_ADDRESS_WIDTH == 32
769d4fa1a1SMauro Carvalho Chehab typedef hive_uint32 hrt_address;
779d4fa1a1SMauro Carvalho Chehab #else
789d4fa1a1SMauro Carvalho Chehab #error adddres width not supported
799d4fa1a1SMauro Carvalho Chehab #endif
809d4fa1a1SMauro Carvalho Chehab 
819d4fa1a1SMauro Carvalho Chehab /* The SP side representation of an HMM virtual address */
829d4fa1a1SMauro Carvalho Chehab typedef hive_uint32 hrt_vaddress;
839d4fa1a1SMauro Carvalho Chehab 
849d4fa1a1SMauro Carvalho Chehab /* use 64 bit addresses in simulation, where possible */
859d4fa1a1SMauro Carvalho Chehab typedef hive_uint64  hive_sim_address;
869d4fa1a1SMauro Carvalho Chehab 
879d4fa1a1SMauro Carvalho Chehab /* below is for csim, not for hrt, rename and move this elsewhere */
889d4fa1a1SMauro Carvalho Chehab 
899d4fa1a1SMauro Carvalho Chehab typedef unsigned int hive_uint;
909d4fa1a1SMauro Carvalho Chehab typedef hive_uint32  hive_address;
919d4fa1a1SMauro Carvalho Chehab typedef hive_address hive_slave_address;
929d4fa1a1SMauro Carvalho Chehab typedef hive_address hive_mem_address;
939d4fa1a1SMauro Carvalho Chehab 
949d4fa1a1SMauro Carvalho Chehab /* MMIO devices */
959d4fa1a1SMauro Carvalho Chehab typedef hive_uint    hive_mmio_id;
969d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_slave_id;
979d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_port_id;
989d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_master_id;
999d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_mem_id;
1009d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_dev_id;
1019d4fa1a1SMauro Carvalho Chehab typedef hive_mmio_id hive_fifo_id;
1029d4fa1a1SMauro Carvalho Chehab 
1039d4fa1a1SMauro Carvalho Chehab typedef hive_uint      hive_hier_id;
1049d4fa1a1SMauro Carvalho Chehab typedef hive_hier_id   hive_device_id;
1059d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_proc_id;
1069d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_cell_id;
1079d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_host_id;
1089d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_bus_id;
1099d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_bridge_id;
1109d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_fifo_adapter_id;
1119d4fa1a1SMauro Carvalho Chehab typedef hive_device_id hive_custom_device_id;
1129d4fa1a1SMauro Carvalho Chehab 
1139d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_slot_id;
1149d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_fu_id;
1159d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_reg_file_id;
1169d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_reg_id;
1179d4fa1a1SMauro Carvalho Chehab 
1189d4fa1a1SMauro Carvalho Chehab /* Streaming devices */
1199d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_outport_id;
1209d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_inport_id;
1219d4fa1a1SMauro Carvalho Chehab 
1229d4fa1a1SMauro Carvalho Chehab typedef hive_uint hive_msink_id;
1239d4fa1a1SMauro Carvalho Chehab 
1249d4fa1a1SMauro Carvalho Chehab /* HRT specific */
1259d4fa1a1SMauro Carvalho Chehab typedef char *hive_program;
1269d4fa1a1SMauro Carvalho Chehab typedef char *hive_function;
1279d4fa1a1SMauro Carvalho Chehab 
1289d4fa1a1SMauro Carvalho Chehab #endif /* _HRT_HIVE_TYPES_H */
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