19d4fa1a1SMauro Carvalho Chehab /* 29d4fa1a1SMauro Carvalho Chehab * Support for Intel Camera Imaging ISP subsystem. 39d4fa1a1SMauro Carvalho Chehab * Copyright (c) 2015, Intel Corporation. 49d4fa1a1SMauro Carvalho Chehab * 59d4fa1a1SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify it 69d4fa1a1SMauro Carvalho Chehab * under the terms and conditions of the GNU General Public License, 79d4fa1a1SMauro Carvalho Chehab * version 2, as published by the Free Software Foundation. 89d4fa1a1SMauro Carvalho Chehab * 99d4fa1a1SMauro Carvalho Chehab * This program is distributed in the hope it will be useful, but WITHOUT 109d4fa1a1SMauro Carvalho Chehab * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 119d4fa1a1SMauro Carvalho Chehab * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 129d4fa1a1SMauro Carvalho Chehab * more details. 139d4fa1a1SMauro Carvalho Chehab */ 149d4fa1a1SMauro Carvalho Chehab 159d4fa1a1SMauro Carvalho Chehab #ifndef __SP_GLOBAL_H_INCLUDED__ 169d4fa1a1SMauro Carvalho Chehab #define __SP_GLOBAL_H_INCLUDED__ 179d4fa1a1SMauro Carvalho Chehab 189d4fa1a1SMauro Carvalho Chehab #include <system_types.h> 199d4fa1a1SMauro Carvalho Chehab 209d4fa1a1SMauro Carvalho Chehab #if defined(HAS_SP_2401) 219d4fa1a1SMauro Carvalho Chehab #define IS_SP_2401 229d4fa1a1SMauro Carvalho Chehab /* 2401 uses 2400 */ 239d4fa1a1SMauro Carvalho Chehab #include <scalar_processor_2400_params.h> 249d4fa1a1SMauro Carvalho Chehab #elif defined(HAS_SP_2400) 259d4fa1a1SMauro Carvalho Chehab #define IS_SP_2400 269d4fa1a1SMauro Carvalho Chehab 279d4fa1a1SMauro Carvalho Chehab #include <scalar_processor_2400_params.h> 289d4fa1a1SMauro Carvalho Chehab #else 299d4fa1a1SMauro Carvalho Chehab #error "sp_global.h: SP_2400 must be one of {2400, 2401 }" 309d4fa1a1SMauro Carvalho Chehab #endif 319d4fa1a1SMauro Carvalho Chehab 329d4fa1a1SMauro Carvalho Chehab #define SP_PMEM_WIDTH_LOG2 SP_PMEM_LOG_WIDTH_BITS 339d4fa1a1SMauro Carvalho Chehab #define SP_PMEM_SIZE SP_PMEM_DEPTH 349d4fa1a1SMauro Carvalho Chehab 359d4fa1a1SMauro Carvalho Chehab #define SP_DMEM_SIZE 0x4000 369d4fa1a1SMauro Carvalho Chehab 379d4fa1a1SMauro Carvalho Chehab /* SP Registers */ 389d4fa1a1SMauro Carvalho Chehab #define SP_PC_REG 0x09 399d4fa1a1SMauro Carvalho Chehab #define SP_SC_REG 0x00 409d4fa1a1SMauro Carvalho Chehab #define SP_START_ADDR_REG 0x01 419d4fa1a1SMauro Carvalho Chehab #define SP_ICACHE_ADDR_REG 0x05 429d4fa1a1SMauro Carvalho Chehab #define SP_IRQ_READY_REG 0x00 439d4fa1a1SMauro Carvalho Chehab #define SP_IRQ_CLEAR_REG 0x00 449d4fa1a1SMauro Carvalho Chehab #define SP_ICACHE_INV_REG 0x00 459d4fa1a1SMauro Carvalho Chehab #define SP_CTRL_SINK_REG 0x0A 469d4fa1a1SMauro Carvalho Chehab 479d4fa1a1SMauro Carvalho Chehab /* SP Register bits */ 489d4fa1a1SMauro Carvalho Chehab #define SP_RST_BIT 0x00 499d4fa1a1SMauro Carvalho Chehab #define SP_START_BIT 0x01 509d4fa1a1SMauro Carvalho Chehab #define SP_BREAK_BIT 0x02 519d4fa1a1SMauro Carvalho Chehab #define SP_RUN_BIT 0x03 529d4fa1a1SMauro Carvalho Chehab #define SP_BROKEN_BIT 0x04 539d4fa1a1SMauro Carvalho Chehab #define SP_IDLE_BIT 0x05 /* READY */ 549d4fa1a1SMauro Carvalho Chehab #define SP_SLEEPING_BIT 0x06 559d4fa1a1SMauro Carvalho Chehab #define SP_STALLING_BIT 0x07 569d4fa1a1SMauro Carvalho Chehab #define SP_IRQ_CLEAR_BIT 0x08 579d4fa1a1SMauro Carvalho Chehab #define SP_IRQ_READY_BIT 0x0A 589d4fa1a1SMauro Carvalho Chehab #define SP_IRQ_SLEEPING_BIT 0x0B 599d4fa1a1SMauro Carvalho Chehab 609d4fa1a1SMauro Carvalho Chehab #define SP_ICACHE_INV_BIT 0x0C 619d4fa1a1SMauro Carvalho Chehab #define SP_IPREFETCH_EN_BIT 0x0D 629d4fa1a1SMauro Carvalho Chehab 639d4fa1a1SMauro Carvalho Chehab #define SP_FIFO0_SINK_BIT 0x00 649d4fa1a1SMauro Carvalho Chehab #define SP_FIFO1_SINK_BIT 0x01 659d4fa1a1SMauro Carvalho Chehab #define SP_FIFO2_SINK_BIT 0x02 669d4fa1a1SMauro Carvalho Chehab #define SP_FIFO3_SINK_BIT 0x03 679d4fa1a1SMauro Carvalho Chehab #define SP_FIFO4_SINK_BIT 0x04 689d4fa1a1SMauro Carvalho Chehab #define SP_FIFO5_SINK_BIT 0x05 699d4fa1a1SMauro Carvalho Chehab #define SP_FIFO6_SINK_BIT 0x06 709d4fa1a1SMauro Carvalho Chehab #define SP_FIFO7_SINK_BIT 0x07 719d4fa1a1SMauro Carvalho Chehab #define SP_FIFO8_SINK_BIT 0x08 729d4fa1a1SMauro Carvalho Chehab #define SP_FIFO9_SINK_BIT 0x09 739d4fa1a1SMauro Carvalho Chehab #define SP_FIFOA_SINK_BIT 0x0A 749d4fa1a1SMauro Carvalho Chehab #define SP_DMEM_SINK_BIT 0x0B 759d4fa1a1SMauro Carvalho Chehab #define SP_CTRL_MT_SINK_BIT 0x0C 769d4fa1a1SMauro Carvalho Chehab #define SP_ICACHE_MT_SINK_BIT 0x0D 779d4fa1a1SMauro Carvalho Chehab 789d4fa1a1SMauro Carvalho Chehab #define SP_FIFO0_SINK_REG 0x0A 799d4fa1a1SMauro Carvalho Chehab #define SP_FIFO1_SINK_REG 0x0A 809d4fa1a1SMauro Carvalho Chehab #define SP_FIFO2_SINK_REG 0x0A 819d4fa1a1SMauro Carvalho Chehab #define SP_FIFO3_SINK_REG 0x0A 829d4fa1a1SMauro Carvalho Chehab #define SP_FIFO4_SINK_REG 0x0A 839d4fa1a1SMauro Carvalho Chehab #define SP_FIFO5_SINK_REG 0x0A 849d4fa1a1SMauro Carvalho Chehab #define SP_FIFO6_SINK_REG 0x0A 859d4fa1a1SMauro Carvalho Chehab #define SP_FIFO7_SINK_REG 0x0A 869d4fa1a1SMauro Carvalho Chehab #define SP_FIFO8_SINK_REG 0x0A 879d4fa1a1SMauro Carvalho Chehab #define SP_FIFO9_SINK_REG 0x0A 889d4fa1a1SMauro Carvalho Chehab #define SP_FIFOA_SINK_REG 0x0A 899d4fa1a1SMauro Carvalho Chehab #define SP_DMEM_SINK_REG 0x0A 909d4fa1a1SMauro Carvalho Chehab #define SP_CTRL_MT_SINK_REG 0x0A 919d4fa1a1SMauro Carvalho Chehab #define SP_ICACHE_MT_SINK_REG 0x0A 929d4fa1a1SMauro Carvalho Chehab 939d4fa1a1SMauro Carvalho Chehab #endif /* __SP_GLOBAL_H_INCLUDED__ */ 94