1f5fbb83fSMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0 */
29d4fa1a1SMauro Carvalho Chehab /*
39d4fa1a1SMauro Carvalho Chehab  * Support for Intel Camera Imaging ISP subsystem.
49d4fa1a1SMauro Carvalho Chehab  * Copyright (c) 2015, Intel Corporation.
59d4fa1a1SMauro Carvalho Chehab  *
69d4fa1a1SMauro Carvalho Chehab  * This program is free software; you can redistribute it and/or modify it
79d4fa1a1SMauro Carvalho Chehab  * under the terms and conditions of the GNU General Public License,
89d4fa1a1SMauro Carvalho Chehab  * version 2, as published by the Free Software Foundation.
99d4fa1a1SMauro Carvalho Chehab  *
109d4fa1a1SMauro Carvalho Chehab  * This program is distributed in the hope it will be useful, but WITHOUT
119d4fa1a1SMauro Carvalho Chehab  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
129d4fa1a1SMauro Carvalho Chehab  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
139d4fa1a1SMauro Carvalho Chehab  * more details.
149d4fa1a1SMauro Carvalho Chehab  */
159d4fa1a1SMauro Carvalho Chehab 
169d4fa1a1SMauro Carvalho Chehab #ifndef __INPUT_FORMATTER_GLOBAL_H_INCLUDED__
179d4fa1a1SMauro Carvalho Chehab #define __INPUT_FORMATTER_GLOBAL_H_INCLUDED__
189d4fa1a1SMauro Carvalho Chehab 
199d4fa1a1SMauro Carvalho Chehab #define IS_INPUT_FORMATTER_VERSION2
209d4fa1a1SMauro Carvalho Chehab #define IS_INPUT_SWITCH_VERSION2
219d4fa1a1SMauro Carvalho Chehab 
229d4fa1a1SMauro Carvalho Chehab #include <type_support.h>
23f90e73ceSMauro Carvalho Chehab #include <system_local.h>
249d4fa1a1SMauro Carvalho Chehab #include "if_defs.h"
259d4fa1a1SMauro Carvalho Chehab #include "str2mem_defs.h"
269d4fa1a1SMauro Carvalho Chehab #include "input_switch_2400_defs.h"
279d4fa1a1SMauro Carvalho Chehab 
289d4fa1a1SMauro Carvalho Chehab #define _HIVE_INPUT_SWITCH_GET_FSYNC_REG_LSB(ch_id)        ((ch_id) * 3)
299d4fa1a1SMauro Carvalho Chehab 
309d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_N_CHANNELS				4
319d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_N_FORMATTYPES			32
329d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_N_SWITCH_CODE			4
339d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_M_CHANNELS				0x00000003
349d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_M_FORMATTYPES			0x0000001f
359d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_M_SWITCH_CODE			0x00000003
369d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_M_FSYNC					0x00000007
379d4fa1a1SMauro Carvalho Chehab 
389d4fa1a1SMauro Carvalho Chehab #define HIVE_SWITCH_ENCODE_FSYNC(x) \
399d4fa1a1SMauro Carvalho Chehab 	(1U << (((x) - 1) & HIVE_SWITCH_M_CHANNELS))
409d4fa1a1SMauro Carvalho Chehab 
419d4fa1a1SMauro Carvalho Chehab #define _HIVE_INPUT_SWITCH_GET_LUT_FIELD(reg, bit_index) \
429d4fa1a1SMauro Carvalho Chehab 	(((reg) >> (bit_index)) & HIVE_SWITCH_M_SWITCH_CODE)
439d4fa1a1SMauro Carvalho Chehab #define _HIVE_INPUT_SWITCH_SET_LUT_FIELD(reg, bit_index, val) \
449d4fa1a1SMauro Carvalho Chehab 	(((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_SWITCH_CODE) << (bit_index)))
459d4fa1a1SMauro Carvalho Chehab #define _HIVE_INPUT_SWITCH_GET_FSYNC_FIELD(reg, bit_index) \
469d4fa1a1SMauro Carvalho Chehab 	(((reg) >> (bit_index)) & HIVE_SWITCH_M_FSYNC)
479d4fa1a1SMauro Carvalho Chehab #define _HIVE_INPUT_SWITCH_SET_FSYNC_FIELD(reg, bit_index, val) \
489d4fa1a1SMauro Carvalho Chehab 	(((reg) & ~(HIVE_SWITCH_M_FSYNC << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_FSYNC) << (bit_index)))
499d4fa1a1SMauro Carvalho Chehab 
509d4fa1a1SMauro Carvalho Chehab typedef struct input_formatter_cfg_s	input_formatter_cfg_t;
519d4fa1a1SMauro Carvalho Chehab 
529d4fa1a1SMauro Carvalho Chehab /* Hardware registers */
539d4fa1a1SMauro Carvalho Chehab /*#define HIVE_IF_RESET_ADDRESS                   0x000*/ /* deprecated */
549d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_START_LINE_ADDRESS              0x004
559d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_START_COLUMN_ADDRESS            0x008
569d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_CROPPED_HEIGHT_ADDRESS          0x00C
579d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_CROPPED_WIDTH_ADDRESS           0x010
589d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_VERTICAL_DECIMATION_ADDRESS     0x014
599d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS   0x018
609d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_H_DEINTERLEAVING_ADDRESS        0x01C
619d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_LEFTPADDING_WIDTH_ADDRESS       0x020
629d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_END_OF_LINE_OFFSET_ADDRESS      0x024
639d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_VMEM_START_ADDRESS_ADDRESS      0x028
649d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_VMEM_END_ADDRESS_ADDRESS        0x02C
659d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_VMEM_INCREMENT_ADDRESS          0x030
669d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_YUV_420_FORMAT_ADDRESS          0x034
679d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS       0x038
689d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS       0x03C
699d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS     0x040
709d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS       0x044
719d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_V_DEINTERLEAVING_ADDRESS        0x048
729d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_FSM_CROP_PIXEL_COUNTER          0x110
739d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_FSM_CROP_LINE_COUNTER           0x10C
749d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_FSM_CROP_STATUS                 0x108
759d4fa1a1SMauro Carvalho Chehab 
769d4fa1a1SMauro Carvalho Chehab /* Registers only for simulation */
779d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_CRUN_MODE_ADDRESS               0x04C
789d4fa1a1SMauro Carvalho Chehab #define HIVE_IF_DUMP_OUTPUT_ADDRESS             0x050
799d4fa1a1SMauro Carvalho Chehab 
809d4fa1a1SMauro Carvalho Chehab /* Follow the DMA syntax, "cmd" last */
819d4fa1a1SMauro Carvalho Chehab #define IF_PACK(val, cmd)             ((val & 0x0fff) | (cmd /*& 0xf000*/))
829d4fa1a1SMauro Carvalho Chehab 
839d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS                   (_STR2MEM_SOFT_RESET_REG_ID * _STR2MEM_REG_ALIGN)
849d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS             (_STR2MEM_INPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN)
859d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS            (_STR2MEM_OUTPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN)
869d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS                 (_STR2MEM_BIT_SWAPPING_REG_ID * _STR2MEM_REG_ALIGN)
879d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS             (_STR2MEM_BLOCK_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN)
889d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS            (_STR2MEM_PACKET_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN)
899d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS  (_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID * _STR2MEM_REG_ALIGN)
909d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS     (_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID * _STR2MEM_REG_ALIGN)
919d4fa1a1SMauro Carvalho Chehab #define HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS                   (_STR2MEM_EN_STAT_UPDATE_ID * _STR2MEM_REG_ALIGN)
929d4fa1a1SMauro Carvalho Chehab 
939d4fa1a1SMauro Carvalho Chehab /*
949d4fa1a1SMauro Carvalho Chehab  * This data structure is shared between host and SP
959d4fa1a1SMauro Carvalho Chehab  */
969d4fa1a1SMauro Carvalho Chehab struct input_formatter_cfg_s {
979d4fa1a1SMauro Carvalho Chehab 	u32	start_line;
989d4fa1a1SMauro Carvalho Chehab 	u32	start_column;
999d4fa1a1SMauro Carvalho Chehab 	u32	left_padding;
1009d4fa1a1SMauro Carvalho Chehab 	u32	cropped_height;
1019d4fa1a1SMauro Carvalho Chehab 	u32	cropped_width;
1029d4fa1a1SMauro Carvalho Chehab 	u32	deinterleaving;
1039d4fa1a1SMauro Carvalho Chehab 	u32	buf_vecs;
1049d4fa1a1SMauro Carvalho Chehab 	u32	buf_start_index;
1059d4fa1a1SMauro Carvalho Chehab 	u32	buf_increment;
1069d4fa1a1SMauro Carvalho Chehab 	u32	buf_eol_offset;
1079d4fa1a1SMauro Carvalho Chehab 	u32	is_yuv420_format;
1089d4fa1a1SMauro Carvalho Chehab 	u32	block_no_reqs;
1099d4fa1a1SMauro Carvalho Chehab };
1109d4fa1a1SMauro Carvalho Chehab 
1119d4fa1a1SMauro Carvalho Chehab extern const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID];
1129d4fa1a1SMauro Carvalho Chehab extern const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID];
1139d4fa1a1SMauro Carvalho Chehab extern const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID];
1149d4fa1a1SMauro Carvalho Chehab 
1159d4fa1a1SMauro Carvalho Chehab #endif /* __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ */
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