1 #include <linux/module.h> 2 #include <linux/i2c.h> 3 #include <linux/dmi.h> 4 #include <linux/efi.h> 5 #include <linux/pci.h> 6 #include <linux/acpi.h> 7 #include <linux/clk.h> 8 #include <linux/delay.h> 9 #include <media/v4l2-subdev.h> 10 #include <linux/mfd/intel_soc_pmic.h> 11 #include <linux/regulator/consumer.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/gpio.h> 14 #include <linux/platform_device.h> 15 #include "../../include/linux/atomisp_platform.h" 16 #include "../../include/linux/atomisp_gmin_platform.h" 17 18 #define MAX_SUBDEVS 8 19 20 enum clock_rate { 21 VLV2_CLK_XTAL_25_0MHz = 0, 22 VLV2_CLK_PLL_19P2MHZ = 1 23 }; 24 25 #define CLK_RATE_19_2MHZ 19200000 26 #define CLK_RATE_25_0MHZ 25000000 27 28 /* X-Powers AXP288 register set */ 29 #define ALDO1_SEL_REG 0x28 30 #define ALDO1_CTRL3_REG 0x13 31 #define ALDO1_2P8V 0x16 32 #define ALDO1_CTRL3_SHIFT 0x05 33 34 #define ELDO_CTRL_REG 0x12 35 36 #define ELDO1_SEL_REG 0x19 37 #define ELDO1_1P8V 0x16 38 #define ELDO1_CTRL_SHIFT 0x00 39 40 #define ELDO2_SEL_REG 0x1a 41 #define ELDO2_1P8V 0x16 42 #define ELDO2_CTRL_SHIFT 0x01 43 44 /* TI SND9039 PMIC register set */ 45 #define LDO9_REG 0x49 46 #define LDO10_REG 0x4a 47 #define LDO11_REG 0x4b 48 49 #define LDO_2P8V_ON 0x2f /* 0x2e selects 2.85V ... */ 50 #define LDO_2P8V_OFF 0x2e /* ... bottom bit is "enabled" */ 51 52 #define LDO_1P8V_ON 0x59 /* 0x58 selects 1.80V ... */ 53 #define LDO_1P8V_OFF 0x58 /* ... bottom bit is "enabled" */ 54 55 /* CRYSTAL COVE PMIC register set */ 56 #define CRYSTAL_1P8V_REG 0x57 57 #define CRYSTAL_2P8V_REG 0x5d 58 #define CRYSTAL_ON 0x63 59 #define CRYSTAL_OFF 0x62 60 61 struct gmin_subdev { 62 struct v4l2_subdev *subdev; 63 int clock_num; 64 enum clock_rate clock_src; 65 bool clock_on; 66 struct clk *pmc_clk; 67 struct gpio_desc *gpio0; 68 struct gpio_desc *gpio1; 69 struct regulator *v1p8_reg; 70 struct regulator *v2p8_reg; 71 struct regulator *v1p2_reg; 72 struct regulator *v2p8_vcm_reg; 73 enum atomisp_camera_port csi_port; 74 unsigned int csi_lanes; 75 enum atomisp_input_format csi_fmt; 76 enum atomisp_bayer_order csi_bayer; 77 bool v1p8_on; 78 bool v2p8_on; 79 bool v1p2_on; 80 bool v2p8_vcm_on; 81 82 u8 pwm_i2c_addr; 83 84 /* For PMIC AXP */ 85 int eldo1_sel_reg, eldo1_1p8v, eldo1_ctrl_shift; 86 int eldo2_sel_reg, eldo2_1p8v, eldo2_ctrl_shift; 87 }; 88 89 static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; 90 91 /* ACPI HIDs for the PMICs that could be used by this driver */ 92 #define PMIC_ACPI_AXP "INT33F4:00" /* XPower AXP288 PMIC */ 93 #define PMIC_ACPI_TI "INT33F5:00" /* Dollar Cove TI PMIC */ 94 #define PMIC_ACPI_CRYSTALCOVE "INT33FD:00" /* Crystal Cove PMIC */ 95 96 #define PMIC_PLATFORM_TI "intel_soc_pmic_chtdc_ti" 97 98 static enum { 99 PMIC_UNSET = 0, 100 PMIC_REGULATOR, 101 PMIC_AXP, 102 PMIC_TI, 103 PMIC_CRYSTALCOVE 104 } pmic_id; 105 106 static const char *pmic_name[] = { 107 [PMIC_UNSET] = "unset", 108 [PMIC_REGULATOR] = "regulator driver", 109 [PMIC_AXP] = "XPower AXP288 PMIC", 110 [PMIC_TI] = "Dollar Cove TI PMIC", 111 [PMIC_CRYSTALCOVE] = "Crystal Cove PMIC", 112 }; 113 114 /* The atomisp uses type==0 for the end-of-list marker, so leave space. */ 115 static struct intel_v4l2_subdev_table pdata_subdevs[MAX_SUBDEVS + 1]; 116 117 static const struct atomisp_platform_data pdata = { 118 .subdevs = pdata_subdevs, 119 }; 120 121 /* 122 * Something of a hack. The ECS E7 board drives camera 2.8v from an 123 * external regulator instead of the PMIC. There's a gmin_CamV2P8 124 * config variable that specifies the GPIO to handle this particular 125 * case, but this needs a broader architecture for handling camera 126 * power. 127 */ 128 enum { V2P8_GPIO_UNSET = -2, V2P8_GPIO_NONE = -1 }; 129 static int v2p8_gpio = V2P8_GPIO_UNSET; 130 131 /* 132 * Something of a hack. The CHT RVP board drives camera 1.8v from an 133 * external regulator instead of the PMIC just like ECS E7 board, see the 134 * comments above. 135 */ 136 enum { V1P8_GPIO_UNSET = -2, V1P8_GPIO_NONE = -1 }; 137 static int v1p8_gpio = V1P8_GPIO_UNSET; 138 139 static LIST_HEAD(vcm_devices); 140 static DEFINE_MUTEX(vcm_lock); 141 142 static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev); 143 144 /* 145 * Legacy/stub behavior copied from upstream platform_camera.c. The 146 * atomisp driver relies on these values being non-NULL in a few 147 * places, even though they are hard-coded in all current 148 * implementations. 149 */ 150 const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void) 151 { 152 static const struct atomisp_camera_caps caps = { 153 .sensor_num = 1, 154 .sensor = { 155 { .stream_num = 1, }, 156 }, 157 }; 158 return ∩︀ 159 } 160 EXPORT_SYMBOL_GPL(atomisp_get_default_camera_caps); 161 162 const struct atomisp_platform_data *atomisp_get_platform_data(void) 163 { 164 return &pdata; 165 } 166 EXPORT_SYMBOL_GPL(atomisp_get_platform_data); 167 168 int atomisp_register_i2c_module(struct v4l2_subdev *subdev, 169 struct camera_sensor_platform_data *plat_data, 170 enum intel_v4l2_subdev_type type) 171 { 172 int i; 173 struct i2c_board_info *bi; 174 struct gmin_subdev *gs; 175 struct i2c_client *client = v4l2_get_subdevdata(subdev); 176 struct acpi_device *adev = ACPI_COMPANION(&client->dev); 177 178 dev_info(&client->dev, "register atomisp i2c module type %d\n", type); 179 180 /* The windows driver model (and thus most BIOSes by default) 181 * uses ACPI runtime power management for camera devices, but 182 * we don't. Disable it, or else the rails will be needlessly 183 * tickled during suspend/resume. This has caused power and 184 * performance issues on multiple devices. 185 */ 186 adev->power.flags.power_resources = 0; 187 188 for (i = 0; i < MAX_SUBDEVS; i++) 189 if (!pdata.subdevs[i].type) 190 break; 191 192 if (pdata.subdevs[i].type) 193 return -ENOMEM; 194 195 /* Note subtlety of initialization order: at the point where 196 * this registration API gets called, the platform data 197 * callbacks have probably already been invoked, so the 198 * gmin_subdev struct is already initialized for us. 199 */ 200 gs = find_gmin_subdev(subdev); 201 202 pdata.subdevs[i].type = type; 203 pdata.subdevs[i].port = gs->csi_port; 204 pdata.subdevs[i].subdev = subdev; 205 pdata.subdevs[i].v4l2_subdev.i2c_adapter_id = client->adapter->nr; 206 207 /* Convert i2c_client to i2c_board_info */ 208 bi = &pdata.subdevs[i].v4l2_subdev.board_info; 209 memcpy(bi->type, client->name, I2C_NAME_SIZE); 210 bi->flags = client->flags; 211 bi->addr = client->addr; 212 bi->irq = client->irq; 213 bi->platform_data = plat_data; 214 215 return 0; 216 } 217 EXPORT_SYMBOL_GPL(atomisp_register_i2c_module); 218 219 struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, 220 struct i2c_board_info *board_info) 221 { 222 int i; 223 224 for (i = 0; i < MAX_SUBDEVS && pdata.subdevs[i].type; i++) { 225 struct intel_v4l2_subdev_table *sd = &pdata.subdevs[i]; 226 227 if (sd->v4l2_subdev.i2c_adapter_id == adapter->nr && 228 sd->v4l2_subdev.board_info.addr == board_info->addr) 229 return sd->subdev; 230 } 231 return NULL; 232 } 233 EXPORT_SYMBOL_GPL(atomisp_gmin_find_subdev); 234 235 int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd) 236 { 237 int i, j; 238 239 if (!sd) 240 return 0; 241 242 for (i = 0; i < MAX_SUBDEVS; i++) { 243 if (pdata.subdevs[i].subdev == sd) { 244 for (j = i + 1; j <= MAX_SUBDEVS; j++) 245 pdata.subdevs[j - 1] = pdata.subdevs[j]; 246 } 247 if (gmin_subdevs[i].subdev == sd) { 248 if (gmin_subdevs[i].gpio0) 249 gpiod_put(gmin_subdevs[i].gpio0); 250 gmin_subdevs[i].gpio0 = NULL; 251 if (gmin_subdevs[i].gpio1) 252 gpiod_put(gmin_subdevs[i].gpio1); 253 gmin_subdevs[i].gpio1 = NULL; 254 if (pmic_id == PMIC_REGULATOR) { 255 regulator_put(gmin_subdevs[i].v1p8_reg); 256 regulator_put(gmin_subdevs[i].v2p8_reg); 257 regulator_put(gmin_subdevs[i].v1p2_reg); 258 regulator_put(gmin_subdevs[i].v2p8_vcm_reg); 259 } 260 gmin_subdevs[i].subdev = NULL; 261 } 262 } 263 return 0; 264 } 265 EXPORT_SYMBOL_GPL(atomisp_gmin_remove_subdev); 266 267 struct gmin_cfg_var { 268 const char *name, *val; 269 }; 270 271 static struct gmin_cfg_var ffrd8_vars[] = { 272 { "INTCF1B:00_ImxId", "0x134" }, 273 { "INTCF1B:00_CsiPort", "1" }, 274 { "INTCF1B:00_CsiLanes", "4" }, 275 { "INTCF1B:00_CamClk", "0" }, 276 {}, 277 }; 278 279 /* Cribbed from MCG defaults in the mt9m114 driver, not actually verified 280 * vs. T100 hardware 281 */ 282 static struct gmin_cfg_var t100_vars[] = { 283 { "INT33F0:00_CsiPort", "0" }, 284 { "INT33F0:00_CsiLanes", "1" }, 285 { "INT33F0:00_CamClk", "1" }, 286 {}, 287 }; 288 289 static struct gmin_cfg_var mrd7_vars[] = { 290 {"INT33F8:00_CamType", "1"}, 291 {"INT33F8:00_CsiPort", "1"}, 292 {"INT33F8:00_CsiLanes", "2"}, 293 {"INT33F8:00_CsiFmt", "13"}, 294 {"INT33F8:00_CsiBayer", "0"}, 295 {"INT33F8:00_CamClk", "0"}, 296 {"INT33F9:00_CamType", "1"}, 297 {"INT33F9:00_CsiPort", "0"}, 298 {"INT33F9:00_CsiLanes", "1"}, 299 {"INT33F9:00_CsiFmt", "13"}, 300 {"INT33F9:00_CsiBayer", "0"}, 301 {"INT33F9:00_CamClk", "1"}, 302 {}, 303 }; 304 305 static struct gmin_cfg_var ecs7_vars[] = { 306 {"INT33BE:00_CsiPort", "1"}, 307 {"INT33BE:00_CsiLanes", "2"}, 308 {"INT33BE:00_CsiFmt", "13"}, 309 {"INT33BE:00_CsiBayer", "2"}, 310 {"INT33BE:00_CamClk", "0"}, 311 {"INT33F0:00_CsiPort", "0"}, 312 {"INT33F0:00_CsiLanes", "1"}, 313 {"INT33F0:00_CsiFmt", "13"}, 314 {"INT33F0:00_CsiBayer", "0"}, 315 {"INT33F0:00_CamClk", "1"}, 316 {"gmin_V2P8GPIO", "402"}, 317 {}, 318 }; 319 320 static struct gmin_cfg_var i8880_vars[] = { 321 {"XXOV2680:00_CsiPort", "1"}, 322 {"XXOV2680:00_CsiLanes", "1"}, 323 {"XXOV2680:00_CamClk", "0"}, 324 {"XXGC0310:00_CsiPort", "0"}, 325 {"XXGC0310:00_CsiLanes", "1"}, 326 {"XXGC0310:00_CamClk", "1"}, 327 {}, 328 }; 329 330 static struct gmin_cfg_var asus_vars[] = { 331 {"OVTI2680:00_CsiPort", "1"}, 332 {"OVTI2680:00_CsiLanes", "1"}, 333 {"OVTI2680:00_CsiFmt", "15"}, 334 {"OVTI2680:00_CsiBayer", "0"}, 335 {"OVTI2680:00_CamClk", "0"}, 336 {}, 337 }; 338 339 static const struct dmi_system_id gmin_vars[] = { 340 { 341 .ident = "BYT-T FFD8", 342 .matches = { 343 DMI_MATCH(DMI_BOARD_NAME, "BYT-T FFD8"), 344 }, 345 .driver_data = ffrd8_vars, 346 }, 347 { 348 .ident = "T100TA", 349 .matches = { 350 DMI_MATCH(DMI_BOARD_NAME, "T100TA"), 351 }, 352 .driver_data = t100_vars, 353 }, 354 { 355 .ident = "MRD7", 356 .matches = { 357 DMI_MATCH(DMI_BOARD_NAME, "TABLET"), 358 DMI_MATCH(DMI_BOARD_VERSION, "MRD 7"), 359 }, 360 .driver_data = mrd7_vars, 361 }, 362 { 363 .ident = "ST70408", 364 .matches = { 365 DMI_MATCH(DMI_BOARD_NAME, "ST70408"), 366 }, 367 .driver_data = ecs7_vars, 368 }, 369 { 370 .ident = "VTA0803", 371 .matches = { 372 DMI_MATCH(DMI_BOARD_NAME, "VTA0803"), 373 }, 374 .driver_data = i8880_vars, 375 }, 376 { 377 .ident = "T101HA", 378 .matches = { 379 DMI_MATCH(DMI_BOARD_NAME, "T101HA"), 380 }, 381 .driver_data = asus_vars, 382 }, 383 {} 384 }; 385 386 #define GMIN_CFG_VAR_EFI_GUID EFI_GUID(0xecb54cd9, 0xe5ae, 0x4fdc, \ 387 0xa9, 0x71, 0xe8, 0x77, \ 388 0x75, 0x60, 0x68, 0xf7) 389 390 #define CFG_VAR_NAME_MAX 64 391 392 #define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */ 393 static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME]; 394 395 static int gmin_i2c_match_one(struct device *dev, const void *data) 396 { 397 const char *name = data; 398 struct i2c_client *client; 399 400 if (dev->type != &i2c_client_type) 401 return 0; 402 403 client = to_i2c_client(dev); 404 405 return (!strcmp(name, client->name)); 406 } 407 408 static struct i2c_client *gmin_i2c_dev_exists(struct device *dev, char *name, 409 struct i2c_client **client) 410 { 411 struct device *d; 412 413 while ((d = bus_find_device(&i2c_bus_type, NULL, name, 414 gmin_i2c_match_one))) { 415 *client = to_i2c_client(d); 416 dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n", 417 (*client)->name, (*client)->addr, 418 (*client)->adapter->nr); 419 return *client; 420 } 421 422 return NULL; 423 } 424 425 static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg, 426 u32 value, u32 mask) 427 { 428 int ret; 429 430 /* 431 * FIXME: Right now, the intel_pmic driver just write values 432 * directly at the regmap, instead of properly implementing 433 * i2c_transfer() mechanism. Let's use the same interface here, 434 * as otherwise we may face issues. 435 */ 436 437 dev_dbg(dev, 438 "I2C write, addr: 0x%02x, reg: 0x%02x, value: 0x%02x, mask: 0x%02x\n", 439 i2c_addr, reg, value, mask); 440 441 ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg, 442 value, mask); 443 444 if (ret == -EOPNOTSUPP) { 445 dev_err(dev, 446 "ACPI didn't mapped the OpRegion needed to access I2C address 0x%02x.\n" 447 "Need to compile the Kernel using CONFIG_*_PMIC_OPREGION settings\n", 448 i2c_addr); 449 return ret; 450 } 451 452 return ret; 453 } 454 455 static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) 456 { 457 int i, ret; 458 struct device *dev; 459 struct i2c_client *power = NULL, *client = v4l2_get_subdevdata(subdev); 460 461 if (!client) 462 return NULL; 463 464 dev = &client->dev; 465 466 if (!pmic_id) { 467 if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power)) 468 pmic_id = PMIC_TI; 469 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power)) 470 pmic_id = PMIC_AXP; 471 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power)) 472 pmic_id = PMIC_CRYSTALCOVE; 473 else 474 pmic_id = PMIC_REGULATOR; 475 } 476 477 for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++) 478 ; 479 if (i >= MAX_SUBDEVS) 480 return NULL; 481 482 483 if (power) { 484 gmin_subdevs[i].pwm_i2c_addr = power->addr; 485 dev_info(dev, 486 "gmin: power management provided via %s (i2c addr 0x%02x)\n", 487 pmic_name[pmic_id], power->addr); 488 } else { 489 dev_info(dev, "gmin: power management provided via %s\n", 490 pmic_name[pmic_id]); 491 } 492 493 gmin_subdevs[i].subdev = subdev; 494 gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0); 495 /*WA:CHT requires XTAL clock as PLL is not stable.*/ 496 gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc", 497 VLV2_CLK_PLL_19P2MHZ); 498 gmin_subdevs[i].csi_port = gmin_get_var_int(dev, false, "CsiPort", 0); 499 gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1); 500 501 /* get PMC clock with clock framework */ 502 snprintf(gmin_pmc_clk_name, 503 sizeof(gmin_pmc_clk_name), 504 "%s_%d", "pmc_plt_clk", gmin_subdevs[i].clock_num); 505 506 gmin_subdevs[i].pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name); 507 if (IS_ERR(gmin_subdevs[i].pmc_clk)) { 508 ret = PTR_ERR(gmin_subdevs[i].pmc_clk); 509 510 dev_err(dev, 511 "Failed to get clk from %s : %d\n", 512 gmin_pmc_clk_name, 513 ret); 514 515 return NULL; 516 } 517 518 /* 519 * The firmware might enable the clock at 520 * boot (this information may or may not 521 * be reflected in the enable clock register). 522 * To change the rate we must disable the clock 523 * first to cover these cases. Due to common 524 * clock framework restrictions that do not allow 525 * to disable a clock that has not been enabled, 526 * we need to enable the clock first. 527 */ 528 ret = clk_prepare_enable(gmin_subdevs[i].pmc_clk); 529 if (!ret) 530 clk_disable_unprepare(gmin_subdevs[i].pmc_clk); 531 532 gmin_subdevs[i].gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW); 533 if (IS_ERR(gmin_subdevs[i].gpio0)) 534 gmin_subdevs[i].gpio0 = NULL; 535 536 gmin_subdevs[i].gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW); 537 if (IS_ERR(gmin_subdevs[i].gpio1)) 538 gmin_subdevs[i].gpio1 = NULL; 539 540 switch (pmic_id) { 541 case PMIC_REGULATOR: 542 gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX"); 543 gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX"); 544 545 gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A"); 546 gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B"); 547 548 /* Note: ideally we would initialize v[12]p8_on to the 549 * output of regulator_is_enabled(), but sadly that 550 * API is broken with the current drivers, returning 551 * "1" for a regulator that will then emit a 552 * "unbalanced disable" WARNing if we try to disable 553 * it. 554 */ 555 break; 556 557 case PMIC_AXP: 558 gmin_subdevs[i].eldo1_1p8v = gmin_get_var_int(dev, false, 559 "eldo1_1p8v", 560 ELDO1_1P8V); 561 gmin_subdevs[i].eldo1_sel_reg = gmin_get_var_int(dev, false, 562 "eldo1_sel_reg", 563 ELDO1_SEL_REG); 564 gmin_subdevs[i].eldo1_ctrl_shift = gmin_get_var_int(dev, false, 565 "eldo1_ctrl_shift", 566 ELDO1_CTRL_SHIFT); 567 gmin_subdevs[i].eldo2_1p8v = gmin_get_var_int(dev, false, 568 "eldo2_1p8v", 569 ELDO2_1P8V); 570 gmin_subdevs[i].eldo2_sel_reg = gmin_get_var_int(dev, false, 571 "eldo2_sel_reg", 572 ELDO2_SEL_REG); 573 gmin_subdevs[i].eldo2_ctrl_shift = gmin_get_var_int(dev, false, 574 "eldo2_ctrl_shift", 575 ELDO2_CTRL_SHIFT); 576 gmin_subdevs[i].pwm_i2c_addr = power->addr; 577 break; 578 579 default: 580 break; 581 } 582 583 return &gmin_subdevs[i]; 584 } 585 586 static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev) 587 { 588 int i; 589 590 for (i = 0; i < MAX_SUBDEVS; i++) 591 if (gmin_subdevs[i].subdev == subdev) 592 return &gmin_subdevs[i]; 593 return gmin_subdev_add(subdev); 594 } 595 596 static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs, 597 int sel_reg, u8 setting, 598 int ctrl_reg, int shift, bool on) 599 { 600 int ret; 601 int val; 602 603 ret = gmin_i2c_write(dev, gs->pwm_i2c_addr, sel_reg, setting, 0xff); 604 if (ret) 605 return ret; 606 607 val = on ? 1 << shift : 0; 608 609 ret = gmin_i2c_write(dev, gs->pwm_i2c_addr, sel_reg, val, 1 << shift); 610 if (ret) 611 return ret; 612 613 return 0; 614 } 615 616 static int axp_v1p8_on(struct device *dev, struct gmin_subdev *gs) 617 { 618 int ret; 619 ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, 620 ELDO_CTRL_REG, gs->eldo2_ctrl_shift, true); 621 if (ret) 622 return ret; 623 624 /* 625 * This sleep comes out of the gc2235 driver, which is the 626 * only one I currently see that wants to set both 1.8v rails. 627 */ 628 usleep_range(110, 150); 629 630 ret = axp_regulator_set(dev, gs, gs->eldo1_sel_reg, gs->eldo1_1p8v, 631 ELDO_CTRL_REG, gs->eldo1_ctrl_shift, true); 632 if (ret) 633 return ret; 634 635 ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, 636 ELDO_CTRL_REG, gs->eldo2_ctrl_shift, false); 637 return ret; 638 } 639 640 static int axp_v1p8_off(struct device *dev, struct gmin_subdev *gs) 641 { 642 int ret; 643 ret = axp_regulator_set(dev, gs, gs->eldo1_sel_reg, gs->eldo1_1p8v, 644 ELDO_CTRL_REG, gs->eldo1_ctrl_shift, false); 645 if (ret) 646 return ret; 647 648 ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, 649 ELDO_CTRL_REG, gs->eldo2_ctrl_shift, false); 650 return ret; 651 } 652 653 654 static int gmin_gpio0_ctrl(struct v4l2_subdev *subdev, int on) 655 { 656 struct gmin_subdev *gs = find_gmin_subdev(subdev); 657 658 if (gs) { 659 gpiod_set_value(gs->gpio0, on); 660 return 0; 661 } 662 return -EINVAL; 663 } 664 665 static int gmin_gpio1_ctrl(struct v4l2_subdev *subdev, int on) 666 { 667 struct gmin_subdev *gs = find_gmin_subdev(subdev); 668 669 if (gs) { 670 gpiod_set_value(gs->gpio1, on); 671 return 0; 672 } 673 return -EINVAL; 674 } 675 676 static int gmin_v1p2_ctrl(struct v4l2_subdev *subdev, int on) 677 { 678 struct gmin_subdev *gs = find_gmin_subdev(subdev); 679 680 if (!gs || gs->v1p2_on == on) 681 return 0; 682 gs->v1p2_on = on; 683 684 /* use regulator for PMIC */ 685 if (gs->v1p2_reg) { 686 if (on) 687 return regulator_enable(gs->v1p2_reg); 688 else 689 return regulator_disable(gs->v1p2_reg); 690 } 691 692 /* TODO:v1p2 may need to extend to other PMICs */ 693 694 return -EINVAL; 695 } 696 697 static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) 698 { 699 struct gmin_subdev *gs = find_gmin_subdev(subdev); 700 int ret; 701 struct device *dev; 702 struct i2c_client *client = v4l2_get_subdevdata(subdev); 703 int value; 704 705 dev = &client->dev; 706 707 if (v1p8_gpio == V1P8_GPIO_UNSET) { 708 v1p8_gpio = gmin_get_var_int(dev, true, 709 "V1P8GPIO", V1P8_GPIO_NONE); 710 if (v1p8_gpio != V1P8_GPIO_NONE) { 711 pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n", 712 v1p8_gpio); 713 ret = gpio_request(v1p8_gpio, "camera_v1p8_en"); 714 if (!ret) 715 ret = gpio_direction_output(v1p8_gpio, 0); 716 if (ret) 717 pr_err("V1P8 GPIO initialization failed\n"); 718 } 719 } 720 721 if (!gs || gs->v1p8_on == on) 722 return 0; 723 gs->v1p8_on = on; 724 725 if (v1p8_gpio >= 0) 726 gpio_set_value(v1p8_gpio, on); 727 728 if (gs->v1p8_reg) { 729 regulator_set_voltage(gs->v1p8_reg, 1800000, 1800000); 730 if (on) 731 return regulator_enable(gs->v1p8_reg); 732 else 733 return regulator_disable(gs->v1p8_reg); 734 } 735 736 switch (pmic_id) { 737 case PMIC_AXP: 738 if (on) 739 return axp_v1p8_on(subdev->dev, gs); 740 else 741 return axp_v1p8_off(subdev->dev, gs); 742 case PMIC_TI: 743 value = on ? LDO_1P8V_ON : LDO_1P8V_OFF; 744 745 return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, 746 LDO10_REG, value, 0xff); 747 case PMIC_CRYSTALCOVE: 748 value = on ? CRYSTAL_ON : CRYSTAL_OFF; 749 750 return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, 751 CRYSTAL_1P8V_REG, value, 0xff); 752 default: 753 dev_err(subdev->dev, "Couldn't set power mode for v1p2\n"); 754 } 755 756 757 return -EINVAL; 758 } 759 760 static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) 761 { 762 struct gmin_subdev *gs = find_gmin_subdev(subdev); 763 int ret; 764 struct device *dev; 765 struct i2c_client *client = v4l2_get_subdevdata(subdev); 766 int value; 767 768 dev = &client->dev; 769 770 if (v2p8_gpio == V2P8_GPIO_UNSET) { 771 v2p8_gpio = gmin_get_var_int(dev, true, 772 "V2P8GPIO", V2P8_GPIO_NONE); 773 if (v2p8_gpio != V2P8_GPIO_NONE) { 774 pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n", 775 v2p8_gpio); 776 ret = gpio_request(v2p8_gpio, "camera_v2p8"); 777 if (!ret) 778 ret = gpio_direction_output(v2p8_gpio, 0); 779 if (ret) 780 pr_err("V2P8 GPIO initialization failed\n"); 781 } 782 } 783 784 if (!gs || gs->v2p8_on == on) 785 return 0; 786 gs->v2p8_on = on; 787 788 if (v2p8_gpio >= 0) 789 gpio_set_value(v2p8_gpio, on); 790 791 if (gs->v2p8_reg) { 792 regulator_set_voltage(gs->v2p8_reg, 2900000, 2900000); 793 if (on) 794 return regulator_enable(gs->v2p8_reg); 795 else 796 return regulator_disable(gs->v2p8_reg); 797 } 798 799 switch (pmic_id) { 800 case PMIC_AXP: 801 return axp_regulator_set(subdev->dev, gs, ALDO1_SEL_REG, 802 ALDO1_2P8V, ALDO1_CTRL3_REG, 803 ALDO1_CTRL3_SHIFT, on); 804 case PMIC_TI: 805 value = on ? LDO_2P8V_ON : LDO_2P8V_OFF; 806 807 return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, 808 LDO9_REG, value, 0xff); 809 case PMIC_CRYSTALCOVE: 810 value = on ? CRYSTAL_ON : CRYSTAL_OFF; 811 812 return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, 813 CRYSTAL_2P8V_REG, value, 0xff); 814 default: 815 dev_err(subdev->dev, "Couldn't set power mode for v1p2\n"); 816 } 817 818 return -EINVAL; 819 } 820 821 static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on) 822 { 823 int ret = 0; 824 struct gmin_subdev *gs = find_gmin_subdev(subdev); 825 struct i2c_client *client = v4l2_get_subdevdata(subdev); 826 827 if (gs->clock_on == !!on) 828 return 0; 829 830 if (on) { 831 ret = clk_set_rate(gs->pmc_clk, 832 gs->clock_src ? CLK_RATE_19_2MHZ : CLK_RATE_25_0MHZ); 833 834 if (ret) 835 dev_err(&client->dev, "unable to set PMC rate %d\n", 836 gs->clock_src); 837 838 ret = clk_prepare_enable(gs->pmc_clk); 839 if (ret == 0) 840 gs->clock_on = true; 841 } else { 842 clk_disable_unprepare(gs->pmc_clk); 843 gs->clock_on = false; 844 } 845 846 return ret; 847 } 848 849 static int gmin_csi_cfg(struct v4l2_subdev *sd, int flag) 850 { 851 struct i2c_client *client = v4l2_get_subdevdata(sd); 852 struct gmin_subdev *gs = find_gmin_subdev(sd); 853 854 if (!client || !gs) 855 return -ENODEV; 856 857 return camera_sensor_csi(sd, gs->csi_port, gs->csi_lanes, 858 gs->csi_fmt, gs->csi_bayer, flag); 859 } 860 861 static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, 862 char *camera_module) 863 { 864 struct i2c_client *client = v4l2_get_subdevdata(subdev); 865 struct gmin_subdev *gs = find_gmin_subdev(subdev); 866 struct camera_vcm_control *vcm; 867 868 if (!client || !gs) 869 return NULL; 870 871 if (!camera_module) 872 return NULL; 873 874 mutex_lock(&vcm_lock); 875 list_for_each_entry(vcm, &vcm_devices, list) { 876 if (!strcmp(camera_module, vcm->camera_module)) { 877 mutex_unlock(&vcm_lock); 878 return vcm; 879 } 880 } 881 882 mutex_unlock(&vcm_lock); 883 return NULL; 884 } 885 886 static struct camera_sensor_platform_data gmin_plat = { 887 .gpio0_ctrl = gmin_gpio0_ctrl, 888 .gpio1_ctrl = gmin_gpio1_ctrl, 889 .v1p8_ctrl = gmin_v1p8_ctrl, 890 .v2p8_ctrl = gmin_v2p8_ctrl, 891 .v1p2_ctrl = gmin_v1p2_ctrl, 892 .flisclk_ctrl = gmin_flisclk_ctrl, 893 .csi_cfg = gmin_csi_cfg, 894 .get_vcm_ctrl = gmin_get_vcm_ctrl, 895 }; 896 897 struct camera_sensor_platform_data *gmin_camera_platform_data( 898 struct v4l2_subdev *subdev, 899 enum atomisp_input_format csi_format, 900 enum atomisp_bayer_order csi_bayer) 901 { 902 struct gmin_subdev *gs = find_gmin_subdev(subdev); 903 904 gs->csi_fmt = csi_format; 905 gs->csi_bayer = csi_bayer; 906 907 return &gmin_plat; 908 } 909 EXPORT_SYMBOL_GPL(gmin_camera_platform_data); 910 911 int atomisp_gmin_register_vcm_control(struct camera_vcm_control *vcmCtrl) 912 { 913 if (!vcmCtrl) 914 return -EINVAL; 915 916 mutex_lock(&vcm_lock); 917 list_add_tail(&vcmCtrl->list, &vcm_devices); 918 mutex_unlock(&vcm_lock); 919 920 return 0; 921 } 922 EXPORT_SYMBOL_GPL(atomisp_gmin_register_vcm_control); 923 924 static int gmin_get_hardcoded_var(struct gmin_cfg_var *varlist, 925 const char *var8, char *out, size_t *out_len) 926 { 927 struct gmin_cfg_var *gv; 928 929 for (gv = varlist; gv->name; gv++) { 930 size_t vl; 931 932 if (strcmp(var8, gv->name)) 933 continue; 934 935 vl = strlen(gv->val); 936 if (vl > *out_len - 1) 937 return -ENOSPC; 938 939 strcpy(out, gv->val); 940 *out_len = vl; 941 return 0; 942 } 943 944 return -EINVAL; 945 } 946 947 /* Retrieves a device-specific configuration variable. The dev 948 * argument should be a device with an ACPI companion, as all 949 * configuration is based on firmware ID. 950 */ 951 static int gmin_get_config_var(struct device *maindev, 952 bool is_gmin, 953 const char *var, 954 char *out, size_t *out_len) 955 { 956 char var8[CFG_VAR_NAME_MAX]; 957 efi_char16_t var16[CFG_VAR_NAME_MAX]; 958 struct efivar_entry *ev; 959 const struct dmi_system_id *id; 960 int i, ret; 961 struct device *dev = maindev; 962 963 if (!is_gmin && ACPI_COMPANION(dev)) 964 dev = &ACPI_COMPANION(dev)->dev; 965 966 if (!is_gmin) 967 ret = snprintf(var8, sizeof(var8), "%s_%s", dev_name(dev), var); 968 else 969 ret = snprintf(var8, sizeof(var8), "gmin_%s", var); 970 971 if (ret < 0 || ret >= sizeof(var8) - 1) 972 return -EINVAL; 973 974 /* First check a hard-coded list of board-specific variables. 975 * Some device firmwares lack the ability to set EFI variables at 976 * runtime. 977 */ 978 id = dmi_first_match(gmin_vars); 979 if (id) { 980 dev_info(maindev, "Found DMI entry for '%s'\n", var8); 981 return gmin_get_hardcoded_var(id->driver_data, var8, out, 982 out_len); 983 } 984 985 /* Our variable names are ASCII by construction, but EFI names 986 * are wide chars. Convert and zero-pad. 987 */ 988 memset(var16, 0, sizeof(var16)); 989 for (i = 0; i < sizeof(var8) && var8[i]; i++) 990 var16[i] = var8[i]; 991 992 /* Not sure this API usage is kosher; efivar_entry_get()'s 993 * implementation simply uses VariableName and VendorGuid from 994 * the struct and ignores the rest, but it seems like there 995 * ought to be an "official" efivar_entry registered 996 * somewhere? 997 */ 998 ev = kzalloc(sizeof(*ev), GFP_KERNEL); 999 if (!ev) 1000 return -ENOMEM; 1001 memcpy(&ev->var.VariableName, var16, sizeof(var16)); 1002 ev->var.VendorGuid = GMIN_CFG_VAR_EFI_GUID; 1003 ev->var.DataSize = *out_len; 1004 1005 ret = efivar_entry_get(ev, &ev->var.Attributes, 1006 &ev->var.DataSize, ev->var.Data); 1007 if (ret == 0) { 1008 memcpy(out, ev->var.Data, ev->var.DataSize); 1009 *out_len = ev->var.DataSize; 1010 dev_info(maindev, "found EFI entry for '%s'\n", var8); 1011 } else if (is_gmin) { 1012 dev_warn(maindev, "Failed to find gmin variable %s\n", var8); 1013 } else { 1014 dev_warn(maindev, "Failed to find variable %s\n", var8); 1015 } 1016 1017 kfree(ev); 1018 1019 return ret; 1020 } 1021 1022 int gmin_get_var_int(struct device *dev, bool is_gmin, const char *var, int def) 1023 { 1024 char val[CFG_VAR_NAME_MAX]; 1025 size_t len = sizeof(val); 1026 long result; 1027 int ret; 1028 1029 ret = gmin_get_config_var(dev, is_gmin, var, val, &len); 1030 if (!ret) { 1031 val[len] = 0; 1032 ret = kstrtol(val, 0, &result); 1033 } 1034 1035 return ret ? def : result; 1036 } 1037 EXPORT_SYMBOL_GPL(gmin_get_var_int); 1038 1039 int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, 1040 u32 lanes, u32 format, u32 bayer_order, int flag) 1041 { 1042 struct i2c_client *client = v4l2_get_subdevdata(sd); 1043 struct camera_mipi_info *csi = NULL; 1044 1045 if (flag) { 1046 csi = kzalloc(sizeof(*csi), GFP_KERNEL); 1047 if (!csi) 1048 return -ENOMEM; 1049 csi->port = port; 1050 csi->num_lanes = lanes; 1051 csi->input_format = format; 1052 csi->raw_bayer_order = bayer_order; 1053 v4l2_set_subdev_hostdata(sd, (void *)csi); 1054 csi->metadata_format = ATOMISP_INPUT_FORMAT_EMBEDDED; 1055 csi->metadata_effective_width = NULL; 1056 dev_info(&client->dev, 1057 "camera pdata: port: %d lanes: %d order: %8.8x\n", 1058 port, lanes, bayer_order); 1059 } else { 1060 csi = v4l2_get_subdev_hostdata(sd); 1061 kfree(csi); 1062 } 1063 1064 return 0; 1065 } 1066 EXPORT_SYMBOL_GPL(camera_sensor_csi); 1067 1068 /* PCI quirk: The BYT ISP advertises PCI runtime PM but it doesn't 1069 * work. Disable so the kernel framework doesn't hang the device 1070 * trying. The driver itself does direct calls to the PUNIT to manage 1071 * ISP power. 1072 */ 1073 static void isp_pm_cap_fixup(struct pci_dev *dev) 1074 { 1075 dev_info(&dev->dev, "Disabling PCI power management on camera ISP\n"); 1076 dev->pm_cap = 0; 1077 } 1078 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup); 1079