1 /* 2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210 3 * 4 * Copyright (c) 2010-2010 Analog Devices Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/mutex.h> 13 #include <linux/device.h> 14 #include <linux/spi/spi.h> 15 #include <linux/slab.h> 16 #include <linux/sysfs.h> 17 #include <linux/delay.h> 18 #include <linux/gpio.h> 19 #include <linux/module.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include "ad2s1210.h" 24 25 #define DRV_NAME "ad2s1210" 26 27 #define AD2S1210_DEF_CONTROL 0x7E 28 29 #define AD2S1210_MSB_IS_HIGH 0x80 30 #define AD2S1210_MSB_IS_LOW 0x7F 31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20 32 #define AD2S1210_ENABLE_HYSTERESIS 0x10 33 #define AD2S1210_SET_ENRES1 0x08 34 #define AD2S1210_SET_ENRES0 0x04 35 #define AD2S1210_SET_RES1 0x02 36 #define AD2S1210_SET_RES0 0x01 37 38 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0) 39 40 #define AD2S1210_REG_POSITION 0x80 41 #define AD2S1210_REG_VELOCITY 0x82 42 #define AD2S1210_REG_LOS_THRD 0x88 43 #define AD2S1210_REG_DOS_OVR_THRD 0x89 44 #define AD2S1210_REG_DOS_MIS_THRD 0x8A 45 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B 46 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C 47 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D 48 #define AD2S1210_REG_LOT_LOW_THRD 0x8E 49 #define AD2S1210_REG_EXCIT_FREQ 0x91 50 #define AD2S1210_REG_CONTROL 0x92 51 #define AD2S1210_REG_SOFT_RESET 0xF0 52 #define AD2S1210_REG_FAULT 0xFF 53 54 #define AD2S1210_MIN_CLKIN 6144000 55 #define AD2S1210_MAX_CLKIN 10240000 56 #define AD2S1210_MIN_EXCIT 2000 57 #define AD2S1210_MAX_EXCIT 20000 58 #define AD2S1210_MIN_FCW 0x4 59 #define AD2S1210_MAX_FCW 0x50 60 61 #define AD2S1210_DEF_EXCIT 10000 62 63 enum ad2s1210_mode { 64 MOD_POS = 0, 65 MOD_VEL, 66 MOD_CONFIG, 67 MOD_RESERVED, 68 }; 69 70 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 }; 71 72 struct ad2s1210_state { 73 const struct ad2s1210_platform_data *pdata; 74 struct mutex lock; 75 struct spi_device *sdev; 76 unsigned int fclkin; 77 unsigned int fexcit; 78 bool hysteresis; 79 u8 resolution; 80 enum ad2s1210_mode mode; 81 u8 rx[2] ____cacheline_aligned; 82 u8 tx[2] ____cacheline_aligned; 83 }; 84 85 static const int ad2s1210_mode_vals[4][2] = { 86 [MOD_POS] = { 0, 0 }, 87 [MOD_VEL] = { 0, 1 }, 88 [MOD_CONFIG] = { 1, 0 }, 89 }; 90 91 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode, 92 struct ad2s1210_state *st) 93 { 94 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]); 95 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]); 96 st->mode = mode; 97 } 98 99 /* write 1 bytes (address or data) to the chip */ 100 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data) 101 { 102 int ret; 103 104 ad2s1210_set_mode(MOD_CONFIG, st); 105 st->tx[0] = data; 106 ret = spi_write(st->sdev, st->tx, 1); 107 if (ret < 0) 108 return ret; 109 110 return 0; 111 } 112 113 /* read value from one of the registers */ 114 static int ad2s1210_config_read(struct ad2s1210_state *st, 115 unsigned char address) 116 { 117 struct spi_transfer xfer = { 118 .len = 2, 119 .rx_buf = st->rx, 120 .tx_buf = st->tx, 121 }; 122 int ret = 0; 123 124 ad2s1210_set_mode(MOD_CONFIG, st); 125 st->tx[0] = address | AD2S1210_MSB_IS_HIGH; 126 st->tx[1] = AD2S1210_REG_FAULT; 127 ret = spi_sync_transfer(st->sdev, &xfer, 1); 128 if (ret < 0) 129 return ret; 130 131 return st->rx[1]; 132 } 133 134 static inline 135 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st) 136 { 137 int ret; 138 unsigned char fcw; 139 140 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin); 141 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) { 142 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n"); 143 return -ERANGE; 144 } 145 146 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ); 147 if (ret < 0) 148 return ret; 149 150 return ad2s1210_config_write(st, fcw); 151 } 152 153 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st) 154 { 155 int resolution = (gpio_get_value(st->pdata->res[0]) << 1) | 156 gpio_get_value(st->pdata->res[1]); 157 158 return ad2s1210_resolution_value[resolution]; 159 } 160 161 static const int ad2s1210_res_pins[4][2] = { 162 { 0, 0 }, {0, 1}, {1, 0}, {1, 1} 163 }; 164 165 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st) 166 { 167 gpio_set_value(st->pdata->res[0], 168 ad2s1210_res_pins[(st->resolution - 10) / 2][0]); 169 gpio_set_value(st->pdata->res[1], 170 ad2s1210_res_pins[(st->resolution - 10) / 2][1]); 171 } 172 173 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) 174 { 175 int ret; 176 177 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET); 178 if (ret < 0) 179 return ret; 180 181 return ad2s1210_config_write(st, 0x0); 182 } 183 184 static ssize_t ad2s1210_show_fclkin(struct device *dev, 185 struct device_attribute *attr, 186 char *buf) 187 { 188 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 189 190 return sprintf(buf, "%u\n", st->fclkin); 191 } 192 193 static ssize_t ad2s1210_store_fclkin(struct device *dev, 194 struct device_attribute *attr, 195 const char *buf, 196 size_t len) 197 { 198 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 199 unsigned int fclkin; 200 int ret; 201 202 ret = kstrtouint(buf, 10, &fclkin); 203 if (ret) 204 return ret; 205 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) { 206 dev_err(dev, "ad2s1210: fclkin out of range\n"); 207 return -EINVAL; 208 } 209 210 mutex_lock(&st->lock); 211 st->fclkin = fclkin; 212 213 ret = ad2s1210_update_frequency_control_word(st); 214 if (ret < 0) 215 goto error_ret; 216 ret = ad2s1210_soft_reset(st); 217 error_ret: 218 mutex_unlock(&st->lock); 219 220 return ret < 0 ? ret : len; 221 } 222 223 static ssize_t ad2s1210_show_fexcit(struct device *dev, 224 struct device_attribute *attr, 225 char *buf) 226 { 227 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 228 229 return sprintf(buf, "%u\n", st->fexcit); 230 } 231 232 static ssize_t ad2s1210_store_fexcit(struct device *dev, 233 struct device_attribute *attr, 234 const char *buf, size_t len) 235 { 236 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 237 unsigned int fexcit; 238 int ret; 239 240 ret = kstrtouint(buf, 10, &fexcit); 241 if (ret < 0) 242 return ret; 243 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) { 244 dev_err(dev, 245 "ad2s1210: excitation frequency out of range\n"); 246 return -EINVAL; 247 } 248 mutex_lock(&st->lock); 249 st->fexcit = fexcit; 250 ret = ad2s1210_update_frequency_control_word(st); 251 if (ret < 0) 252 goto error_ret; 253 ret = ad2s1210_soft_reset(st); 254 error_ret: 255 mutex_unlock(&st->lock); 256 257 return ret < 0 ? ret : len; 258 } 259 260 static ssize_t ad2s1210_show_control(struct device *dev, 261 struct device_attribute *attr, 262 char *buf) 263 { 264 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 265 int ret; 266 267 mutex_lock(&st->lock); 268 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 269 mutex_unlock(&st->lock); 270 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret); 271 } 272 273 static ssize_t ad2s1210_store_control(struct device *dev, 274 struct device_attribute *attr, 275 const char *buf, size_t len) 276 { 277 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 278 unsigned char udata; 279 unsigned char data; 280 int ret; 281 282 ret = kstrtou8(buf, 16, &udata); 283 if (ret) 284 return -EINVAL; 285 286 mutex_lock(&st->lock); 287 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 288 if (ret < 0) 289 goto error_ret; 290 data = udata & AD2S1210_MSB_IS_LOW; 291 ret = ad2s1210_config_write(st, data); 292 if (ret < 0) 293 goto error_ret; 294 295 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 296 if (ret < 0) 297 goto error_ret; 298 if (ret & AD2S1210_MSB_IS_HIGH) { 299 ret = -EIO; 300 dev_err(dev, 301 "ad2s1210: write control register fail\n"); 302 goto error_ret; 303 } 304 st->resolution 305 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; 306 if (st->pdata->gpioin) { 307 data = ad2s1210_read_resolution_pin(st); 308 if (data != st->resolution) 309 dev_warn(dev, "ad2s1210: resolution settings not match\n"); 310 } else { 311 ad2s1210_set_resolution_pin(st); 312 } 313 ret = len; 314 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS); 315 316 error_ret: 317 mutex_unlock(&st->lock); 318 return ret; 319 } 320 321 static ssize_t ad2s1210_show_resolution(struct device *dev, 322 struct device_attribute *attr, 323 char *buf) 324 { 325 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 326 327 return sprintf(buf, "%d\n", st->resolution); 328 } 329 330 static ssize_t ad2s1210_store_resolution(struct device *dev, 331 struct device_attribute *attr, 332 const char *buf, size_t len) 333 { 334 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 335 unsigned char data; 336 unsigned char udata; 337 int ret; 338 339 ret = kstrtou8(buf, 10, &udata); 340 if (ret || udata < 10 || udata > 16) { 341 dev_err(dev, "ad2s1210: resolution out of range\n"); 342 return -EINVAL; 343 } 344 mutex_lock(&st->lock); 345 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 346 if (ret < 0) 347 goto error_ret; 348 data = ret; 349 data &= ~AD2S1210_SET_RESOLUTION; 350 data |= (udata - 10) >> 1; 351 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 352 if (ret < 0) 353 goto error_ret; 354 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); 355 if (ret < 0) 356 goto error_ret; 357 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 358 if (ret < 0) 359 goto error_ret; 360 data = ret; 361 if (data & AD2S1210_MSB_IS_HIGH) { 362 ret = -EIO; 363 dev_err(dev, "ad2s1210: setting resolution fail\n"); 364 goto error_ret; 365 } 366 st->resolution 367 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; 368 if (st->pdata->gpioin) { 369 data = ad2s1210_read_resolution_pin(st); 370 if (data != st->resolution) 371 dev_warn(dev, "ad2s1210: resolution settings not match\n"); 372 } else { 373 ad2s1210_set_resolution_pin(st); 374 } 375 ret = len; 376 error_ret: 377 mutex_unlock(&st->lock); 378 return ret; 379 } 380 381 /* read the fault register since last sample */ 382 static ssize_t ad2s1210_show_fault(struct device *dev, 383 struct device_attribute *attr, char *buf) 384 { 385 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 386 int ret; 387 388 mutex_lock(&st->lock); 389 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT); 390 mutex_unlock(&st->lock); 391 392 return ret ? ret : sprintf(buf, "0x%x\n", ret); 393 } 394 395 static ssize_t ad2s1210_clear_fault(struct device *dev, 396 struct device_attribute *attr, 397 const char *buf, 398 size_t len) 399 { 400 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 401 int ret; 402 403 mutex_lock(&st->lock); 404 gpio_set_value(st->pdata->sample, 0); 405 /* delay (2 * tck + 20) nano seconds */ 406 udelay(1); 407 gpio_set_value(st->pdata->sample, 1); 408 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT); 409 if (ret < 0) 410 goto error_ret; 411 gpio_set_value(st->pdata->sample, 0); 412 gpio_set_value(st->pdata->sample, 1); 413 error_ret: 414 mutex_unlock(&st->lock); 415 416 return ret < 0 ? ret : len; 417 } 418 419 static ssize_t ad2s1210_show_reg(struct device *dev, 420 struct device_attribute *attr, 421 char *buf) 422 { 423 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 424 struct iio_dev_attr *iattr = to_iio_dev_attr(attr); 425 int ret; 426 427 mutex_lock(&st->lock); 428 ret = ad2s1210_config_read(st, iattr->address); 429 mutex_unlock(&st->lock); 430 431 return ret < 0 ? ret : sprintf(buf, "%d\n", ret); 432 } 433 434 static ssize_t ad2s1210_store_reg(struct device *dev, 435 struct device_attribute *attr, 436 const char *buf, size_t len) 437 { 438 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 439 unsigned char data; 440 int ret; 441 struct iio_dev_attr *iattr = to_iio_dev_attr(attr); 442 443 ret = kstrtou8(buf, 10, &data); 444 if (ret) 445 return -EINVAL; 446 mutex_lock(&st->lock); 447 ret = ad2s1210_config_write(st, iattr->address); 448 if (ret < 0) 449 goto error_ret; 450 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); 451 error_ret: 452 mutex_unlock(&st->lock); 453 return ret < 0 ? ret : len; 454 } 455 456 static int ad2s1210_read_raw(struct iio_dev *indio_dev, 457 struct iio_chan_spec const *chan, 458 int *val, 459 int *val2, 460 long m) 461 { 462 struct ad2s1210_state *st = iio_priv(indio_dev); 463 u16 negative; 464 int ret = 0; 465 u16 pos; 466 s16 vel; 467 468 mutex_lock(&st->lock); 469 gpio_set_value(st->pdata->sample, 0); 470 /* delay (6 * tck + 20) nano seconds */ 471 udelay(1); 472 473 switch (chan->type) { 474 case IIO_ANGL: 475 ad2s1210_set_mode(MOD_POS, st); 476 break; 477 case IIO_ANGL_VEL: 478 ad2s1210_set_mode(MOD_VEL, st); 479 break; 480 default: 481 ret = -EINVAL; 482 break; 483 } 484 if (ret < 0) 485 goto error_ret; 486 ret = spi_read(st->sdev, st->rx, 2); 487 if (ret < 0) 488 goto error_ret; 489 490 switch (chan->type) { 491 case IIO_ANGL: 492 pos = be16_to_cpup((__be16 *)st->rx); 493 if (st->hysteresis) 494 pos >>= 16 - st->resolution; 495 *val = pos; 496 ret = IIO_VAL_INT; 497 break; 498 case IIO_ANGL_VEL: 499 negative = st->rx[0] & 0x80; 500 vel = be16_to_cpup((__be16 *)st->rx); 501 vel >>= 16 - st->resolution; 502 if (vel & 0x8000) { 503 negative = (0xffff >> st->resolution) << st->resolution; 504 vel |= negative; 505 } 506 *val = vel; 507 ret = IIO_VAL_INT; 508 break; 509 default: 510 mutex_unlock(&st->lock); 511 return -EINVAL; 512 } 513 514 error_ret: 515 gpio_set_value(st->pdata->sample, 1); 516 /* delay (2 * tck + 20) nano seconds */ 517 udelay(1); 518 mutex_unlock(&st->lock); 519 return ret; 520 } 521 522 static IIO_DEVICE_ATTR(fclkin, 0644, 523 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0); 524 static IIO_DEVICE_ATTR(fexcit, 0644, 525 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); 526 static IIO_DEVICE_ATTR(control, 0644, 527 ad2s1210_show_control, ad2s1210_store_control, 0); 528 static IIO_DEVICE_ATTR(bits, 0644, 529 ad2s1210_show_resolution, ad2s1210_store_resolution, 0); 530 static IIO_DEVICE_ATTR(fault, 0644, 531 ad2s1210_show_fault, ad2s1210_clear_fault, 0); 532 533 static IIO_DEVICE_ATTR(los_thrd, 0644, 534 ad2s1210_show_reg, ad2s1210_store_reg, 535 AD2S1210_REG_LOS_THRD); 536 static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644, 537 ad2s1210_show_reg, ad2s1210_store_reg, 538 AD2S1210_REG_DOS_OVR_THRD); 539 static IIO_DEVICE_ATTR(dos_mis_thrd, 0644, 540 ad2s1210_show_reg, ad2s1210_store_reg, 541 AD2S1210_REG_DOS_MIS_THRD); 542 static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, 543 ad2s1210_show_reg, ad2s1210_store_reg, 544 AD2S1210_REG_DOS_RST_MAX_THRD); 545 static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644, 546 ad2s1210_show_reg, ad2s1210_store_reg, 547 AD2S1210_REG_DOS_RST_MIN_THRD); 548 static IIO_DEVICE_ATTR(lot_high_thrd, 0644, 549 ad2s1210_show_reg, ad2s1210_store_reg, 550 AD2S1210_REG_LOT_HIGH_THRD); 551 static IIO_DEVICE_ATTR(lot_low_thrd, 0644, 552 ad2s1210_show_reg, ad2s1210_store_reg, 553 AD2S1210_REG_LOT_LOW_THRD); 554 555 static const struct iio_chan_spec ad2s1210_channels[] = { 556 { 557 .type = IIO_ANGL, 558 .indexed = 1, 559 .channel = 0, 560 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 561 }, { 562 .type = IIO_ANGL_VEL, 563 .indexed = 1, 564 .channel = 0, 565 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 566 } 567 }; 568 569 static struct attribute *ad2s1210_attributes[] = { 570 &iio_dev_attr_fclkin.dev_attr.attr, 571 &iio_dev_attr_fexcit.dev_attr.attr, 572 &iio_dev_attr_control.dev_attr.attr, 573 &iio_dev_attr_bits.dev_attr.attr, 574 &iio_dev_attr_fault.dev_attr.attr, 575 &iio_dev_attr_los_thrd.dev_attr.attr, 576 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, 577 &iio_dev_attr_dos_mis_thrd.dev_attr.attr, 578 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, 579 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, 580 &iio_dev_attr_lot_high_thrd.dev_attr.attr, 581 &iio_dev_attr_lot_low_thrd.dev_attr.attr, 582 NULL, 583 }; 584 585 static const struct attribute_group ad2s1210_attribute_group = { 586 .attrs = ad2s1210_attributes, 587 }; 588 589 static int ad2s1210_initial(struct ad2s1210_state *st) 590 { 591 unsigned char data; 592 int ret; 593 594 mutex_lock(&st->lock); 595 if (st->pdata->gpioin) 596 st->resolution = ad2s1210_read_resolution_pin(st); 597 else 598 ad2s1210_set_resolution_pin(st); 599 600 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 601 if (ret < 0) 602 goto error_ret; 603 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION); 604 data |= (st->resolution - 10) >> 1; 605 ret = ad2s1210_config_write(st, data); 606 if (ret < 0) 607 goto error_ret; 608 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 609 if (ret < 0) 610 goto error_ret; 611 612 if (ret & AD2S1210_MSB_IS_HIGH) { 613 ret = -EIO; 614 goto error_ret; 615 } 616 617 ret = ad2s1210_update_frequency_control_word(st); 618 if (ret < 0) 619 goto error_ret; 620 ret = ad2s1210_soft_reset(st); 621 error_ret: 622 mutex_unlock(&st->lock); 623 return ret; 624 } 625 626 static const struct iio_info ad2s1210_info = { 627 .read_raw = ad2s1210_read_raw, 628 .attrs = &ad2s1210_attribute_group, 629 }; 630 631 static int ad2s1210_setup_gpios(struct ad2s1210_state *st) 632 { 633 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; 634 struct gpio ad2s1210_gpios[] = { 635 { st->pdata->sample, GPIOF_DIR_IN, "sample" }, 636 { st->pdata->a[0], flags, "a0" }, 637 { st->pdata->a[1], flags, "a1" }, 638 { st->pdata->res[0], flags, "res0" }, 639 { st->pdata->res[0], flags, "res1" }, 640 }; 641 642 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); 643 } 644 645 static void ad2s1210_free_gpios(struct ad2s1210_state *st) 646 { 647 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; 648 struct gpio ad2s1210_gpios[] = { 649 { st->pdata->sample, GPIOF_DIR_IN, "sample" }, 650 { st->pdata->a[0], flags, "a0" }, 651 { st->pdata->a[1], flags, "a1" }, 652 { st->pdata->res[0], flags, "res0" }, 653 { st->pdata->res[0], flags, "res1" }, 654 }; 655 656 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); 657 } 658 659 static int ad2s1210_probe(struct spi_device *spi) 660 { 661 struct iio_dev *indio_dev; 662 struct ad2s1210_state *st; 663 int ret; 664 665 if (!spi->dev.platform_data) 666 return -EINVAL; 667 668 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 669 if (!indio_dev) 670 return -ENOMEM; 671 st = iio_priv(indio_dev); 672 st->pdata = spi->dev.platform_data; 673 ret = ad2s1210_setup_gpios(st); 674 if (ret < 0) 675 return ret; 676 677 spi_set_drvdata(spi, indio_dev); 678 679 mutex_init(&st->lock); 680 st->sdev = spi; 681 st->hysteresis = true; 682 st->mode = MOD_CONFIG; 683 st->resolution = 12; 684 st->fexcit = AD2S1210_DEF_EXCIT; 685 686 indio_dev->dev.parent = &spi->dev; 687 indio_dev->info = &ad2s1210_info; 688 indio_dev->modes = INDIO_DIRECT_MODE; 689 indio_dev->channels = ad2s1210_channels; 690 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels); 691 indio_dev->name = spi_get_device_id(spi)->name; 692 693 ret = iio_device_register(indio_dev); 694 if (ret) 695 goto error_free_gpios; 696 697 st->fclkin = spi->max_speed_hz; 698 spi->mode = SPI_MODE_3; 699 spi_setup(spi); 700 ad2s1210_initial(st); 701 702 return 0; 703 704 error_free_gpios: 705 ad2s1210_free_gpios(st); 706 return ret; 707 } 708 709 static int ad2s1210_remove(struct spi_device *spi) 710 { 711 struct iio_dev *indio_dev = spi_get_drvdata(spi); 712 713 iio_device_unregister(indio_dev); 714 ad2s1210_free_gpios(iio_priv(indio_dev)); 715 716 return 0; 717 } 718 719 static const struct spi_device_id ad2s1210_id[] = { 720 { "ad2s1210" }, 721 {} 722 }; 723 MODULE_DEVICE_TABLE(spi, ad2s1210_id); 724 725 static struct spi_driver ad2s1210_driver = { 726 .driver = { 727 .name = DRV_NAME, 728 }, 729 .probe = ad2s1210_probe, 730 .remove = ad2s1210_remove, 731 .id_table = ad2s1210_id, 732 }; 733 module_spi_driver(ad2s1210_driver); 734 735 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>"); 736 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver"); 737 MODULE_LICENSE("GPL v2"); 738