1 /** 2 * Copyright (c) 2015-2016 Google Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 1. Redistributions of source code must retain the above copyright notice, 8 * this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright notice, 10 * this list of conditions and the following disclaimer in the documentation 11 * and/or other materials provided with the distribution. 12 * 3. Neither the name of the copyright holder nor the names of its 13 * contributors may be used to endorse or promote products derived from this 14 * software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /* 29 * This is a special protocol for configuring communication over the 30 * I2S bus between the DSP on the MSM8994 and APBridgeA. Therefore, 31 * we can predefine several low-level attributes of the communication 32 * because we know that they are supported. In particular, the following 33 * assumptions are made: 34 * - there are two channels (i.e., stereo) 35 * - the low-level protocol is I2S as defined by Philips/NXP 36 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK 37 * - WCLK changes on the falling edge of BCLK 38 * - WCLK low for left channel; high for right channel 39 * - TX data is sent on the falling edge of BCLK 40 * - RX data is received/latched on the rising edge of BCLK 41 */ 42 43 #ifndef __AUDIO_APBRIDGEA_H 44 #define __AUDIO_APBRIDGEA_H 45 46 #define AUDIO_APBRIDGEA_TYPE_SET_CONFIG 0x01 47 #define AUDIO_APBRIDGEA_TYPE_REGISTER_CPORT 0x02 48 #define AUDIO_APBRIDGEA_TYPE_UNREGISTER_CPORT 0x03 49 #define AUDIO_APBRIDGEA_TYPE_SET_TX_DATA_SIZE 0x04 50 /* 0x05 unused */ 51 #define AUDIO_APBRIDGEA_TYPE_PREPARE_TX 0x06 52 #define AUDIO_APBRIDGEA_TYPE_START_TX 0x07 53 #define AUDIO_APBRIDGEA_TYPE_STOP_TX 0x08 54 #define AUDIO_APBRIDGEA_TYPE_SHUTDOWN_TX 0x09 55 #define AUDIO_APBRIDGEA_TYPE_SET_RX_DATA_SIZE 0x0a 56 /* 0x0b unused */ 57 #define AUDIO_APBRIDGEA_TYPE_PREPARE_RX 0x0c 58 #define AUDIO_APBRIDGEA_TYPE_START_RX 0x0d 59 #define AUDIO_APBRIDGEA_TYPE_STOP_RX 0x0e 60 #define AUDIO_APBRIDGEA_TYPE_SHUTDOWN_RX 0x0f 61 62 #define AUDIO_APBRIDGEA_PCM_FMT_8 BIT(0) 63 #define AUDIO_APBRIDGEA_PCM_FMT_16 BIT(1) 64 #define AUDIO_APBRIDGEA_PCM_FMT_24 BIT(2) 65 #define AUDIO_APBRIDGEA_PCM_FMT_32 BIT(3) 66 #define AUDIO_APBRIDGEA_PCM_FMT_64 BIT(4) 67 68 #define AUDIO_APBRIDGEA_PCM_RATE_5512 BIT(0) 69 #define AUDIO_APBRIDGEA_PCM_RATE_8000 BIT(1) 70 #define AUDIO_APBRIDGEA_PCM_RATE_11025 BIT(2) 71 #define AUDIO_APBRIDGEA_PCM_RATE_16000 BIT(3) 72 #define AUDIO_APBRIDGEA_PCM_RATE_22050 BIT(4) 73 #define AUDIO_APBRIDGEA_PCM_RATE_32000 BIT(5) 74 #define AUDIO_APBRIDGEA_PCM_RATE_44100 BIT(6) 75 #define AUDIO_APBRIDGEA_PCM_RATE_48000 BIT(7) 76 #define AUDIO_APBRIDGEA_PCM_RATE_64000 BIT(8) 77 #define AUDIO_APBRIDGEA_PCM_RATE_88200 BIT(9) 78 #define AUDIO_APBRIDGEA_PCM_RATE_96000 BIT(10) 79 #define AUDIO_APBRIDGEA_PCM_RATE_176400 BIT(11) 80 #define AUDIO_APBRIDGEA_PCM_RATE_192000 BIT(12) 81 82 #define AUDIO_APBRIDGEA_DIRECTION_TX BIT(0) 83 #define AUDIO_APBRIDGEA_DIRECTION_RX BIT(1) 84 85 /* The I2S port is passed in the 'index' parameter of the USB request */ 86 /* The CPort is passed in the 'value' parameter of the USB request */ 87 88 struct audio_apbridgea_hdr { 89 __u8 type; 90 __le16 i2s_port; 91 __u8 data[0]; 92 } __packed; 93 94 struct audio_apbridgea_set_config_request { 95 struct audio_apbridgea_hdr hdr; 96 __le32 format; /* AUDIO_APBRIDGEA_PCM_FMT_* */ 97 __le32 rate; /* AUDIO_APBRIDGEA_PCM_RATE_* */ 98 __le32 mclk_freq; /* XXX Remove? */ 99 } __packed; 100 101 struct audio_apbridgea_register_cport_request { 102 struct audio_apbridgea_hdr hdr; 103 __le16 cport; 104 __u8 direction; 105 } __packed; 106 107 struct audio_apbridgea_unregister_cport_request { 108 struct audio_apbridgea_hdr hdr; 109 __le16 cport; 110 __u8 direction; 111 } __packed; 112 113 struct audio_apbridgea_set_tx_data_size_request { 114 struct audio_apbridgea_hdr hdr; 115 __le16 size; 116 } __packed; 117 118 struct audio_apbridgea_prepare_tx_request { 119 struct audio_apbridgea_hdr hdr; 120 } __packed; 121 122 struct audio_apbridgea_start_tx_request { 123 struct audio_apbridgea_hdr hdr; 124 __le64 timestamp; 125 } __packed; 126 127 struct audio_apbridgea_stop_tx_request { 128 struct audio_apbridgea_hdr hdr; 129 } __packed; 130 131 struct audio_apbridgea_shutdown_tx_request { 132 struct audio_apbridgea_hdr hdr; 133 } __packed; 134 135 struct audio_apbridgea_set_rx_data_size_request { 136 struct audio_apbridgea_hdr hdr; 137 __le16 size; 138 } __packed; 139 140 struct audio_apbridgea_prepare_rx_request { 141 struct audio_apbridgea_hdr hdr; 142 } __packed; 143 144 struct audio_apbridgea_start_rx_request { 145 struct audio_apbridgea_hdr hdr; 146 } __packed; 147 148 struct audio_apbridgea_stop_rx_request { 149 struct audio_apbridgea_hdr hdr; 150 } __packed; 151 152 struct audio_apbridgea_shutdown_rx_request { 153 struct audio_apbridgea_hdr hdr; 154 } __packed; 155 156 #endif /*__AUDIO_APBRIDGEA_H */ 157