1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Arcx Anybus-S Controller driver
4  *
5  * Copyright (C) 2018 Arcx Inc
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/platform_device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/io.h>
15 #include <linux/of.h>
16 #include <linux/delay.h>
17 #include <linux/idr.h>
18 #include <linux/mutex.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/regmap.h>
22 
23 /* move to <linux/anybuss-controller.h> when taking this out of staging */
24 #include "anybuss-controller.h"
25 
26 #define CPLD_STATUS1		0x80
27 #define CPLD_CONTROL		0x80
28 #define CPLD_CONTROL_CRST	0x40
29 #define CPLD_CONTROL_RST1	0x04
30 #define CPLD_CONTROL_RST2	0x80
31 #define CPLD_STATUS1_AB		0x02
32 #define CPLD_STATUS1_CAN_POWER	0x01
33 #define CPLD_DESIGN_LO		0x81
34 #define CPLD_DESIGN_HI		0x82
35 #define CPLD_CAP		0x83
36 #define CPLD_CAP_COMPAT		0x01
37 #define CPLD_CAP_SEP_RESETS	0x02
38 
39 struct controller_priv {
40 	struct device *class_dev;
41 	bool common_reset;
42 	struct gpio_desc *reset_gpiod;
43 	void __iomem *cpld_base;
44 	struct mutex ctrl_lock; /* protects CONTROL register */
45 	u8 control_reg;
46 	char version[3];
47 	u16 design_no;
48 };
49 
50 static void do_reset(struct controller_priv *cd, u8 rst_bit, bool reset)
51 {
52 	mutex_lock(&cd->ctrl_lock);
53 	/*
54 	 * CPLD_CONTROL is write-only, so cache its value in
55 	 * cd->control_reg
56 	 */
57 	if (reset)
58 		cd->control_reg &= ~rst_bit;
59 	else
60 		cd->control_reg |= rst_bit;
61 	writeb(cd->control_reg, cd->cpld_base + CPLD_CONTROL);
62 	/*
63 	 * h/w work-around:
64 	 * the hardware is 'too fast', so a reset followed by an immediate
65 	 * not-reset will _not_ change the anybus reset line in any way,
66 	 * losing the reset. to prevent this from happening, introduce
67 	 * a minimum reset duration.
68 	 * Verified minimum safe duration required using a scope
69 	 * on 14-June-2018: 100 us.
70 	 */
71 	if (reset)
72 		usleep_range(100, 200);
73 	mutex_unlock(&cd->ctrl_lock);
74 }
75 
76 static int anybuss_reset(struct controller_priv *cd,
77 			 unsigned long id, bool reset)
78 {
79 	if (id >= 2)
80 		return -EINVAL;
81 	if (cd->common_reset)
82 		do_reset(cd, CPLD_CONTROL_CRST, reset);
83 	else
84 		do_reset(cd, id ? CPLD_CONTROL_RST2 : CPLD_CONTROL_RST1, reset);
85 	return 0;
86 }
87 
88 static void export_reset_0(struct device *dev, bool assert)
89 {
90 	struct controller_priv *cd = dev_get_drvdata(dev);
91 
92 	anybuss_reset(cd, 0, assert);
93 }
94 
95 static void export_reset_1(struct device *dev, bool assert)
96 {
97 	struct controller_priv *cd = dev_get_drvdata(dev);
98 
99 	anybuss_reset(cd, 1, assert);
100 }
101 
102 /*
103  * parallel bus limitation:
104  *
105  * the anybus is 8-bit wide. we can't assume that the hardware will translate
106  * word accesses on the parallel bus to multiple byte-accesses on the anybus.
107  *
108  * the imx WEIM bus does not provide this type of translation.
109  *
110  * to be safe, we will limit parallel bus accesses to a single byte
111  * at a time for now.
112  */
113 
114 static int read_reg_bus(void *context, unsigned int reg,
115 			unsigned int *val)
116 {
117 	void __iomem *base = context;
118 
119 	*val = readb(base + reg);
120 	return 0;
121 }
122 
123 static int write_reg_bus(void *context, unsigned int reg,
124 			 unsigned int val)
125 {
126 	void __iomem *base = context;
127 
128 	writeb(val, base + reg);
129 	return 0;
130 }
131 
132 static struct regmap *create_parallel_regmap(struct platform_device *pdev,
133 					     int idx)
134 {
135 	struct regmap_config regmap_cfg = {
136 		.reg_bits = 11,
137 		.val_bits = 8,
138 		/*
139 		 * single-byte parallel bus accesses are atomic, so don't
140 		 * require any synchronization.
141 		 */
142 		.disable_locking = true,
143 		.reg_read = read_reg_bus,
144 		.reg_write = write_reg_bus,
145 	};
146 	struct resource *res;
147 	void __iomem *base;
148 	struct device *dev = &pdev->dev;
149 
150 	res = platform_get_resource(pdev, IORESOURCE_MEM, idx + 1);
151 	if (resource_size(res) < (1 << regmap_cfg.reg_bits))
152 		return ERR_PTR(-EINVAL);
153 	base = devm_ioremap_resource(dev, res);
154 	if (IS_ERR(base))
155 		return ERR_CAST(base);
156 	return devm_regmap_init(dev, NULL, base, &regmap_cfg);
157 }
158 
159 static struct anybuss_host *
160 create_anybus_host(struct platform_device *pdev, int idx)
161 {
162 	struct anybuss_ops ops = {};
163 
164 	switch (idx) {
165 	case 0:
166 		ops.reset = export_reset_0;
167 		break;
168 	case 1:
169 		ops.reset = export_reset_1;
170 		break;
171 	default:
172 		return ERR_PTR(-EINVAL);
173 	}
174 	ops.host_idx = idx;
175 	ops.regmap = create_parallel_regmap(pdev, idx);
176 	if (IS_ERR(ops.regmap))
177 		return ERR_CAST(ops.regmap);
178 	ops.irq = platform_get_irq(pdev, idx);
179 	if (ops.irq <= 0)
180 		return ERR_PTR(-EINVAL);
181 	return devm_anybuss_host_common_probe(&pdev->dev, &ops);
182 }
183 
184 static ssize_t version_show(struct device *dev,
185 			    struct device_attribute *attr, char *buf)
186 {
187 	struct controller_priv *cd = dev_get_drvdata(dev);
188 
189 	return sprintf(buf, "%s\n", cd->version);
190 }
191 static DEVICE_ATTR_RO(version);
192 
193 static ssize_t design_number_show(struct device *dev,
194 				  struct device_attribute *attr, char *buf)
195 {
196 	struct controller_priv *cd = dev_get_drvdata(dev);
197 
198 	return sprintf(buf, "%d\n", cd->design_no);
199 }
200 static DEVICE_ATTR_RO(design_number);
201 
202 static struct attribute *controller_attributes[] = {
203 	&dev_attr_version.attr,
204 	&dev_attr_design_number.attr,
205 	NULL,
206 };
207 
208 static struct attribute_group controller_attribute_group = {
209 	.attrs = controller_attributes,
210 };
211 
212 static const struct attribute_group *controller_attribute_groups[] = {
213 	&controller_attribute_group,
214 	NULL,
215 };
216 
217 static void controller_device_release(struct device *dev)
218 {
219 	kfree(dev);
220 }
221 
222 static int can_power_is_enabled(struct regulator_dev *rdev)
223 {
224 	struct controller_priv *cd = rdev_get_drvdata(rdev);
225 
226 	return !(readb(cd->cpld_base + CPLD_STATUS1) & CPLD_STATUS1_CAN_POWER);
227 }
228 
229 static struct regulator_ops can_power_ops = {
230 	.is_enabled = can_power_is_enabled,
231 };
232 
233 static const struct regulator_desc can_power_desc = {
234 	.name = "regulator-can-power",
235 	.id = -1,
236 	.type = REGULATOR_VOLTAGE,
237 	.owner = THIS_MODULE,
238 	.ops = &can_power_ops,
239 };
240 
241 static struct class *controller_class;
242 static DEFINE_IDA(controller_index_ida);
243 
244 static int controller_probe(struct platform_device *pdev)
245 {
246 	struct controller_priv *cd;
247 	struct device *dev = &pdev->dev;
248 	struct regulator_config config = { };
249 	struct regulator_dev *regulator;
250 	int err, id;
251 	struct resource *res;
252 	struct anybuss_host *host;
253 	u8 status1, cap;
254 
255 	cd = devm_kzalloc(dev, sizeof(*cd), GFP_KERNEL);
256 	if (!cd)
257 		return -ENOMEM;
258 	dev_set_drvdata(dev, cd);
259 	mutex_init(&cd->ctrl_lock);
260 	cd->reset_gpiod = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
261 	if (IS_ERR(cd->reset_gpiod))
262 		return PTR_ERR(cd->reset_gpiod);
263 
264 	/* CPLD control memory, sits at index 0 */
265 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
266 	cd->cpld_base = devm_ioremap_resource(dev, res);
267 	if (IS_ERR(cd->cpld_base)) {
268 		dev_err(dev,
269 			"failed to map cpld base address\n");
270 		err = PTR_ERR(cd->cpld_base);
271 		goto out_reset;
272 	}
273 
274 	/* identify cpld */
275 	status1 = readb(cd->cpld_base + CPLD_STATUS1);
276 	cd->design_no = (readb(cd->cpld_base + CPLD_DESIGN_HI) << 8) |
277 				readb(cd->cpld_base + CPLD_DESIGN_LO);
278 	snprintf(cd->version, sizeof(cd->version), "%c%d",
279 		 'A' + ((status1 >> 5) & 0x7),
280 		 (status1 >> 2) & 0x7);
281 	dev_info(dev, "design number %d, revision %s\n",
282 		 cd->design_no,
283 		cd->version);
284 	cap = readb(cd->cpld_base + CPLD_CAP);
285 	if (!(cap & CPLD_CAP_COMPAT)) {
286 		dev_err(dev, "unsupported controller [cap=0x%02X]", cap);
287 		err = -ENODEV;
288 		goto out_reset;
289 	}
290 
291 	if (status1 & CPLD_STATUS1_AB) {
292 		dev_info(dev, "has anybus-S slot(s)");
293 		cd->common_reset = !(cap & CPLD_CAP_SEP_RESETS);
294 		dev_info(dev, "supports %s", cd->common_reset ?
295 			"a common reset" : "separate resets");
296 		for (id = 0; id < 2; id++) {
297 			host = create_anybus_host(pdev, id);
298 			if (!IS_ERR(host))
299 				continue;
300 			err = PTR_ERR(host);
301 			/* -ENODEV is fine, it just means no card detected */
302 			if (err != -ENODEV)
303 				goto out_reset;
304 		}
305 	}
306 
307 	id = ida_simple_get(&controller_index_ida, 0, 0, GFP_KERNEL);
308 	if (id < 0) {
309 		err = id;
310 		goto out_reset;
311 	}
312 	/* export can power readout as a regulator */
313 	config.dev = dev;
314 	config.driver_data = cd;
315 	regulator = devm_regulator_register(dev, &can_power_desc, &config);
316 	if (IS_ERR(regulator)) {
317 		err = PTR_ERR(regulator);
318 		goto out_reset;
319 	}
320 	/* make controller info visible to userspace */
321 	cd->class_dev = kzalloc(sizeof(*cd->class_dev), GFP_KERNEL);
322 	if (!cd->class_dev) {
323 		err = -ENOMEM;
324 		goto out_ida;
325 	}
326 	cd->class_dev->class = controller_class;
327 	cd->class_dev->groups = controller_attribute_groups;
328 	cd->class_dev->parent = dev;
329 	cd->class_dev->id = id;
330 	cd->class_dev->release = controller_device_release;
331 	dev_set_name(cd->class_dev, "%d", cd->class_dev->id);
332 	dev_set_drvdata(cd->class_dev, cd);
333 	err = device_register(cd->class_dev);
334 	if (err)
335 		goto out_dev;
336 	return 0;
337 out_dev:
338 	put_device(cd->class_dev);
339 out_ida:
340 	ida_simple_remove(&controller_index_ida, id);
341 out_reset:
342 	gpiod_set_value_cansleep(cd->reset_gpiod, 1);
343 	return err;
344 }
345 
346 static int controller_remove(struct platform_device *pdev)
347 {
348 	struct controller_priv *cd = platform_get_drvdata(pdev);
349 	int id = cd->class_dev->id;
350 
351 	device_unregister(cd->class_dev);
352 	ida_simple_remove(&controller_index_ida, id);
353 	gpiod_set_value_cansleep(cd->reset_gpiod, 1);
354 	return 0;
355 }
356 
357 static const struct of_device_id controller_of_match[] = {
358 	{ .compatible = "arcx,anybus-controller" },
359 	{ }
360 };
361 
362 MODULE_DEVICE_TABLE(of, controller_of_match);
363 
364 static struct platform_driver controller_driver = {
365 	.probe = controller_probe,
366 	.remove = controller_remove,
367 	.driver		= {
368 		.name   = "arcx-anybus-controller",
369 		.of_match_table	= of_match_ptr(controller_of_match),
370 	},
371 };
372 
373 static int __init controller_init(void)
374 {
375 	int err;
376 
377 	controller_class = class_create(THIS_MODULE, "arcx_anybus_controller");
378 	if (IS_ERR(controller_class))
379 		return PTR_ERR(controller_class);
380 	err = platform_driver_register(&controller_driver);
381 	if (err)
382 		class_destroy(controller_class);
383 
384 	return err;
385 }
386 
387 static void __exit controller_exit(void)
388 {
389 	platform_driver_unregister(&controller_driver);
390 	class_destroy(controller_class);
391 	ida_destroy(&controller_index_ida);
392 }
393 
394 module_init(controller_init);
395 module_exit(controller_exit);
396 
397 MODULE_DESCRIPTION("Arcx Anybus-S Controller driver");
398 MODULE_AUTHOR("Sven Van Asbroeck <TheSven73@gmail.com>");
399 MODULE_LICENSE("GPL v2");
400