1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * FB driver for the ST7789V LCD Controller
4  *
5  * Copyright (C) 2015 Dennis Menschel
6  */
7 
8 #include <linux/bitops.h>
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <video/mipi_display.h>
14 
15 #include "fbtft.h"
16 
17 #define DRVNAME "fb_st7789v"
18 
19 #define DEFAULT_GAMMA \
20 	"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
21 	"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"
22 
23 #define HSD20_IPS_GAMMA \
24 	"D0 05 0A 09 08 05 2E 44 45 0F 17 16 2B 33\n" \
25 	"D0 05 0A 09 08 05 2E 43 45 0F 16 16 2B 33"
26 
27 #define HSD20_IPS 1
28 
29 /**
30  * enum st7789v_command - ST7789V display controller commands
31  *
32  * @PORCTRL: porch setting
33  * @GCTRL: gate control
34  * @VCOMS: VCOM setting
35  * @VDVVRHEN: VDV and VRH command enable
36  * @VRHS: VRH set
37  * @VDVS: VDV set
38  * @VCMOFSET: VCOM offset set
39  * @PWCTRL1: power control 1
40  * @PVGAMCTRL: positive voltage gamma control
41  * @NVGAMCTRL: negative voltage gamma control
42  *
43  * The command names are the same as those found in the datasheet to ease
44  * looking up their semantics and usage.
45  *
46  * Note that the ST7789V display controller offers quite a few more commands
47  * which have been omitted from this list as they are not used at the moment.
48  * Furthermore, commands that are compliant with the MIPI DCS have been left
49  * out as well to avoid duplicate entries.
50  */
51 enum st7789v_command {
52 	PORCTRL = 0xB2,
53 	GCTRL = 0xB7,
54 	VCOMS = 0xBB,
55 	VDVVRHEN = 0xC2,
56 	VRHS = 0xC3,
57 	VDVS = 0xC4,
58 	VCMOFSET = 0xC5,
59 	PWCTRL1 = 0xD0,
60 	PVGAMCTRL = 0xE0,
61 	NVGAMCTRL = 0xE1,
62 };
63 
64 #define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */
65 #define MADCTL_MV BIT(5) /* bitmask for page/column order */
66 #define MADCTL_MX BIT(6) /* bitmask for column address order */
67 #define MADCTL_MY BIT(7) /* bitmask for page address order */
68 
69 /**
70  * init_display() - initialize the display controller
71  *
72  * @par: FBTFT parameter object
73  *
74  * Most of the commands in this init function set their parameters to the
75  * same default values which are already in place after the display has been
76  * powered up. (The main exception to this rule is the pixel format which
77  * would default to 18 instead of 16 bit per pixel.)
78  * Nonetheless, this sequence can be used as a template for concrete
79  * displays which usually need some adjustments.
80  *
81  * Return: 0 on success, < 0 if error occurred.
82  */
83 static int init_display(struct fbtft_par *par)
84 {
85 	/* turn off sleep mode */
86 	write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
87 	mdelay(120);
88 
89 	/* set pixel format to RGB-565 */
90 	write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
91 	if (HSD20_IPS)
92 		write_reg(par, PORCTRL, 0x05, 0x05, 0x00, 0x33, 0x33);
93 
94 	else
95 		write_reg(par, PORCTRL, 0x08, 0x08, 0x00, 0x22, 0x22);
96 
97 	/*
98 	 * VGH = 13.26V
99 	 * VGL = -10.43V
100 	 */
101 	if (HSD20_IPS)
102 		write_reg(par, GCTRL, 0x75);
103 	else
104 		write_reg(par, GCTRL, 0x35);
105 
106 	/*
107 	 * VDV and VRH register values come from command write
108 	 * (instead of NVM)
109 	 */
110 	write_reg(par, VDVVRHEN, 0x01, 0xFF);
111 
112 	/*
113 	 * VAP =  4.1V + (VCOM + VCOM offset + 0.5 * VDV)
114 	 * VAN = -4.1V + (VCOM + VCOM offset + 0.5 * VDV)
115 	 */
116 	if (HSD20_IPS)
117 		write_reg(par, VRHS, 0x13);
118 	else
119 		write_reg(par, VRHS, 0x0B);
120 
121 	/* VDV = 0V */
122 	write_reg(par, VDVS, 0x20);
123 
124 	/* VCOM = 0.9V */
125 	if (HSD20_IPS)
126 		write_reg(par, VCOMS, 0x22);
127 	else
128 		write_reg(par, VCOMS, 0x20);
129 
130 	/* VCOM offset = 0V */
131 	write_reg(par, VCMOFSET, 0x20);
132 
133 	/*
134 	 * AVDD = 6.8V
135 	 * AVCL = -4.8V
136 	 * VDS = 2.3V
137 	 */
138 	write_reg(par, PWCTRL1, 0xA4, 0xA1);
139 
140 	write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
141 
142 	if (HSD20_IPS)
143 		write_reg(par, MIPI_DCS_ENTER_INVERT_MODE);
144 
145 	return 0;
146 }
147 
148 /**
149  * set_var() - apply LCD properties like rotation and BGR mode
150  *
151  * @par: FBTFT parameter object
152  *
153  * Return: 0 on success, < 0 if error occurred.
154  */
155 static int set_var(struct fbtft_par *par)
156 {
157 	u8 madctl_par = 0;
158 
159 	if (par->bgr)
160 		madctl_par |= MADCTL_BGR;
161 	switch (par->info->var.rotate) {
162 	case 0:
163 		break;
164 	case 90:
165 		madctl_par |= (MADCTL_MV | MADCTL_MY);
166 		break;
167 	case 180:
168 		madctl_par |= (MADCTL_MX | MADCTL_MY);
169 		break;
170 	case 270:
171 		madctl_par |= (MADCTL_MV | MADCTL_MX);
172 		break;
173 	default:
174 		return -EINVAL;
175 	}
176 	write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par);
177 	return 0;
178 }
179 
180 /**
181  * set_gamma() - set gamma curves
182  *
183  * @par: FBTFT parameter object
184  * @curves: gamma curves
185  *
186  * Before the gamma curves are applied, they are preprocessed with a bitmask
187  * to ensure syntactically correct input for the display controller.
188  * This implies that the curves input parameter might be changed by this
189  * function and that illegal gamma values are auto-corrected and not
190  * reported as errors.
191  *
192  * Return: 0 on success, < 0 if error occurred.
193  */
194 static int set_gamma(struct fbtft_par *par, u32 *curves)
195 {
196 	int i;
197 	int j;
198 	int c; /* curve index offset */
199 
200 	/*
201 	 * Bitmasks for gamma curve command parameters.
202 	 * The masks are the same for both positive and negative voltage
203 	 * gamma curves.
204 	 */
205 	static const u8 gamma_par_mask[] = {
206 		0xFF, /* V63[3:0], V0[3:0]*/
207 		0x3F, /* V1[5:0] */
208 		0x3F, /* V2[5:0] */
209 		0x1F, /* V4[4:0] */
210 		0x1F, /* V6[4:0] */
211 		0x3F, /* J0[1:0], V13[3:0] */
212 		0x7F, /* V20[6:0] */
213 		0x77, /* V36[2:0], V27[2:0] */
214 		0x7F, /* V43[6:0] */
215 		0x3F, /* J1[1:0], V50[3:0] */
216 		0x1F, /* V57[4:0] */
217 		0x1F, /* V59[4:0] */
218 		0x3F, /* V61[5:0] */
219 		0x3F, /* V62[5:0] */
220 	};
221 
222 	for (i = 0; i < par->gamma.num_curves; i++) {
223 		c = i * par->gamma.num_values;
224 		for (j = 0; j < par->gamma.num_values; j++)
225 			curves[c + j] &= gamma_par_mask[j];
226 		write_reg(par, PVGAMCTRL + i,
227 			  curves[c + 0],  curves[c + 1],  curves[c + 2],
228 			  curves[c + 3],  curves[c + 4],  curves[c + 5],
229 			  curves[c + 6],  curves[c + 7],  curves[c + 8],
230 			  curves[c + 9],  curves[c + 10], curves[c + 11],
231 			  curves[c + 12], curves[c + 13]);
232 	}
233 	return 0;
234 }
235 
236 /**
237  * blank() - blank the display
238  *
239  * @par: FBTFT parameter object
240  * @on: whether to enable or disable blanking the display
241  *
242  * Return: 0 on success, < 0 if error occurred.
243  */
244 static int blank(struct fbtft_par *par, bool on)
245 {
246 	if (on)
247 		write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
248 	else
249 		write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
250 	return 0;
251 }
252 
253 static struct fbtft_display display = {
254 	.regwidth = 8,
255 	.width = 240,
256 	.height = 320,
257 	.gamma_num = 2,
258 	.gamma_len = 14,
259 	.gamma = HSD20_IPS_GAMMA,
260 	.fbtftops = {
261 		.init_display = init_display,
262 		.set_var = set_var,
263 		.set_gamma = set_gamma,
264 		.blank = blank,
265 	},
266 };
267 
268 FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789v", &display);
269 
270 MODULE_ALIAS("spi:" DRVNAME);
271 MODULE_ALIAS("platform:" DRVNAME);
272 MODULE_ALIAS("spi:st7789v");
273 MODULE_ALIAS("platform:st7789v");
274 
275 MODULE_DESCRIPTION("FB driver for the ST7789V LCD Controller");
276 MODULE_AUTHOR("Dennis Menschel");
277 MODULE_LICENSE("GPL");
278