1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * FB driver for the S6D02A1 LCD Controller 4 * 5 * Based on fb_st7735r.c by Noralf Tronnes 6 * Init code from UTFT library by Henning Karlsen 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/init.h> 22 #include <video/mipi_display.h> 23 24 #include "fbtft.h" 25 26 #define DRVNAME "fb_s6d02a1" 27 28 static const s16 default_init_sequence[] = { 29 30 -1, 0xf0, 0x5a, 0x5a, 31 32 -1, 0xfc, 0x5a, 0x5a, 33 34 -1, 0xfa, 0x02, 0x1f, 0x00, 0x10, 0x22, 0x30, 0x38, 0x3A, 0x3A, 0x3A, 0x3A, 0x3A, 0x3d, 0x02, 0x01, 35 36 -1, 0xfb, 0x21, 0x00, 0x02, 0x04, 0x07, 0x0a, 0x0b, 0x0c, 0x0c, 0x16, 0x1e, 0x30, 0x3f, 0x01, 0x02, 37 38 /* power setting sequence */ 39 -1, 0xfd, 0x00, 0x00, 0x00, 0x17, 0x10, 0x00, 0x01, 0x01, 0x00, 0x1f, 0x1f, 40 41 -1, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, 42 43 -1, 0xf5, 0x00, 0x70, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d, 0x66, 0x06, 44 45 -1, 0xf6, 0x02, 0x00, 0x3f, 0x00, 0x00, 0x00, 0x02, 0x00, 0x06, 0x01, 0x00, 46 47 -1, 0xf2, 0x00, 0x01, 0x03, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x04, 0x08, 0x08, 48 49 -1, 0xf8, 0x11, 50 51 -1, 0xf7, 0xc8, 0x20, 0x00, 0x00, 52 53 -1, 0xf3, 0x00, 0x00, 54 55 -1, MIPI_DCS_EXIT_SLEEP_MODE, 56 -2, 50, 57 58 -1, 0xf3, 0x00, 0x01, 59 -2, 50, 60 -1, 0xf3, 0x00, 0x03, 61 -2, 50, 62 -1, 0xf3, 0x00, 0x07, 63 -2, 50, 64 -1, 0xf3, 0x00, 0x0f, 65 -2, 50, 66 67 -1, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, 68 -2, 50, 69 70 -1, 0xf3, 0x00, 0x1f, 71 -2, 50, 72 -1, 0xf3, 0x00, 0x7f, 73 -2, 50, 74 75 -1, 0xf3, 0x00, 0xff, 76 -2, 50, 77 78 -1, 0xfd, 0x00, 0x00, 0x00, 0x17, 0x10, 0x00, 0x00, 0x01, 0x00, 0x16, 0x16, 79 80 -1, 0xf4, 0x00, 0x09, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00, 81 82 /* initializing sequence */ 83 84 -1, MIPI_DCS_SET_ADDRESS_MODE, 0x08, 85 86 -1, MIPI_DCS_SET_TEAR_ON, 0x00, 87 88 -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x05, 89 90 /* gamma setting - possible values 0x01, 0x02, 0x04, 0x08 */ 91 -1, MIPI_DCS_SET_GAMMA_CURVE, 0x01, 92 93 -2, 150, 94 -1, MIPI_DCS_SET_DISPLAY_ON, 95 -1, MIPI_DCS_WRITE_MEMORY_START, 96 /* end marker */ 97 -3 98 99 }; 100 101 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) 102 { 103 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 104 xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF); 105 106 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 107 ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF); 108 109 write_reg(par, MIPI_DCS_WRITE_MEMORY_START); 110 } 111 112 #define MY BIT(7) 113 #define MX BIT(6) 114 #define MV BIT(5) 115 static int set_var(struct fbtft_par *par) 116 { 117 /* 118 * Memory data access control (0x36h) 119 * RGB/BGR: 120 * 1. Mode selection pin SRGB 121 * RGB H/W pin for color filter setting: 0=RGB, 1=BGR 122 * 2. MADCTL RGB bit 123 * RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR 124 */ 125 switch (par->info->var.rotate) { 126 case 0: 127 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 128 MX | MY | (par->bgr << 3)); 129 break; 130 case 270: 131 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 132 MY | MV | (par->bgr << 3)); 133 break; 134 case 180: 135 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 136 par->bgr << 3); 137 break; 138 case 90: 139 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 140 MX | MV | (par->bgr << 3)); 141 break; 142 } 143 144 return 0; 145 } 146 147 static struct fbtft_display display = { 148 .regwidth = 8, 149 .width = 128, 150 .height = 160, 151 .init_sequence = default_init_sequence, 152 .fbtftops = { 153 .set_addr_win = set_addr_win, 154 .set_var = set_var, 155 }, 156 }; 157 158 FBTFT_REGISTER_DRIVER(DRVNAME, "samsung,s6d02a1", &display); 159 160 MODULE_ALIAS("spi:" DRVNAME); 161 MODULE_ALIAS("platform:" DRVNAME); 162 MODULE_ALIAS("spi:s6d02a1"); 163 MODULE_ALIAS("platform:s6d02a1"); 164 165 MODULE_DESCRIPTION("FB driver for the S6D02A1 LCD Controller"); 166 MODULE_AUTHOR("WOLFGANG BUENING"); 167 MODULE_LICENSE("GPL"); 168