1 /* 2 * Sonics Silicon Backplane 3 * Subsystem core 4 * 5 * Copyright 2005, Broadcom Corporation 6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> 7 * 8 * Licensed under the GNU/GPL. See COPYING for details. 9 */ 10 11 #include "ssb_private.h" 12 13 #include <linux/delay.h> 14 #include <linux/io.h> 15 #include <linux/ssb/ssb.h> 16 #include <linux/ssb/ssb_regs.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/pci.h> 19 20 #include <pcmcia/cs_types.h> 21 #include <pcmcia/cs.h> 22 #include <pcmcia/cistpl.h> 23 #include <pcmcia/ds.h> 24 25 26 MODULE_DESCRIPTION("Sonics Silicon Backplane driver"); 27 MODULE_LICENSE("GPL"); 28 29 30 /* Temporary list of yet-to-be-attached buses */ 31 static LIST_HEAD(attach_queue); 32 /* List if running buses */ 33 static LIST_HEAD(buses); 34 /* Software ID counter */ 35 static unsigned int next_busnumber; 36 /* buses_mutes locks the two buslists and the next_busnumber. 37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */ 38 static DEFINE_MUTEX(buses_mutex); 39 40 /* There are differences in the codeflow, if the bus is 41 * initialized from early boot, as various needed services 42 * are not available early. This is a mechanism to delay 43 * these initializations to after early boot has finished. 44 * It's also used to avoid mutex locking, as that's not 45 * available and needed early. */ 46 static bool ssb_is_early_boot = 1; 47 48 static void ssb_buses_lock(void); 49 static void ssb_buses_unlock(void); 50 51 52 #ifdef CONFIG_SSB_PCIHOST 53 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev) 54 { 55 struct ssb_bus *bus; 56 57 ssb_buses_lock(); 58 list_for_each_entry(bus, &buses, list) { 59 if (bus->bustype == SSB_BUSTYPE_PCI && 60 bus->host_pci == pdev) 61 goto found; 62 } 63 bus = NULL; 64 found: 65 ssb_buses_unlock(); 66 67 return bus; 68 } 69 #endif /* CONFIG_SSB_PCIHOST */ 70 71 static struct ssb_device *ssb_device_get(struct ssb_device *dev) 72 { 73 if (dev) 74 get_device(dev->dev); 75 return dev; 76 } 77 78 static void ssb_device_put(struct ssb_device *dev) 79 { 80 if (dev) 81 put_device(dev->dev); 82 } 83 84 static int ssb_bus_resume(struct ssb_bus *bus) 85 { 86 int err; 87 88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 89 err = ssb_pcmcia_init(bus); 90 if (err) { 91 /* No need to disable XTAL, as we don't have one on PCMCIA. */ 92 return err; 93 } 94 ssb_chipco_resume(&bus->chipco); 95 96 return 0; 97 } 98 99 static int ssb_device_resume(struct device *dev) 100 { 101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 102 struct ssb_driver *ssb_drv; 103 struct ssb_bus *bus; 104 int err = 0; 105 106 bus = ssb_dev->bus; 107 if (bus->suspend_cnt == bus->nr_devices) { 108 err = ssb_bus_resume(bus); 109 if (err) 110 return err; 111 } 112 bus->suspend_cnt--; 113 if (dev->driver) { 114 ssb_drv = drv_to_ssb_drv(dev->driver); 115 if (ssb_drv && ssb_drv->resume) 116 err = ssb_drv->resume(ssb_dev); 117 if (err) 118 goto out; 119 } 120 out: 121 return err; 122 } 123 124 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state) 125 { 126 ssb_chipco_suspend(&bus->chipco, state); 127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 128 129 /* Reset HW state information in memory, so that HW is 130 * completely reinitialized on resume. */ 131 bus->mapped_device = NULL; 132 #ifdef CONFIG_SSB_DRIVER_PCICORE 133 bus->pcicore.setup_done = 0; 134 #endif 135 #ifdef CONFIG_SSB_DEBUG 136 bus->powered_up = 0; 137 #endif 138 } 139 140 static int ssb_device_suspend(struct device *dev, pm_message_t state) 141 { 142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 143 struct ssb_driver *ssb_drv; 144 struct ssb_bus *bus; 145 int err = 0; 146 147 if (dev->driver) { 148 ssb_drv = drv_to_ssb_drv(dev->driver); 149 if (ssb_drv && ssb_drv->suspend) 150 err = ssb_drv->suspend(ssb_dev, state); 151 if (err) 152 goto out; 153 } 154 155 bus = ssb_dev->bus; 156 bus->suspend_cnt++; 157 if (bus->suspend_cnt == bus->nr_devices) { 158 /* All devices suspended. Shutdown the bus. */ 159 ssb_bus_suspend(bus, state); 160 } 161 162 out: 163 return err; 164 } 165 166 #ifdef CONFIG_SSB_PCIHOST 167 int ssb_devices_freeze(struct ssb_bus *bus) 168 { 169 struct ssb_device *dev; 170 struct ssb_driver *drv; 171 int err = 0; 172 int i; 173 pm_message_t state = PMSG_FREEZE; 174 175 /* First check that we are capable to freeze all devices. */ 176 for (i = 0; i < bus->nr_devices; i++) { 177 dev = &(bus->devices[i]); 178 if (!dev->dev || 179 !dev->dev->driver || 180 !device_is_registered(dev->dev)) 181 continue; 182 drv = drv_to_ssb_drv(dev->dev->driver); 183 if (!drv) 184 continue; 185 if (!drv->suspend) { 186 /* Nope, can't suspend this one. */ 187 return -EOPNOTSUPP; 188 } 189 } 190 /* Now suspend all devices */ 191 for (i = 0; i < bus->nr_devices; i++) { 192 dev = &(bus->devices[i]); 193 if (!dev->dev || 194 !dev->dev->driver || 195 !device_is_registered(dev->dev)) 196 continue; 197 drv = drv_to_ssb_drv(dev->dev->driver); 198 if (!drv) 199 continue; 200 err = drv->suspend(dev, state); 201 if (err) { 202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n", 203 dev->dev->bus_id); 204 goto err_unwind; 205 } 206 } 207 208 return 0; 209 err_unwind: 210 for (i--; i >= 0; i--) { 211 dev = &(bus->devices[i]); 212 if (!dev->dev || 213 !dev->dev->driver || 214 !device_is_registered(dev->dev)) 215 continue; 216 drv = drv_to_ssb_drv(dev->dev->driver); 217 if (!drv) 218 continue; 219 if (drv->resume) 220 drv->resume(dev); 221 } 222 return err; 223 } 224 225 int ssb_devices_thaw(struct ssb_bus *bus) 226 { 227 struct ssb_device *dev; 228 struct ssb_driver *drv; 229 int err; 230 int i; 231 232 for (i = 0; i < bus->nr_devices; i++) { 233 dev = &(bus->devices[i]); 234 if (!dev->dev || 235 !dev->dev->driver || 236 !device_is_registered(dev->dev)) 237 continue; 238 drv = drv_to_ssb_drv(dev->dev->driver); 239 if (!drv) 240 continue; 241 if (SSB_WARN_ON(!drv->resume)) 242 continue; 243 err = drv->resume(dev); 244 if (err) { 245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n", 246 dev->dev->bus_id); 247 } 248 } 249 250 return 0; 251 } 252 #endif /* CONFIG_SSB_PCIHOST */ 253 254 static void ssb_device_shutdown(struct device *dev) 255 { 256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 257 struct ssb_driver *ssb_drv; 258 259 if (!dev->driver) 260 return; 261 ssb_drv = drv_to_ssb_drv(dev->driver); 262 if (ssb_drv && ssb_drv->shutdown) 263 ssb_drv->shutdown(ssb_dev); 264 } 265 266 static int ssb_device_remove(struct device *dev) 267 { 268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 270 271 if (ssb_drv && ssb_drv->remove) 272 ssb_drv->remove(ssb_dev); 273 ssb_device_put(ssb_dev); 274 275 return 0; 276 } 277 278 static int ssb_device_probe(struct device *dev) 279 { 280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver); 282 int err = 0; 283 284 ssb_device_get(ssb_dev); 285 if (ssb_drv && ssb_drv->probe) 286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id); 287 if (err) 288 ssb_device_put(ssb_dev); 289 290 return err; 291 } 292 293 static int ssb_match_devid(const struct ssb_device_id *tabid, 294 const struct ssb_device_id *devid) 295 { 296 if ((tabid->vendor != devid->vendor) && 297 tabid->vendor != SSB_ANY_VENDOR) 298 return 0; 299 if ((tabid->coreid != devid->coreid) && 300 tabid->coreid != SSB_ANY_ID) 301 return 0; 302 if ((tabid->revision != devid->revision) && 303 tabid->revision != SSB_ANY_REV) 304 return 0; 305 return 1; 306 } 307 308 static int ssb_bus_match(struct device *dev, struct device_driver *drv) 309 { 310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv); 312 const struct ssb_device_id *id; 313 314 for (id = ssb_drv->id_table; 315 id->vendor || id->coreid || id->revision; 316 id++) { 317 if (ssb_match_devid(id, &ssb_dev->id)) 318 return 1; /* found */ 319 } 320 321 return 0; 322 } 323 324 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env) 325 { 326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 327 328 if (!dev) 329 return -ENODEV; 330 331 return add_uevent_var(env, 332 "MODALIAS=ssb:v%04Xid%04Xrev%02X", 333 ssb_dev->id.vendor, ssb_dev->id.coreid, 334 ssb_dev->id.revision); 335 } 336 337 static struct bus_type ssb_bustype = { 338 .name = "ssb", 339 .match = ssb_bus_match, 340 .probe = ssb_device_probe, 341 .remove = ssb_device_remove, 342 .shutdown = ssb_device_shutdown, 343 .suspend = ssb_device_suspend, 344 .resume = ssb_device_resume, 345 .uevent = ssb_device_uevent, 346 }; 347 348 static void ssb_buses_lock(void) 349 { 350 /* See the comment at the ssb_is_early_boot definition */ 351 if (!ssb_is_early_boot) 352 mutex_lock(&buses_mutex); 353 } 354 355 static void ssb_buses_unlock(void) 356 { 357 /* See the comment at the ssb_is_early_boot definition */ 358 if (!ssb_is_early_boot) 359 mutex_unlock(&buses_mutex); 360 } 361 362 static void ssb_devices_unregister(struct ssb_bus *bus) 363 { 364 struct ssb_device *sdev; 365 int i; 366 367 for (i = bus->nr_devices - 1; i >= 0; i--) { 368 sdev = &(bus->devices[i]); 369 if (sdev->dev) 370 device_unregister(sdev->dev); 371 } 372 } 373 374 void ssb_bus_unregister(struct ssb_bus *bus) 375 { 376 ssb_buses_lock(); 377 ssb_devices_unregister(bus); 378 list_del(&bus->list); 379 ssb_buses_unlock(); 380 381 /* ssb_pcmcia_exit(bus); */ 382 ssb_pci_exit(bus); 383 ssb_iounmap(bus); 384 } 385 EXPORT_SYMBOL(ssb_bus_unregister); 386 387 static void ssb_release_dev(struct device *dev) 388 { 389 struct __ssb_dev_wrapper *devwrap; 390 391 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev); 392 kfree(devwrap); 393 } 394 395 static int ssb_devices_register(struct ssb_bus *bus) 396 { 397 struct ssb_device *sdev; 398 struct device *dev; 399 struct __ssb_dev_wrapper *devwrap; 400 int i, err = 0; 401 int dev_idx = 0; 402 403 for (i = 0; i < bus->nr_devices; i++) { 404 sdev = &(bus->devices[i]); 405 406 /* We don't register SSB-system devices to the kernel, 407 * as the drivers for them are built into SSB. */ 408 switch (sdev->id.coreid) { 409 case SSB_DEV_CHIPCOMMON: 410 case SSB_DEV_PCI: 411 case SSB_DEV_PCIE: 412 case SSB_DEV_PCMCIA: 413 case SSB_DEV_MIPS: 414 case SSB_DEV_MIPS_3302: 415 case SSB_DEV_EXTIF: 416 continue; 417 } 418 419 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL); 420 if (!devwrap) { 421 ssb_printk(KERN_ERR PFX 422 "Could not allocate device\n"); 423 err = -ENOMEM; 424 goto error; 425 } 426 dev = &devwrap->dev; 427 devwrap->sdev = sdev; 428 429 dev->release = ssb_release_dev; 430 dev->bus = &ssb_bustype; 431 snprintf(dev->bus_id, sizeof(dev->bus_id), 432 "ssb%u:%d", bus->busnumber, dev_idx); 433 434 switch (bus->bustype) { 435 case SSB_BUSTYPE_PCI: 436 #ifdef CONFIG_SSB_PCIHOST 437 sdev->irq = bus->host_pci->irq; 438 dev->parent = &bus->host_pci->dev; 439 #endif 440 break; 441 case SSB_BUSTYPE_PCMCIA: 442 #ifdef CONFIG_SSB_PCMCIAHOST 443 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ; 444 dev->parent = &bus->host_pcmcia->dev; 445 #endif 446 break; 447 case SSB_BUSTYPE_SSB: 448 break; 449 } 450 451 sdev->dev = dev; 452 err = device_register(dev); 453 if (err) { 454 ssb_printk(KERN_ERR PFX 455 "Could not register %s\n", 456 dev->bus_id); 457 /* Set dev to NULL to not unregister 458 * dev on error unwinding. */ 459 sdev->dev = NULL; 460 kfree(devwrap); 461 goto error; 462 } 463 dev_idx++; 464 } 465 466 return 0; 467 error: 468 /* Unwind the already registered devices. */ 469 ssb_devices_unregister(bus); 470 return err; 471 } 472 473 /* Needs ssb_buses_lock() */ 474 static int ssb_attach_queued_buses(void) 475 { 476 struct ssb_bus *bus, *n; 477 int err = 0; 478 int drop_them_all = 0; 479 480 list_for_each_entry_safe(bus, n, &attach_queue, list) { 481 if (drop_them_all) { 482 list_del(&bus->list); 483 continue; 484 } 485 /* Can't init the PCIcore in ssb_bus_register(), as that 486 * is too early in boot for embedded systems 487 * (no udelay() available). So do it here in attach stage. 488 */ 489 err = ssb_bus_powerup(bus, 0); 490 if (err) 491 goto error; 492 ssb_pcicore_init(&bus->pcicore); 493 ssb_bus_may_powerdown(bus); 494 495 err = ssb_devices_register(bus); 496 error: 497 if (err) { 498 drop_them_all = 1; 499 list_del(&bus->list); 500 continue; 501 } 502 list_move_tail(&bus->list, &buses); 503 } 504 505 return err; 506 } 507 508 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset) 509 { 510 struct ssb_bus *bus = dev->bus; 511 512 offset += dev->core_index * SSB_CORE_SIZE; 513 return readw(bus->mmio + offset); 514 } 515 516 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset) 517 { 518 struct ssb_bus *bus = dev->bus; 519 520 offset += dev->core_index * SSB_CORE_SIZE; 521 return readl(bus->mmio + offset); 522 } 523 524 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 525 { 526 struct ssb_bus *bus = dev->bus; 527 528 offset += dev->core_index * SSB_CORE_SIZE; 529 writew(value, bus->mmio + offset); 530 } 531 532 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 533 { 534 struct ssb_bus *bus = dev->bus; 535 536 offset += dev->core_index * SSB_CORE_SIZE; 537 writel(value, bus->mmio + offset); 538 } 539 540 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */ 541 static const struct ssb_bus_ops ssb_ssb_ops = { 542 .read16 = ssb_ssb_read16, 543 .read32 = ssb_ssb_read32, 544 .write16 = ssb_ssb_write16, 545 .write32 = ssb_ssb_write32, 546 }; 547 548 static int ssb_fetch_invariants(struct ssb_bus *bus, 549 ssb_invariants_func_t get_invariants) 550 { 551 struct ssb_init_invariants iv; 552 int err; 553 554 memset(&iv, 0, sizeof(iv)); 555 err = get_invariants(bus, &iv); 556 if (err) 557 goto out; 558 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo)); 559 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom)); 560 bus->has_cardbus_slot = iv.has_cardbus_slot; 561 out: 562 return err; 563 } 564 565 static int ssb_bus_register(struct ssb_bus *bus, 566 ssb_invariants_func_t get_invariants, 567 unsigned long baseaddr) 568 { 569 int err; 570 571 spin_lock_init(&bus->bar_lock); 572 INIT_LIST_HEAD(&bus->list); 573 #ifdef CONFIG_SSB_EMBEDDED 574 spin_lock_init(&bus->gpio_lock); 575 #endif 576 577 /* Powerup the bus */ 578 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 579 if (err) 580 goto out; 581 ssb_buses_lock(); 582 bus->busnumber = next_busnumber; 583 /* Scan for devices (cores) */ 584 err = ssb_bus_scan(bus, baseaddr); 585 if (err) 586 goto err_disable_xtal; 587 588 /* Init PCI-host device (if any) */ 589 err = ssb_pci_init(bus); 590 if (err) 591 goto err_unmap; 592 /* Init PCMCIA-host device (if any) */ 593 err = ssb_pcmcia_init(bus); 594 if (err) 595 goto err_pci_exit; 596 597 /* Initialize basic system devices (if available) */ 598 err = ssb_bus_powerup(bus, 0); 599 if (err) 600 goto err_pcmcia_exit; 601 ssb_chipcommon_init(&bus->chipco); 602 ssb_mipscore_init(&bus->mipscore); 603 err = ssb_fetch_invariants(bus, get_invariants); 604 if (err) { 605 ssb_bus_may_powerdown(bus); 606 goto err_pcmcia_exit; 607 } 608 ssb_bus_may_powerdown(bus); 609 610 /* Queue it for attach. 611 * See the comment at the ssb_is_early_boot definition. */ 612 list_add_tail(&bus->list, &attach_queue); 613 if (!ssb_is_early_boot) { 614 /* This is not early boot, so we must attach the bus now */ 615 err = ssb_attach_queued_buses(); 616 if (err) 617 goto err_dequeue; 618 } 619 next_busnumber++; 620 ssb_buses_unlock(); 621 622 out: 623 return err; 624 625 err_dequeue: 626 list_del(&bus->list); 627 err_pcmcia_exit: 628 /* ssb_pcmcia_exit(bus); */ 629 err_pci_exit: 630 ssb_pci_exit(bus); 631 err_unmap: 632 ssb_iounmap(bus); 633 err_disable_xtal: 634 ssb_buses_unlock(); 635 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 636 return err; 637 } 638 639 #ifdef CONFIG_SSB_PCIHOST 640 int ssb_bus_pcibus_register(struct ssb_bus *bus, 641 struct pci_dev *host_pci) 642 { 643 int err; 644 645 bus->bustype = SSB_BUSTYPE_PCI; 646 bus->host_pci = host_pci; 647 bus->ops = &ssb_pci_ops; 648 649 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0); 650 if (!err) { 651 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 652 "PCI device %s\n", host_pci->dev.bus_id); 653 } 654 655 return err; 656 } 657 EXPORT_SYMBOL(ssb_bus_pcibus_register); 658 #endif /* CONFIG_SSB_PCIHOST */ 659 660 #ifdef CONFIG_SSB_PCMCIAHOST 661 int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 662 struct pcmcia_device *pcmcia_dev, 663 unsigned long baseaddr) 664 { 665 int err; 666 667 bus->bustype = SSB_BUSTYPE_PCMCIA; 668 bus->host_pcmcia = pcmcia_dev; 669 bus->ops = &ssb_pcmcia_ops; 670 671 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr); 672 if (!err) { 673 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on " 674 "PCMCIA device %s\n", pcmcia_dev->devname); 675 } 676 677 return err; 678 } 679 EXPORT_SYMBOL(ssb_bus_pcmciabus_register); 680 #endif /* CONFIG_SSB_PCMCIAHOST */ 681 682 int ssb_bus_ssbbus_register(struct ssb_bus *bus, 683 unsigned long baseaddr, 684 ssb_invariants_func_t get_invariants) 685 { 686 int err; 687 688 bus->bustype = SSB_BUSTYPE_SSB; 689 bus->ops = &ssb_ssb_ops; 690 691 err = ssb_bus_register(bus, get_invariants, baseaddr); 692 if (!err) { 693 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at " 694 "address 0x%08lX\n", baseaddr); 695 } 696 697 return err; 698 } 699 700 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner) 701 { 702 drv->drv.name = drv->name; 703 drv->drv.bus = &ssb_bustype; 704 drv->drv.owner = owner; 705 706 return driver_register(&drv->drv); 707 } 708 EXPORT_SYMBOL(__ssb_driver_register); 709 710 void ssb_driver_unregister(struct ssb_driver *drv) 711 { 712 driver_unregister(&drv->drv); 713 } 714 EXPORT_SYMBOL(ssb_driver_unregister); 715 716 void ssb_set_devtypedata(struct ssb_device *dev, void *data) 717 { 718 struct ssb_bus *bus = dev->bus; 719 struct ssb_device *ent; 720 int i; 721 722 for (i = 0; i < bus->nr_devices; i++) { 723 ent = &(bus->devices[i]); 724 if (ent->id.vendor != dev->id.vendor) 725 continue; 726 if (ent->id.coreid != dev->id.coreid) 727 continue; 728 729 ent->devtypedata = data; 730 } 731 } 732 EXPORT_SYMBOL(ssb_set_devtypedata); 733 734 static u32 clkfactor_f6_resolve(u32 v) 735 { 736 /* map the magic values */ 737 switch (v) { 738 case SSB_CHIPCO_CLK_F6_2: 739 return 2; 740 case SSB_CHIPCO_CLK_F6_3: 741 return 3; 742 case SSB_CHIPCO_CLK_F6_4: 743 return 4; 744 case SSB_CHIPCO_CLK_F6_5: 745 return 5; 746 case SSB_CHIPCO_CLK_F6_6: 747 return 6; 748 case SSB_CHIPCO_CLK_F6_7: 749 return 7; 750 } 751 return 0; 752 } 753 754 /* Calculate the speed the backplane would run at a given set of clockcontrol values */ 755 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) 756 { 757 u32 n1, n2, clock, m1, m2, m3, mc; 758 759 n1 = (n & SSB_CHIPCO_CLK_N1); 760 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT); 761 762 switch (plltype) { 763 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ 764 if (m & SSB_CHIPCO_CLK_T6_MMASK) 765 return SSB_CHIPCO_CLK_T6_M0; 766 return SSB_CHIPCO_CLK_T6_M1; 767 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 768 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 769 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 770 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 771 n1 = clkfactor_f6_resolve(n1); 772 n2 += SSB_CHIPCO_CLK_F5_BIAS; 773 break; 774 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */ 775 n1 += SSB_CHIPCO_CLK_T2_BIAS; 776 n2 += SSB_CHIPCO_CLK_T2_BIAS; 777 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7))); 778 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23))); 779 break; 780 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */ 781 return 100000000; 782 default: 783 SSB_WARN_ON(1); 784 } 785 786 switch (plltype) { 787 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 788 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 789 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; 790 break; 791 default: 792 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; 793 } 794 if (!clock) 795 return 0; 796 797 m1 = (m & SSB_CHIPCO_CLK_M1); 798 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); 799 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); 800 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT); 801 802 switch (plltype) { 803 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ 804 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ 805 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ 806 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */ 807 m1 = clkfactor_f6_resolve(m1); 808 if ((plltype == SSB_PLLTYPE_1) || 809 (plltype == SSB_PLLTYPE_3)) 810 m2 += SSB_CHIPCO_CLK_F5_BIAS; 811 else 812 m2 = clkfactor_f6_resolve(m2); 813 m3 = clkfactor_f6_resolve(m3); 814 815 switch (mc) { 816 case SSB_CHIPCO_CLK_MC_BYPASS: 817 return clock; 818 case SSB_CHIPCO_CLK_MC_M1: 819 return (clock / m1); 820 case SSB_CHIPCO_CLK_MC_M1M2: 821 return (clock / (m1 * m2)); 822 case SSB_CHIPCO_CLK_MC_M1M2M3: 823 return (clock / (m1 * m2 * m3)); 824 case SSB_CHIPCO_CLK_MC_M1M3: 825 return (clock / (m1 * m3)); 826 } 827 return 0; 828 case SSB_PLLTYPE_2: 829 m1 += SSB_CHIPCO_CLK_T2_BIAS; 830 m2 += SSB_CHIPCO_CLK_T2M2_BIAS; 831 m3 += SSB_CHIPCO_CLK_T2_BIAS; 832 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7))); 833 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10))); 834 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7))); 835 836 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP)) 837 clock /= m1; 838 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP)) 839 clock /= m2; 840 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP)) 841 clock /= m3; 842 return clock; 843 default: 844 SSB_WARN_ON(1); 845 } 846 return 0; 847 } 848 849 /* Get the current speed the backplane is running at */ 850 u32 ssb_clockspeed(struct ssb_bus *bus) 851 { 852 u32 rate; 853 u32 plltype; 854 u32 clkctl_n, clkctl_m; 855 856 if (ssb_extif_available(&bus->extif)) 857 ssb_extif_get_clockcontrol(&bus->extif, &plltype, 858 &clkctl_n, &clkctl_m); 859 else if (bus->chipco.dev) 860 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, 861 &clkctl_n, &clkctl_m); 862 else 863 return 0; 864 865 if (bus->chip_id == 0x5365) { 866 rate = 100000000; 867 } else { 868 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); 869 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ 870 rate /= 2; 871 } 872 873 return rate; 874 } 875 EXPORT_SYMBOL(ssb_clockspeed); 876 877 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev) 878 { 879 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; 880 881 /* The REJECT bit changed position in TMSLOW between 882 * Backplane revisions. */ 883 switch (rev) { 884 case SSB_IDLOW_SSBREV_22: 885 return SSB_TMSLOW_REJECT_22; 886 case SSB_IDLOW_SSBREV_23: 887 return SSB_TMSLOW_REJECT_23; 888 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */ 889 case SSB_IDLOW_SSBREV_25: /* same here */ 890 case SSB_IDLOW_SSBREV_26: /* same here */ 891 case SSB_IDLOW_SSBREV_27: /* same here */ 892 return SSB_TMSLOW_REJECT_23; /* this is a guess */ 893 default: 894 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); 895 WARN_ON(1); 896 } 897 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23); 898 } 899 900 int ssb_device_is_enabled(struct ssb_device *dev) 901 { 902 u32 val; 903 u32 reject; 904 905 reject = ssb_tmslow_reject_bitmask(dev); 906 val = ssb_read32(dev, SSB_TMSLOW); 907 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; 908 909 return (val == SSB_TMSLOW_CLOCK); 910 } 911 EXPORT_SYMBOL(ssb_device_is_enabled); 912 913 static void ssb_flush_tmslow(struct ssb_device *dev) 914 { 915 /* Make _really_ sure the device has finished the TMSLOW 916 * register write transaction, as we risk running into 917 * a machine check exception otherwise. 918 * Do this by reading the register back to commit the 919 * PCI write and delay an additional usec for the device 920 * to react to the change. */ 921 ssb_read32(dev, SSB_TMSLOW); 922 udelay(1); 923 } 924 925 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags) 926 { 927 u32 val; 928 929 ssb_device_disable(dev, core_specific_flags); 930 ssb_write32(dev, SSB_TMSLOW, 931 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | 932 SSB_TMSLOW_FGC | core_specific_flags); 933 ssb_flush_tmslow(dev); 934 935 /* Clear SERR if set. This is a hw bug workaround. */ 936 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR) 937 ssb_write32(dev, SSB_TMSHIGH, 0); 938 939 val = ssb_read32(dev, SSB_IMSTATE); 940 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) { 941 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO); 942 ssb_write32(dev, SSB_IMSTATE, val); 943 } 944 945 ssb_write32(dev, SSB_TMSLOW, 946 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | 947 core_specific_flags); 948 ssb_flush_tmslow(dev); 949 950 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | 951 core_specific_flags); 952 ssb_flush_tmslow(dev); 953 } 954 EXPORT_SYMBOL(ssb_device_enable); 955 956 /* Wait for a bit in a register to get set or unset. 957 * timeout is in units of ten-microseconds */ 958 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, 959 int timeout, int set) 960 { 961 int i; 962 u32 val; 963 964 for (i = 0; i < timeout; i++) { 965 val = ssb_read32(dev, reg); 966 if (set) { 967 if (val & bitmask) 968 return 0; 969 } else { 970 if (!(val & bitmask)) 971 return 0; 972 } 973 udelay(10); 974 } 975 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on " 976 "register %04X to %s.\n", 977 bitmask, reg, (set ? "set" : "clear")); 978 979 return -ETIMEDOUT; 980 } 981 982 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) 983 { 984 u32 reject; 985 986 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) 987 return; 988 989 reject = ssb_tmslow_reject_bitmask(dev); 990 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 991 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); 992 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 993 ssb_write32(dev, SSB_TMSLOW, 994 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 995 reject | SSB_TMSLOW_RESET | 996 core_specific_flags); 997 ssb_flush_tmslow(dev); 998 999 ssb_write32(dev, SSB_TMSLOW, 1000 reject | SSB_TMSLOW_RESET | 1001 core_specific_flags); 1002 ssb_flush_tmslow(dev); 1003 } 1004 EXPORT_SYMBOL(ssb_device_disable); 1005 1006 u32 ssb_dma_translation(struct ssb_device *dev) 1007 { 1008 switch (dev->bus->bustype) { 1009 case SSB_BUSTYPE_SSB: 1010 return 0; 1011 case SSB_BUSTYPE_PCI: 1012 case SSB_BUSTYPE_PCMCIA: 1013 return SSB_PCI_DMA; 1014 } 1015 return 0; 1016 } 1017 EXPORT_SYMBOL(ssb_dma_translation); 1018 1019 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask) 1020 { 1021 struct device *dev = ssb_dev->dev; 1022 1023 #ifdef CONFIG_SSB_PCIHOST 1024 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI && 1025 !dma_supported(dev, mask)) 1026 return -EIO; 1027 #endif 1028 dev->coherent_dma_mask = mask; 1029 dev->dma_mask = &dev->coherent_dma_mask; 1030 1031 return 0; 1032 } 1033 EXPORT_SYMBOL(ssb_dma_set_mask); 1034 1035 int ssb_bus_may_powerdown(struct ssb_bus *bus) 1036 { 1037 struct ssb_chipcommon *cc; 1038 int err = 0; 1039 1040 /* On buses where more than one core may be working 1041 * at a time, we must not powerdown stuff if there are 1042 * still cores that may want to run. */ 1043 if (bus->bustype == SSB_BUSTYPE_SSB) 1044 goto out; 1045 1046 cc = &bus->chipco; 1047 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW); 1048 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0); 1049 if (err) 1050 goto error; 1051 out: 1052 #ifdef CONFIG_SSB_DEBUG 1053 bus->powered_up = 0; 1054 #endif 1055 return err; 1056 error: 1057 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n"); 1058 goto out; 1059 } 1060 EXPORT_SYMBOL(ssb_bus_may_powerdown); 1061 1062 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) 1063 { 1064 struct ssb_chipcommon *cc; 1065 int err; 1066 enum ssb_clkmode mode; 1067 1068 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1); 1069 if (err) 1070 goto error; 1071 cc = &bus->chipco; 1072 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST; 1073 ssb_chipco_set_clockmode(cc, mode); 1074 1075 #ifdef CONFIG_SSB_DEBUG 1076 bus->powered_up = 1; 1077 #endif 1078 return 0; 1079 error: 1080 ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); 1081 return err; 1082 } 1083 EXPORT_SYMBOL(ssb_bus_powerup); 1084 1085 u32 ssb_admatch_base(u32 adm) 1086 { 1087 u32 base = 0; 1088 1089 switch (adm & SSB_ADM_TYPE) { 1090 case SSB_ADM_TYPE0: 1091 base = (adm & SSB_ADM_BASE0); 1092 break; 1093 case SSB_ADM_TYPE1: 1094 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1095 base = (adm & SSB_ADM_BASE1); 1096 break; 1097 case SSB_ADM_TYPE2: 1098 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1099 base = (adm & SSB_ADM_BASE2); 1100 break; 1101 default: 1102 SSB_WARN_ON(1); 1103 } 1104 1105 return base; 1106 } 1107 EXPORT_SYMBOL(ssb_admatch_base); 1108 1109 u32 ssb_admatch_size(u32 adm) 1110 { 1111 u32 size = 0; 1112 1113 switch (adm & SSB_ADM_TYPE) { 1114 case SSB_ADM_TYPE0: 1115 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT); 1116 break; 1117 case SSB_ADM_TYPE1: 1118 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1119 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT); 1120 break; 1121 case SSB_ADM_TYPE2: 1122 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */ 1123 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT); 1124 break; 1125 default: 1126 SSB_WARN_ON(1); 1127 } 1128 size = (1 << (size + 1)); 1129 1130 return size; 1131 } 1132 EXPORT_SYMBOL(ssb_admatch_size); 1133 1134 static int __init ssb_modinit(void) 1135 { 1136 int err; 1137 1138 /* See the comment at the ssb_is_early_boot definition */ 1139 ssb_is_early_boot = 0; 1140 err = bus_register(&ssb_bustype); 1141 if (err) 1142 return err; 1143 1144 /* Maybe we already registered some buses at early boot. 1145 * Check for this and attach them 1146 */ 1147 ssb_buses_lock(); 1148 err = ssb_attach_queued_buses(); 1149 ssb_buses_unlock(); 1150 if (err) 1151 bus_unregister(&ssb_bustype); 1152 1153 err = b43_pci_ssb_bridge_init(); 1154 if (err) { 1155 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge " 1156 "initialization failed"); 1157 /* don't fail SSB init because of this */ 1158 err = 0; 1159 } 1160 1161 return err; 1162 } 1163 /* ssb must be initialized after PCI but before the ssb drivers. 1164 * That means we must use some initcall between subsys_initcall 1165 * and device_initcall. */ 1166 fs_initcall(ssb_modinit); 1167 1168 static void __exit ssb_modexit(void) 1169 { 1170 b43_pci_ssb_bridge_exit(); 1171 bus_unregister(&ssb_bustype); 1172 } 1173 module_exit(ssb_modexit) 1174