1 /* 2 * SH SCI SPI interface 3 * 4 * Copyright (c) 2008 Magnus Damm 5 * 6 * Based on S3C24XX GPIO based SPI driver, which is: 7 * Copyright (c) 2006 Ben Dooks 8 * Copyright (c) 2006 Simtec Electronics 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/delay.h> 18 #include <linux/spinlock.h> 19 #include <linux/platform_device.h> 20 21 #include <linux/spi/spi.h> 22 #include <linux/spi/spi_bitbang.h> 23 #include <linux/module.h> 24 25 #include <asm/spi.h> 26 #include <asm/io.h> 27 28 struct sh_sci_spi { 29 struct spi_bitbang bitbang; 30 31 void __iomem *membase; 32 unsigned char val; 33 struct sh_spi_info *info; 34 struct platform_device *dev; 35 }; 36 37 #define SCSPTR(sp) (sp->membase + 0x1c) 38 #define PIN_SCK (1 << 2) 39 #define PIN_TXD (1 << 0) 40 #define PIN_RXD PIN_TXD 41 #define PIN_INIT ((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD) 42 43 static inline void setbits(struct sh_sci_spi *sp, int bits, int on) 44 { 45 /* 46 * We are the only user of SCSPTR so no locking is required. 47 * Reading bit 2 and 0 in SCSPTR gives pin state as input. 48 * Writing the same bits sets the output value. 49 * This makes regular read-modify-write difficult so we 50 * use sp->val to keep track of the latest register value. 51 */ 52 53 if (on) 54 sp->val |= bits; 55 else 56 sp->val &= ~bits; 57 58 iowrite8(sp->val, SCSPTR(sp)); 59 } 60 61 static inline void setsck(struct spi_device *dev, int on) 62 { 63 setbits(spi_master_get_devdata(dev->master), PIN_SCK, on); 64 } 65 66 static inline void setmosi(struct spi_device *dev, int on) 67 { 68 setbits(spi_master_get_devdata(dev->master), PIN_TXD, on); 69 } 70 71 static inline u32 getmiso(struct spi_device *dev) 72 { 73 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master); 74 75 return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0; 76 } 77 78 #define spidelay(x) ndelay(x) 79 80 #include "spi-bitbang-txrx.h" 81 82 static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi, 83 unsigned nsecs, u32 word, u8 bits, 84 unsigned flags) 85 { 86 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); 87 } 88 89 static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi, 90 unsigned nsecs, u32 word, u8 bits, 91 unsigned flags) 92 { 93 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); 94 } 95 96 static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi, 97 unsigned nsecs, u32 word, u8 bits, 98 unsigned flags) 99 { 100 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); 101 } 102 103 static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi, 104 unsigned nsecs, u32 word, u8 bits, 105 unsigned flags) 106 { 107 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); 108 } 109 110 static void sh_sci_spi_chipselect(struct spi_device *dev, int value) 111 { 112 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master); 113 114 if (sp->info->chip_select) 115 (sp->info->chip_select)(sp->info, dev->chip_select, value); 116 } 117 118 static int sh_sci_spi_probe(struct platform_device *dev) 119 { 120 struct resource *r; 121 struct spi_master *master; 122 struct sh_sci_spi *sp; 123 int ret; 124 125 master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi)); 126 if (master == NULL) { 127 dev_err(&dev->dev, "failed to allocate spi master\n"); 128 ret = -ENOMEM; 129 goto err0; 130 } 131 132 sp = spi_master_get_devdata(master); 133 134 platform_set_drvdata(dev, sp); 135 sp->info = dev_get_platdata(&dev->dev); 136 if (!sp->info) { 137 dev_err(&dev->dev, "platform data is missing\n"); 138 ret = -ENOENT; 139 goto err1; 140 } 141 142 /* setup spi bitbang adaptor */ 143 sp->bitbang.master = master; 144 sp->bitbang.master->bus_num = sp->info->bus_num; 145 sp->bitbang.master->num_chipselect = sp->info->num_chipselect; 146 sp->bitbang.chipselect = sh_sci_spi_chipselect; 147 148 sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0; 149 sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1; 150 sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2; 151 sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3; 152 153 r = platform_get_resource(dev, IORESOURCE_MEM, 0); 154 if (r == NULL) { 155 ret = -ENOENT; 156 goto err1; 157 } 158 sp->membase = ioremap(r->start, resource_size(r)); 159 if (!sp->membase) { 160 ret = -ENXIO; 161 goto err1; 162 } 163 sp->val = ioread8(SCSPTR(sp)); 164 setbits(sp, PIN_INIT, 1); 165 166 ret = spi_bitbang_start(&sp->bitbang); 167 if (!ret) 168 return 0; 169 170 setbits(sp, PIN_INIT, 0); 171 iounmap(sp->membase); 172 err1: 173 spi_master_put(sp->bitbang.master); 174 err0: 175 return ret; 176 } 177 178 static int sh_sci_spi_remove(struct platform_device *dev) 179 { 180 struct sh_sci_spi *sp = platform_get_drvdata(dev); 181 182 spi_bitbang_stop(&sp->bitbang); 183 setbits(sp, PIN_INIT, 0); 184 iounmap(sp->membase); 185 spi_master_put(sp->bitbang.master); 186 return 0; 187 } 188 189 static struct platform_driver sh_sci_spi_drv = { 190 .probe = sh_sci_spi_probe, 191 .remove = sh_sci_spi_remove, 192 .driver = { 193 .name = "spi_sh_sci", 194 }, 195 }; 196 module_platform_driver(sh_sci_spi_drv); 197 198 MODULE_DESCRIPTION("SH SCI SPI Driver"); 199 MODULE_AUTHOR("Magnus Damm <damm@opensource.se>"); 200 MODULE_LICENSE("GPL"); 201 MODULE_ALIAS("platform:spi_sh_sci"); 202