xref: /openbmc/linux/drivers/spi/spi-sc18is602.c (revision 9b93eb47)
1 /*
2  * NXP SC18IS602/603 SPI driver
3  *
4  * Copyright (C) Guenter Roeck <linux@roeck-us.net>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <linux/kernel.h>
18 #include <linux/err.h>
19 #include <linux/module.h>
20 #include <linux/spi/spi.h>
21 #include <linux/i2c.h>
22 #include <linux/delay.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/of_device.h>
25 #include <linux/of.h>
26 #include <linux/platform_data/sc18is602.h>
27 #include <linux/gpio/consumer.h>
28 
29 enum chips { sc18is602, sc18is602b, sc18is603 };
30 
31 #define SC18IS602_BUFSIZ		200
32 #define SC18IS602_CLOCK			7372000
33 
34 #define SC18IS602_MODE_CPHA		BIT(2)
35 #define SC18IS602_MODE_CPOL		BIT(3)
36 #define SC18IS602_MODE_LSB_FIRST	BIT(5)
37 #define SC18IS602_MODE_CLOCK_DIV_4	0x0
38 #define SC18IS602_MODE_CLOCK_DIV_16	0x1
39 #define SC18IS602_MODE_CLOCK_DIV_64	0x2
40 #define SC18IS602_MODE_CLOCK_DIV_128	0x3
41 
42 struct sc18is602 {
43 	struct spi_master	*master;
44 	struct device		*dev;
45 	u8			ctrl;
46 	u32			freq;
47 	u32			speed;
48 
49 	/* I2C data */
50 	struct i2c_client	*client;
51 	enum chips		id;
52 	u8			buffer[SC18IS602_BUFSIZ + 1];
53 	int			tlen;	/* Data queued for tx in buffer */
54 	int			rindex;	/* Receive data index in buffer */
55 
56 	struct gpio_desc	*reset;
57 };
58 
59 static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
60 {
61 	int i, err;
62 	int usecs = 1000000 * len / hw->speed + 1;
63 	u8 dummy[1];
64 
65 	for (i = 0; i < 10; i++) {
66 		err = i2c_master_recv(hw->client, dummy, 1);
67 		if (err >= 0)
68 			return 0;
69 		usleep_range(usecs, usecs * 2);
70 	}
71 	return -ETIMEDOUT;
72 }
73 
74 static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
75 			  struct spi_transfer *t, bool do_transfer)
76 {
77 	unsigned int len = t->len;
78 	int ret;
79 
80 	if (hw->tlen == 0) {
81 		/* First byte (I2C command) is chip select */
82 		hw->buffer[0] = 1 << msg->spi->chip_select;
83 		hw->tlen = 1;
84 		hw->rindex = 0;
85 	}
86 	/*
87 	 * We can not immediately send data to the chip, since each I2C message
88 	 * resembles a full SPI message (from CS active to CS inactive).
89 	 * Enqueue messages up to the first read or until do_transfer is true.
90 	 */
91 	if (t->tx_buf) {
92 		memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
93 		hw->tlen += len;
94 		if (t->rx_buf)
95 			do_transfer = true;
96 		else
97 			hw->rindex = hw->tlen - 1;
98 	} else if (t->rx_buf) {
99 		/*
100 		 * For receive-only transfers we still need to perform a dummy
101 		 * write to receive data from the SPI chip.
102 		 * Read data starts at the end of transmit data (minus 1 to
103 		 * account for CS).
104 		 */
105 		hw->rindex = hw->tlen - 1;
106 		memset(&hw->buffer[hw->tlen], 0, len);
107 		hw->tlen += len;
108 		do_transfer = true;
109 	}
110 
111 	if (do_transfer && hw->tlen > 1) {
112 		ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
113 		if (ret < 0)
114 			return ret;
115 		ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
116 		if (ret < 0)
117 			return ret;
118 		if (ret != hw->tlen)
119 			return -EIO;
120 
121 		if (t->rx_buf) {
122 			int rlen = hw->rindex + len;
123 
124 			ret = sc18is602_wait_ready(hw, hw->tlen);
125 			if (ret < 0)
126 				return ret;
127 			ret = i2c_master_recv(hw->client, hw->buffer, rlen);
128 			if (ret < 0)
129 				return ret;
130 			if (ret != rlen)
131 				return -EIO;
132 			memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
133 		}
134 		hw->tlen = 0;
135 	}
136 	return len;
137 }
138 
139 static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
140 {
141 	u8 ctrl = 0;
142 	int ret;
143 
144 	if (mode & SPI_CPHA)
145 		ctrl |= SC18IS602_MODE_CPHA;
146 	if (mode & SPI_CPOL)
147 		ctrl |= SC18IS602_MODE_CPOL;
148 	if (mode & SPI_LSB_FIRST)
149 		ctrl |= SC18IS602_MODE_LSB_FIRST;
150 
151 	/* Find the closest clock speed */
152 	if (hz >= hw->freq / 4) {
153 		ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
154 		hw->speed = hw->freq / 4;
155 	} else if (hz >= hw->freq / 16) {
156 		ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
157 		hw->speed = hw->freq / 16;
158 	} else if (hz >= hw->freq / 64) {
159 		ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
160 		hw->speed = hw->freq / 64;
161 	} else {
162 		ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
163 		hw->speed = hw->freq / 128;
164 	}
165 
166 	/*
167 	 * Don't do anything if the control value did not change. The initial
168 	 * value of 0xff for hw->ctrl ensures that the correct mode will be set
169 	 * with the first call to this function.
170 	 */
171 	if (ctrl == hw->ctrl)
172 		return 0;
173 
174 	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
175 	if (ret < 0)
176 		return ret;
177 
178 	hw->ctrl = ctrl;
179 
180 	return 0;
181 }
182 
183 static int sc18is602_check_transfer(struct spi_device *spi,
184 				    struct spi_transfer *t, int tlen)
185 {
186 	if (t && t->len + tlen > SC18IS602_BUFSIZ)
187 		return -EINVAL;
188 
189 	return 0;
190 }
191 
192 static int sc18is602_transfer_one(struct spi_master *master,
193 				  struct spi_message *m)
194 {
195 	struct sc18is602 *hw = spi_master_get_devdata(master);
196 	struct spi_device *spi = m->spi;
197 	struct spi_transfer *t;
198 	int status = 0;
199 
200 	hw->tlen = 0;
201 	list_for_each_entry(t, &m->transfers, transfer_list) {
202 		bool do_transfer;
203 
204 		status = sc18is602_check_transfer(spi, t, hw->tlen);
205 		if (status < 0)
206 			break;
207 
208 		status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
209 		if (status < 0)
210 			break;
211 
212 		do_transfer = t->cs_change || list_is_last(&t->transfer_list,
213 							   &m->transfers);
214 
215 		if (t->len) {
216 			status = sc18is602_txrx(hw, m, t, do_transfer);
217 			if (status < 0)
218 				break;
219 			m->actual_length += status;
220 		}
221 		status = 0;
222 
223 		if (t->delay_usecs)
224 			udelay(t->delay_usecs);
225 	}
226 	m->status = status;
227 	spi_finalize_current_message(master);
228 
229 	return status;
230 }
231 
232 static int sc18is602_setup(struct spi_device *spi)
233 {
234 	struct sc18is602 *hw = spi_master_get_devdata(spi->master);
235 
236 	/* SC18IS602 does not support CS2 */
237 	if (hw->id == sc18is602 && spi->chip_select == 2)
238 		return -ENXIO;
239 
240 	return 0;
241 }
242 
243 static int sc18is602_probe(struct i2c_client *client,
244 			   const struct i2c_device_id *id)
245 {
246 	struct device *dev = &client->dev;
247 	struct device_node *np = dev->of_node;
248 	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
249 	struct sc18is602 *hw;
250 	struct spi_master *master;
251 	int error;
252 
253 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
254 				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
255 		return -EINVAL;
256 
257 	master = spi_alloc_master(dev, sizeof(struct sc18is602));
258 	if (!master)
259 		return -ENOMEM;
260 
261 	hw = spi_master_get_devdata(master);
262 	i2c_set_clientdata(client, hw);
263 
264 	/* assert reset and then release */
265 	hw->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
266 	if (IS_ERR(hw->reset))
267 		return PTR_ERR(hw->reset);
268 	gpiod_set_value_cansleep(hw->reset, 0);
269 
270 	hw->master = master;
271 	hw->client = client;
272 	hw->dev = dev;
273 	hw->ctrl = 0xff;
274 
275 	if (client->dev.of_node)
276 		hw->id = (enum chips)of_device_get_match_data(&client->dev);
277 	else
278 		hw->id = id->driver_data;
279 
280 	switch (hw->id) {
281 	case sc18is602:
282 	case sc18is602b:
283 		master->num_chipselect = 4;
284 		hw->freq = SC18IS602_CLOCK;
285 		break;
286 	case sc18is603:
287 		master->num_chipselect = 2;
288 		if (pdata) {
289 			hw->freq = pdata->clock_frequency;
290 		} else {
291 			const __be32 *val;
292 			int len;
293 
294 			val = of_get_property(np, "clock-frequency", &len);
295 			if (val && len >= sizeof(__be32))
296 				hw->freq = be32_to_cpup(val);
297 		}
298 		if (!hw->freq)
299 			hw->freq = SC18IS602_CLOCK;
300 		break;
301 	}
302 	master->bus_num = np ? -1 : client->adapter->nr;
303 	master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
304 	master->bits_per_word_mask = SPI_BPW_MASK(8);
305 	master->setup = sc18is602_setup;
306 	master->transfer_one_message = sc18is602_transfer_one;
307 	master->dev.of_node = np;
308 	master->min_speed_hz = hw->freq / 128;
309 	master->max_speed_hz = hw->freq / 4;
310 
311 	error = devm_spi_register_master(dev, master);
312 	if (error)
313 		goto error_reg;
314 
315 	return 0;
316 
317 error_reg:
318 	spi_master_put(master);
319 	return error;
320 }
321 
322 static const struct i2c_device_id sc18is602_id[] = {
323 	{ "sc18is602", sc18is602 },
324 	{ "sc18is602b", sc18is602b },
325 	{ "sc18is603", sc18is603 },
326 	{ }
327 };
328 MODULE_DEVICE_TABLE(i2c, sc18is602_id);
329 
330 static const struct of_device_id sc18is602_of_match[] = {
331 	{
332 		.compatible = "nxp,sc18is602",
333 		.data = (void *)sc18is602
334 	},
335 	{
336 		.compatible = "nxp,sc18is602b",
337 		.data = (void *)sc18is602b
338 	},
339 	{
340 		.compatible = "nxp,sc18is603",
341 		.data = (void *)sc18is603
342 	},
343 	{ },
344 };
345 MODULE_DEVICE_TABLE(of, sc18is602_of_match);
346 
347 static struct i2c_driver sc18is602_driver = {
348 	.driver = {
349 		.name = "sc18is602",
350 		.of_match_table = of_match_ptr(sc18is602_of_match),
351 	},
352 	.probe = sc18is602_probe,
353 	.id_table = sc18is602_id,
354 };
355 
356 module_i2c_driver(sc18is602_driver);
357 
358 MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
359 MODULE_AUTHOR("Guenter Roeck");
360 MODULE_LICENSE("GPL");
361