1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // RPC-IF SPI/QSPI/Octa driver 4 // 5 // Copyright (C) 2018 ~ 2019 Renesas Solutions Corp. 6 // Copyright (C) 2019 Macronix International Co., Ltd. 7 // Copyright (C) 2019 - 2020 Cogent Embedded, Inc. 8 // 9 10 #include <linux/module.h> 11 #include <linux/platform_device.h> 12 #include <linux/spi/spi.h> 13 #include <linux/spi/spi-mem.h> 14 15 #include <memory/renesas-rpc-if.h> 16 17 #include <asm/unaligned.h> 18 19 static void rpcif_spi_mem_prepare(struct spi_device *spi_dev, 20 const struct spi_mem_op *spi_op, 21 u64 *offs, size_t *len) 22 { 23 struct rpcif *rpc = spi_controller_get_devdata(spi_dev->controller); 24 struct rpcif_op rpc_op = { }; 25 26 rpc_op.cmd.opcode = spi_op->cmd.opcode; 27 rpc_op.cmd.buswidth = spi_op->cmd.buswidth; 28 29 if (spi_op->addr.nbytes) { 30 rpc_op.addr.buswidth = spi_op->addr.buswidth; 31 rpc_op.addr.nbytes = spi_op->addr.nbytes; 32 rpc_op.addr.val = spi_op->addr.val; 33 } 34 35 if (spi_op->dummy.nbytes) { 36 rpc_op.dummy.buswidth = spi_op->dummy.buswidth; 37 rpc_op.dummy.ncycles = spi_op->dummy.nbytes * 8 / 38 spi_op->dummy.buswidth; 39 } 40 41 if (spi_op->data.nbytes || (offs && len)) { 42 rpc_op.data.buswidth = spi_op->data.buswidth; 43 rpc_op.data.nbytes = spi_op->data.nbytes; 44 switch (spi_op->data.dir) { 45 case SPI_MEM_DATA_IN: 46 rpc_op.data.dir = RPCIF_DATA_IN; 47 rpc_op.data.buf.in = spi_op->data.buf.in; 48 break; 49 case SPI_MEM_DATA_OUT: 50 rpc_op.data.dir = RPCIF_DATA_OUT; 51 rpc_op.data.buf.out = spi_op->data.buf.out; 52 break; 53 case SPI_MEM_NO_DATA: 54 rpc_op.data.dir = RPCIF_NO_DATA; 55 break; 56 } 57 } else { 58 rpc_op.data.dir = RPCIF_NO_DATA; 59 } 60 61 rpcif_prepare(rpc, &rpc_op, offs, len); 62 } 63 64 static bool rpcif_spi_mem_supports_op(struct spi_mem *mem, 65 const struct spi_mem_op *op) 66 { 67 if (!spi_mem_default_supports_op(mem, op)) 68 return false; 69 70 if (op->data.buswidth > 4 || op->addr.buswidth > 4 || 71 op->dummy.buswidth > 4 || op->cmd.buswidth > 4 || 72 op->addr.nbytes > 4) 73 return false; 74 75 return true; 76 } 77 78 static ssize_t rpcif_spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, 79 u64 offs, size_t len, void *buf) 80 { 81 struct rpcif *rpc = 82 spi_controller_get_devdata(desc->mem->spi->controller); 83 84 if (offs + desc->info.offset + len > U32_MAX) 85 return -EINVAL; 86 87 rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len); 88 89 return rpcif_dirmap_read(rpc, offs, len, buf); 90 } 91 92 static int rpcif_spi_mem_dirmap_create(struct spi_mem_dirmap_desc *desc) 93 { 94 struct rpcif *rpc = 95 spi_controller_get_devdata(desc->mem->spi->controller); 96 97 if (desc->info.offset + desc->info.length > U32_MAX) 98 return -ENOTSUPP; 99 100 if (!rpcif_spi_mem_supports_op(desc->mem, &desc->info.op_tmpl)) 101 return -ENOTSUPP; 102 103 if (!rpc->dirmap && desc->info.op_tmpl.data.dir == SPI_MEM_DATA_IN) 104 return -ENOTSUPP; 105 106 if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_OUT) 107 return -ENOTSUPP; 108 109 return 0; 110 } 111 112 static int rpcif_spi_mem_exec_op(struct spi_mem *mem, 113 const struct spi_mem_op *op) 114 { 115 struct rpcif *rpc = 116 spi_controller_get_devdata(mem->spi->controller); 117 118 rpcif_spi_mem_prepare(mem->spi, op, NULL, NULL); 119 120 return rpcif_manual_xfer(rpc); 121 } 122 123 static const struct spi_controller_mem_ops rpcif_spi_mem_ops = { 124 .supports_op = rpcif_spi_mem_supports_op, 125 .exec_op = rpcif_spi_mem_exec_op, 126 .dirmap_create = rpcif_spi_mem_dirmap_create, 127 .dirmap_read = rpcif_spi_mem_dirmap_read, 128 }; 129 130 static int rpcif_spi_probe(struct platform_device *pdev) 131 { 132 struct device *parent = pdev->dev.parent; 133 struct spi_controller *ctlr; 134 struct rpcif *rpc; 135 int error; 136 137 ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*rpc)); 138 if (!ctlr) 139 return -ENOMEM; 140 141 rpc = spi_controller_get_devdata(ctlr); 142 error = rpcif_sw_init(rpc, parent); 143 if (error) 144 return error; 145 146 platform_set_drvdata(pdev, ctlr); 147 148 ctlr->dev.of_node = parent->of_node; 149 150 rpcif_enable_rpm(rpc); 151 152 ctlr->num_chipselect = 1; 153 ctlr->mem_ops = &rpcif_spi_mem_ops; 154 155 ctlr->bits_per_word_mask = SPI_BPW_MASK(8); 156 ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_QUAD | SPI_RX_QUAD; 157 ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX; 158 159 error = rpcif_hw_init(rpc, false); 160 if (error) 161 goto out_disable_rpm; 162 163 error = spi_register_controller(ctlr); 164 if (error) { 165 dev_err(&pdev->dev, "spi_register_controller failed\n"); 166 goto out_disable_rpm; 167 } 168 169 return 0; 170 171 out_disable_rpm: 172 rpcif_disable_rpm(rpc); 173 return error; 174 } 175 176 static int rpcif_spi_remove(struct platform_device *pdev) 177 { 178 struct spi_controller *ctlr = platform_get_drvdata(pdev); 179 struct rpcif *rpc = spi_controller_get_devdata(ctlr); 180 181 spi_unregister_controller(ctlr); 182 rpcif_disable_rpm(rpc); 183 184 return 0; 185 } 186 187 static int __maybe_unused rpcif_spi_suspend(struct device *dev) 188 { 189 struct spi_controller *ctlr = dev_get_drvdata(dev); 190 191 return spi_controller_suspend(ctlr); 192 } 193 194 static int __maybe_unused rpcif_spi_resume(struct device *dev) 195 { 196 struct spi_controller *ctlr = dev_get_drvdata(dev); 197 198 return spi_controller_resume(ctlr); 199 } 200 201 static SIMPLE_DEV_PM_OPS(rpcif_spi_pm_ops, rpcif_spi_suspend, rpcif_spi_resume); 202 203 static struct platform_driver rpcif_spi_driver = { 204 .probe = rpcif_spi_probe, 205 .remove = rpcif_spi_remove, 206 .driver = { 207 .name = "rpc-if-spi", 208 #ifdef CONFIG_PM_SLEEP 209 .pm = &rpcif_spi_pm_ops, 210 #endif 211 }, 212 }; 213 module_platform_driver(rpcif_spi_driver); 214 215 MODULE_DESCRIPTION("Renesas RPC-IF SPI driver"); 216 MODULE_LICENSE("GPL v2"); 217