1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
205aec357SBert Vermeulen /*
305aec357SBert Vermeulen * SPI controller driver for the Mikrotik RB4xx boards
405aec357SBert Vermeulen *
505aec357SBert Vermeulen * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
605aec357SBert Vermeulen * Copyright (C) 2015 Bert Vermeulen <bert@biot.com>
705aec357SBert Vermeulen *
805aec357SBert Vermeulen * This file was based on the patches for Linux 2.6.27.39 published by
905aec357SBert Vermeulen * MikroTik for their RouterBoard 4xx series devices.
1005aec357SBert Vermeulen */
1105aec357SBert Vermeulen
1205aec357SBert Vermeulen #include <linux/kernel.h>
1305aec357SBert Vermeulen #include <linux/module.h>
1405aec357SBert Vermeulen #include <linux/platform_device.h>
1505aec357SBert Vermeulen #include <linux/clk.h>
1605aec357SBert Vermeulen #include <linux/spi/spi.h>
179a436c62SChristopher Hill #include <linux/of.h>
1805aec357SBert Vermeulen
1905aec357SBert Vermeulen #include <asm/mach-ath79/ar71xx_regs.h>
2005aec357SBert Vermeulen
2105aec357SBert Vermeulen struct rb4xx_spi {
2205aec357SBert Vermeulen void __iomem *base;
2305aec357SBert Vermeulen struct clk *clk;
2405aec357SBert Vermeulen };
2505aec357SBert Vermeulen
rb4xx_read(struct rb4xx_spi * rbspi,u32 reg)2605aec357SBert Vermeulen static inline u32 rb4xx_read(struct rb4xx_spi *rbspi, u32 reg)
2705aec357SBert Vermeulen {
2805aec357SBert Vermeulen return __raw_readl(rbspi->base + reg);
2905aec357SBert Vermeulen }
3005aec357SBert Vermeulen
rb4xx_write(struct rb4xx_spi * rbspi,u32 reg,u32 value)3105aec357SBert Vermeulen static inline void rb4xx_write(struct rb4xx_spi *rbspi, u32 reg, u32 value)
3205aec357SBert Vermeulen {
3305aec357SBert Vermeulen __raw_writel(value, rbspi->base + reg);
3405aec357SBert Vermeulen }
3505aec357SBert Vermeulen
do_spi_clk(struct rb4xx_spi * rbspi,u32 spi_ioc,int value)3605aec357SBert Vermeulen static inline void do_spi_clk(struct rb4xx_spi *rbspi, u32 spi_ioc, int value)
3705aec357SBert Vermeulen {
3805aec357SBert Vermeulen u32 regval;
3905aec357SBert Vermeulen
4005aec357SBert Vermeulen regval = spi_ioc;
4105aec357SBert Vermeulen if (value & BIT(0))
4205aec357SBert Vermeulen regval |= AR71XX_SPI_IOC_DO;
4305aec357SBert Vermeulen
4405aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval);
4505aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK);
4605aec357SBert Vermeulen }
4705aec357SBert Vermeulen
do_spi_byte(struct rb4xx_spi * rbspi,u32 spi_ioc,u8 byte)4805aec357SBert Vermeulen static void do_spi_byte(struct rb4xx_spi *rbspi, u32 spi_ioc, u8 byte)
4905aec357SBert Vermeulen {
5005aec357SBert Vermeulen int i;
5105aec357SBert Vermeulen
5205aec357SBert Vermeulen for (i = 7; i >= 0; i--)
5305aec357SBert Vermeulen do_spi_clk(rbspi, spi_ioc, byte >> i);
5405aec357SBert Vermeulen }
5505aec357SBert Vermeulen
5605aec357SBert Vermeulen /* The CS2 pin is used to clock in a second bit per clock cycle. */
do_spi_clk_two(struct rb4xx_spi * rbspi,u32 spi_ioc,u8 value)5705aec357SBert Vermeulen static inline void do_spi_clk_two(struct rb4xx_spi *rbspi, u32 spi_ioc,
5805aec357SBert Vermeulen u8 value)
5905aec357SBert Vermeulen {
6005aec357SBert Vermeulen u32 regval;
6105aec357SBert Vermeulen
6205aec357SBert Vermeulen regval = spi_ioc;
6305aec357SBert Vermeulen if (value & BIT(1))
6405aec357SBert Vermeulen regval |= AR71XX_SPI_IOC_DO;
6505aec357SBert Vermeulen if (value & BIT(0))
6605aec357SBert Vermeulen regval |= AR71XX_SPI_IOC_CS2;
6705aec357SBert Vermeulen
6805aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval);
6905aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_IOC, regval | AR71XX_SPI_IOC_CLK);
7005aec357SBert Vermeulen }
7105aec357SBert Vermeulen
7205aec357SBert Vermeulen /* Two bits at a time, msb first */
do_spi_byte_two(struct rb4xx_spi * rbspi,u32 spi_ioc,u8 byte)7305aec357SBert Vermeulen static void do_spi_byte_two(struct rb4xx_spi *rbspi, u32 spi_ioc, u8 byte)
7405aec357SBert Vermeulen {
7505aec357SBert Vermeulen do_spi_clk_two(rbspi, spi_ioc, byte >> 6);
7605aec357SBert Vermeulen do_spi_clk_two(rbspi, spi_ioc, byte >> 4);
7705aec357SBert Vermeulen do_spi_clk_two(rbspi, spi_ioc, byte >> 2);
7805aec357SBert Vermeulen do_spi_clk_two(rbspi, spi_ioc, byte >> 0);
7905aec357SBert Vermeulen }
8005aec357SBert Vermeulen
rb4xx_set_cs(struct spi_device * spi,bool enable)8105aec357SBert Vermeulen static void rb4xx_set_cs(struct spi_device *spi, bool enable)
8205aec357SBert Vermeulen {
83*e6302d00SYang Yingliang struct rb4xx_spi *rbspi = spi_controller_get_devdata(spi->controller);
8405aec357SBert Vermeulen
8505aec357SBert Vermeulen /*
8605aec357SBert Vermeulen * Setting CS is done along with bitbanging the actual values,
8705aec357SBert Vermeulen * since it's all on the same hardware register. However the
8805aec357SBert Vermeulen * CPLD needs CS deselected after every command.
8905aec357SBert Vermeulen */
904a1ae8beSBert Vermeulen if (enable)
9105aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_IOC,
9205aec357SBert Vermeulen AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1);
9305aec357SBert Vermeulen }
9405aec357SBert Vermeulen
rb4xx_transfer_one(struct spi_controller * host,struct spi_device * spi,struct spi_transfer * t)95*e6302d00SYang Yingliang static int rb4xx_transfer_one(struct spi_controller *host,
9605aec357SBert Vermeulen struct spi_device *spi, struct spi_transfer *t)
9705aec357SBert Vermeulen {
98*e6302d00SYang Yingliang struct rb4xx_spi *rbspi = spi_controller_get_devdata(host);
9905aec357SBert Vermeulen int i;
10005aec357SBert Vermeulen u32 spi_ioc;
10105aec357SBert Vermeulen u8 *rx_buf;
10205aec357SBert Vermeulen const u8 *tx_buf;
10305aec357SBert Vermeulen
10405aec357SBert Vermeulen /*
10505aec357SBert Vermeulen * Prime the SPI register with the SPI device selected. The m25p80 boot
10605aec357SBert Vermeulen * flash and CPLD share the CS0 pin. This works because the CPLD's
10705aec357SBert Vermeulen * command set was designed to almost not clash with that of the
10805aec357SBert Vermeulen * boot flash.
10905aec357SBert Vermeulen */
1109e264f3fSAmit Kumar Mahapatra via Alsa-devel if (spi_get_chipselect(spi, 0) == 2)
11105aec357SBert Vermeulen /* MMC */
11205aec357SBert Vermeulen spi_ioc = AR71XX_SPI_IOC_CS0;
11305aec357SBert Vermeulen else
11405aec357SBert Vermeulen /* Boot flash and CPLD */
11505aec357SBert Vermeulen spi_ioc = AR71XX_SPI_IOC_CS1;
11605aec357SBert Vermeulen
11705aec357SBert Vermeulen tx_buf = t->tx_buf;
11805aec357SBert Vermeulen rx_buf = t->rx_buf;
11905aec357SBert Vermeulen for (i = 0; i < t->len; ++i) {
12005aec357SBert Vermeulen if (t->tx_nbits == SPI_NBITS_DUAL)
12105aec357SBert Vermeulen /* CPLD can use two-wire transfers */
12205aec357SBert Vermeulen do_spi_byte_two(rbspi, spi_ioc, tx_buf[i]);
12305aec357SBert Vermeulen else
12405aec357SBert Vermeulen do_spi_byte(rbspi, spi_ioc, tx_buf[i]);
12505aec357SBert Vermeulen if (!rx_buf)
12605aec357SBert Vermeulen continue;
12705aec357SBert Vermeulen rx_buf[i] = rb4xx_read(rbspi, AR71XX_SPI_REG_RDS);
12805aec357SBert Vermeulen }
129*e6302d00SYang Yingliang spi_finalize_current_transfer(host);
13005aec357SBert Vermeulen
13105aec357SBert Vermeulen return 0;
13205aec357SBert Vermeulen }
13305aec357SBert Vermeulen
rb4xx_spi_probe(struct platform_device * pdev)13405aec357SBert Vermeulen static int rb4xx_spi_probe(struct platform_device *pdev)
13505aec357SBert Vermeulen {
136*e6302d00SYang Yingliang struct spi_controller *host;
13705aec357SBert Vermeulen struct clk *ahb_clk;
13805aec357SBert Vermeulen struct rb4xx_spi *rbspi;
13905aec357SBert Vermeulen int err;
14005aec357SBert Vermeulen void __iomem *spi_base;
14105aec357SBert Vermeulen
1427d4c2083SYueHaibing spi_base = devm_platform_ioremap_resource(pdev, 0);
143b2b3024cSAxel Lin if (IS_ERR(spi_base))
14405aec357SBert Vermeulen return PTR_ERR(spi_base);
14505aec357SBert Vermeulen
146*e6302d00SYang Yingliang host = devm_spi_alloc_host(&pdev->dev, sizeof(*rbspi));
147*e6302d00SYang Yingliang if (!host)
14805aec357SBert Vermeulen return -ENOMEM;
14905aec357SBert Vermeulen
15005aec357SBert Vermeulen ahb_clk = devm_clk_get(&pdev->dev, "ahb");
15105aec357SBert Vermeulen if (IS_ERR(ahb_clk))
15205aec357SBert Vermeulen return PTR_ERR(ahb_clk);
15305aec357SBert Vermeulen
154*e6302d00SYang Yingliang host->dev.of_node = pdev->dev.of_node;
155*e6302d00SYang Yingliang host->bus_num = 0;
156*e6302d00SYang Yingliang host->num_chipselect = 3;
157*e6302d00SYang Yingliang host->mode_bits = SPI_TX_DUAL;
158*e6302d00SYang Yingliang host->bits_per_word_mask = SPI_BPW_MASK(8);
159*e6302d00SYang Yingliang host->flags = SPI_CONTROLLER_MUST_TX;
160*e6302d00SYang Yingliang host->transfer_one = rb4xx_transfer_one;
161*e6302d00SYang Yingliang host->set_cs = rb4xx_set_cs;
16205aec357SBert Vermeulen
163*e6302d00SYang Yingliang rbspi = spi_controller_get_devdata(host);
164678e5e1eSChristopher Hill rbspi->base = spi_base;
165678e5e1eSChristopher Hill rbspi->clk = ahb_clk;
166678e5e1eSChristopher Hill platform_set_drvdata(pdev, rbspi);
167678e5e1eSChristopher Hill
168*e6302d00SYang Yingliang err = devm_spi_register_controller(&pdev->dev, host);
16905aec357SBert Vermeulen if (err) {
170*e6302d00SYang Yingliang dev_err(&pdev->dev, "failed to register SPI host\n");
17105aec357SBert Vermeulen return err;
17205aec357SBert Vermeulen }
17305aec357SBert Vermeulen
17405aec357SBert Vermeulen err = clk_prepare_enable(ahb_clk);
17505aec357SBert Vermeulen if (err)
17605aec357SBert Vermeulen return err;
17705aec357SBert Vermeulen
17805aec357SBert Vermeulen /* Enable SPI */
17905aec357SBert Vermeulen rb4xx_write(rbspi, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
18005aec357SBert Vermeulen
18105aec357SBert Vermeulen return 0;
18205aec357SBert Vermeulen }
18305aec357SBert Vermeulen
rb4xx_spi_remove(struct platform_device * pdev)184a006c353SUwe Kleine-König static void rb4xx_spi_remove(struct platform_device *pdev)
18505aec357SBert Vermeulen {
18605aec357SBert Vermeulen struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
18705aec357SBert Vermeulen
18805aec357SBert Vermeulen clk_disable_unprepare(rbspi->clk);
18905aec357SBert Vermeulen }
19005aec357SBert Vermeulen
1919a436c62SChristopher Hill static const struct of_device_id rb4xx_spi_dt_match[] = {
1929a436c62SChristopher Hill { .compatible = "mikrotik,rb4xx-spi" },
1939a436c62SChristopher Hill { },
1949a436c62SChristopher Hill };
1959a436c62SChristopher Hill MODULE_DEVICE_TABLE(of, rb4xx_spi_dt_match);
1969a436c62SChristopher Hill
19705aec357SBert Vermeulen static struct platform_driver rb4xx_spi_drv = {
19805aec357SBert Vermeulen .probe = rb4xx_spi_probe,
199a006c353SUwe Kleine-König .remove_new = rb4xx_spi_remove,
20005aec357SBert Vermeulen .driver = {
20105aec357SBert Vermeulen .name = "rb4xx-spi",
2029a436c62SChristopher Hill .of_match_table = of_match_ptr(rb4xx_spi_dt_match),
20305aec357SBert Vermeulen },
20405aec357SBert Vermeulen };
20505aec357SBert Vermeulen
20605aec357SBert Vermeulen module_platform_driver(rb4xx_spi_drv);
20705aec357SBert Vermeulen
20805aec357SBert Vermeulen MODULE_DESCRIPTION("Mikrotik RB4xx SPI controller driver");
20905aec357SBert Vermeulen MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
21005aec357SBert Vermeulen MODULE_AUTHOR("Bert Vermeulen <bert@biot.com>");
21105aec357SBert Vermeulen MODULE_LICENSE("GPL v2");
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