xref: /openbmc/linux/drivers/spi/spi-pxa2xx-pci.c (revision babbdf5b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * CE4100's SPI device is more or less the same one as found on PXA
4  *
5  * Copyright (C) 2016, Intel Corporation
6  */
7 #include <linux/clk-provider.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/platform_device.h>
11 #include <linux/spi/pxa2xx_spi.h>
12 
13 #include <linux/dmaengine.h>
14 #include <linux/platform_data/dma-dw.h>
15 
16 enum {
17 	PORT_QUARK_X1000,
18 	PORT_BYT,
19 	PORT_MRFLD,
20 	PORT_BSW0,
21 	PORT_BSW1,
22 	PORT_BSW2,
23 	PORT_CE4100,
24 	PORT_LPT0,
25 	PORT_LPT1,
26 };
27 
28 struct pxa_spi_info {
29 	enum pxa_ssp_type type;
30 	int port_id;
31 	int num_chipselect;
32 	unsigned long max_clk_rate;
33 
34 	/* DMA channel request parameters */
35 	bool (*dma_filter)(struct dma_chan *chan, void *param);
36 	void *tx_param;
37 	void *rx_param;
38 
39 	int dma_burst_size;
40 
41 	int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
42 };
43 
44 static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
45 static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
46 
47 static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
48 static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
49 static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
50 static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
51 static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
52 static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
53 
54 static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
55 static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
56 static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
57 static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
58 static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
59 static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
60 
61 static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
62 static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
63 static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
64 static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
65 
66 static bool lpss_dma_filter(struct dma_chan *chan, void *param)
67 {
68 	struct dw_dma_slave *dws = param;
69 
70 	if (dws->dma_dev != chan->device->dev)
71 		return false;
72 
73 	chan->private = dws;
74 	return true;
75 }
76 
77 static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
78 {
79 	struct pci_dev *dma_dev;
80 
81 	c->num_chipselect = 1;
82 	c->max_clk_rate = 50000000;
83 
84 	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
85 
86 	if (c->tx_param) {
87 		struct dw_dma_slave *slave = c->tx_param;
88 
89 		slave->dma_dev = &dma_dev->dev;
90 		slave->m_master = 0;
91 		slave->p_master = 1;
92 	}
93 
94 	if (c->rx_param) {
95 		struct dw_dma_slave *slave = c->rx_param;
96 
97 		slave->dma_dev = &dma_dev->dev;
98 		slave->m_master = 0;
99 		slave->p_master = 1;
100 	}
101 
102 	c->dma_filter = lpss_dma_filter;
103 	return 0;
104 }
105 
106 static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
107 {
108 	struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
109 	struct dw_dma_slave *tx, *rx;
110 
111 	switch (PCI_FUNC(dev->devfn)) {
112 	case 0:
113 		c->port_id = 3;
114 		c->num_chipselect = 1;
115 		c->tx_param = &mrfld3_tx_param;
116 		c->rx_param = &mrfld3_rx_param;
117 		break;
118 	case 1:
119 		c->port_id = 5;
120 		c->num_chipselect = 4;
121 		c->tx_param = &mrfld5_tx_param;
122 		c->rx_param = &mrfld5_rx_param;
123 		break;
124 	case 2:
125 		c->port_id = 6;
126 		c->num_chipselect = 1;
127 		c->tx_param = &mrfld6_tx_param;
128 		c->rx_param = &mrfld6_rx_param;
129 		break;
130 	default:
131 		return -ENODEV;
132 	}
133 
134 	tx = c->tx_param;
135 	tx->dma_dev = &dma_dev->dev;
136 
137 	rx = c->rx_param;
138 	rx->dma_dev = &dma_dev->dev;
139 
140 	c->dma_filter = lpss_dma_filter;
141 	c->dma_burst_size = 8;
142 	return 0;
143 }
144 
145 static struct pxa_spi_info spi_info_configs[] = {
146 	[PORT_CE4100] = {
147 		.type = PXA25x_SSP,
148 		.port_id =  -1,
149 		.num_chipselect = -1,
150 		.max_clk_rate = 3686400,
151 	},
152 	[PORT_BYT] = {
153 		.type = LPSS_BYT_SSP,
154 		.port_id = 0,
155 		.setup = lpss_spi_setup,
156 		.tx_param = &byt_tx_param,
157 		.rx_param = &byt_rx_param,
158 	},
159 	[PORT_BSW0] = {
160 		.type = LPSS_BSW_SSP,
161 		.port_id = 0,
162 		.setup = lpss_spi_setup,
163 		.tx_param = &bsw0_tx_param,
164 		.rx_param = &bsw0_rx_param,
165 	},
166 	[PORT_BSW1] = {
167 		.type = LPSS_BSW_SSP,
168 		.port_id = 1,
169 		.setup = lpss_spi_setup,
170 		.tx_param = &bsw1_tx_param,
171 		.rx_param = &bsw1_rx_param,
172 	},
173 	[PORT_BSW2] = {
174 		.type = LPSS_BSW_SSP,
175 		.port_id = 2,
176 		.setup = lpss_spi_setup,
177 		.tx_param = &bsw2_tx_param,
178 		.rx_param = &bsw2_rx_param,
179 	},
180 	[PORT_MRFLD] = {
181 		.type = PXA27x_SSP,
182 		.max_clk_rate = 25000000,
183 		.setup = mrfld_spi_setup,
184 	},
185 	[PORT_QUARK_X1000] = {
186 		.type = QUARK_X1000_SSP,
187 		.port_id = -1,
188 		.num_chipselect = 1,
189 		.max_clk_rate = 50000000,
190 	},
191 	[PORT_LPT0] = {
192 		.type = LPSS_LPT_SSP,
193 		.port_id = 0,
194 		.setup = lpss_spi_setup,
195 		.tx_param = &lpt0_tx_param,
196 		.rx_param = &lpt0_rx_param,
197 	},
198 	[PORT_LPT1] = {
199 		.type = LPSS_LPT_SSP,
200 		.port_id = 1,
201 		.setup = lpss_spi_setup,
202 		.tx_param = &lpt1_tx_param,
203 		.rx_param = &lpt1_rx_param,
204 	},
205 };
206 
207 static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
208 		const struct pci_device_id *ent)
209 {
210 	struct platform_device_info pi;
211 	int ret;
212 	struct platform_device *pdev;
213 	struct pxa2xx_spi_controller spi_pdata;
214 	struct ssp_device *ssp;
215 	struct pxa_spi_info *c;
216 	char buf[40];
217 
218 	ret = pcim_enable_device(dev);
219 	if (ret)
220 		return ret;
221 
222 	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
223 	if (ret)
224 		return ret;
225 
226 	c = &spi_info_configs[ent->driver_data];
227 	if (c->setup) {
228 		ret = c->setup(dev, c);
229 		if (ret)
230 			return ret;
231 	}
232 
233 	memset(&spi_pdata, 0, sizeof(spi_pdata));
234 	spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
235 	spi_pdata.dma_filter = c->dma_filter;
236 	spi_pdata.tx_param = c->tx_param;
237 	spi_pdata.rx_param = c->rx_param;
238 	spi_pdata.enable_dma = c->rx_param && c->tx_param;
239 	spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1;
240 
241 	ssp = &spi_pdata.ssp;
242 	ssp->phys_base = pci_resource_start(dev, 0);
243 	ssp->mmio_base = pcim_iomap_table(dev)[0];
244 	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
245 	ssp->type = c->type;
246 
247 	pci_set_master(dev);
248 
249 	ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
250 	if (ret < 0)
251 		return ret;
252 	ssp->irq = pci_irq_vector(dev, 0);
253 
254 	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
255 	ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0,
256 					   c->max_clk_rate);
257 	 if (IS_ERR(ssp->clk))
258 		return PTR_ERR(ssp->clk);
259 
260 	memset(&pi, 0, sizeof(pi));
261 	pi.fwnode = dev->dev.fwnode;
262 	pi.parent = &dev->dev;
263 	pi.name = "pxa2xx-spi";
264 	pi.id = ssp->port_id;
265 	pi.data = &spi_pdata;
266 	pi.size_data = sizeof(spi_pdata);
267 
268 	pdev = platform_device_register_full(&pi);
269 	if (IS_ERR(pdev)) {
270 		clk_unregister(ssp->clk);
271 		return PTR_ERR(pdev);
272 	}
273 
274 	pci_set_drvdata(dev, pdev);
275 
276 	return 0;
277 }
278 
279 static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
280 {
281 	struct platform_device *pdev = pci_get_drvdata(dev);
282 	struct pxa2xx_spi_controller *spi_pdata;
283 
284 	spi_pdata = dev_get_platdata(&pdev->dev);
285 
286 	platform_device_unregister(pdev);
287 	clk_unregister(spi_pdata->ssp.clk);
288 }
289 
290 static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
291 	{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
292 	{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
293 	{ PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
294 	{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
295 	{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
296 	{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
297 	{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
298 	{ PCI_VDEVICE(INTEL, 0x9c65), PORT_LPT0 },
299 	{ PCI_VDEVICE(INTEL, 0x9c66), PORT_LPT1 },
300 	{ PCI_VDEVICE(INTEL, 0x9ce5), PORT_LPT0 },
301 	{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT1 },
302 	{ }
303 };
304 MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
305 
306 static struct pci_driver pxa2xx_spi_pci_driver = {
307 	.name           = "pxa2xx_spi_pci",
308 	.id_table       = pxa2xx_spi_pci_devices,
309 	.probe          = pxa2xx_spi_pci_probe,
310 	.remove         = pxa2xx_spi_pci_remove,
311 };
312 
313 module_pci_driver(pxa2xx_spi_pci_driver);
314 
315 MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
316 MODULE_LICENSE("GPL v2");
317 MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
318