1 /* 2 * CE4100's SPI device is more or less the same one as found on PXA 3 * 4 * Copyright (C) 2016, Intel Corporation 5 */ 6 #include <linux/clk-provider.h> 7 #include <linux/module.h> 8 #include <linux/pci.h> 9 #include <linux/platform_device.h> 10 #include <linux/spi/pxa2xx_spi.h> 11 12 #include <linux/dmaengine.h> 13 #include <linux/platform_data/dma-dw.h> 14 15 enum { 16 PORT_QUARK_X1000, 17 PORT_BYT, 18 PORT_MRFLD, 19 PORT_BSW0, 20 PORT_BSW1, 21 PORT_BSW2, 22 PORT_CE4100, 23 PORT_LPT, 24 }; 25 26 struct pxa_spi_info { 27 enum pxa_ssp_type type; 28 int port_id; 29 int num_chipselect; 30 unsigned long max_clk_rate; 31 32 /* DMA channel request parameters */ 33 bool (*dma_filter)(struct dma_chan *chan, void *param); 34 void *tx_param; 35 void *rx_param; 36 37 int dma_burst_size; 38 39 int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c); 40 }; 41 42 static struct dw_dma_slave byt_tx_param = { .dst_id = 0 }; 43 static struct dw_dma_slave byt_rx_param = { .src_id = 1 }; 44 45 static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 }; 46 static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 }; 47 static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 }; 48 static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 }; 49 static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 }; 50 static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 }; 51 52 static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 }; 53 static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 }; 54 static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 }; 55 static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 }; 56 static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 }; 57 static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 }; 58 59 static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 }; 60 static struct dw_dma_slave lpt_rx_param = { .src_id = 1 }; 61 62 static bool lpss_dma_filter(struct dma_chan *chan, void *param) 63 { 64 struct dw_dma_slave *dws = param; 65 66 if (dws->dma_dev != chan->device->dev) 67 return false; 68 69 chan->private = dws; 70 return true; 71 } 72 73 static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c) 74 { 75 struct pci_dev *dma_dev; 76 77 c->num_chipselect = 1; 78 c->max_clk_rate = 50000000; 79 80 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); 81 82 if (c->tx_param) { 83 struct dw_dma_slave *slave = c->tx_param; 84 85 slave->dma_dev = &dma_dev->dev; 86 slave->m_master = 0; 87 slave->p_master = 1; 88 } 89 90 if (c->rx_param) { 91 struct dw_dma_slave *slave = c->rx_param; 92 93 slave->dma_dev = &dma_dev->dev; 94 slave->m_master = 0; 95 slave->p_master = 1; 96 } 97 98 c->dma_filter = lpss_dma_filter; 99 return 0; 100 } 101 102 static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c) 103 { 104 struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0)); 105 struct dw_dma_slave *tx, *rx; 106 107 switch (PCI_FUNC(dev->devfn)) { 108 case 0: 109 c->port_id = 3; 110 c->num_chipselect = 1; 111 c->tx_param = &mrfld3_tx_param; 112 c->rx_param = &mrfld3_rx_param; 113 break; 114 case 1: 115 c->port_id = 5; 116 c->num_chipselect = 4; 117 c->tx_param = &mrfld5_tx_param; 118 c->rx_param = &mrfld5_rx_param; 119 break; 120 case 2: 121 c->port_id = 6; 122 c->num_chipselect = 1; 123 c->tx_param = &mrfld6_tx_param; 124 c->rx_param = &mrfld6_rx_param; 125 break; 126 default: 127 return -ENODEV; 128 } 129 130 tx = c->tx_param; 131 tx->dma_dev = &dma_dev->dev; 132 133 rx = c->rx_param; 134 rx->dma_dev = &dma_dev->dev; 135 136 c->dma_filter = lpss_dma_filter; 137 c->dma_burst_size = 8; 138 return 0; 139 } 140 141 static struct pxa_spi_info spi_info_configs[] = { 142 [PORT_CE4100] = { 143 .type = PXA25x_SSP, 144 .port_id = -1, 145 .num_chipselect = -1, 146 .max_clk_rate = 3686400, 147 }, 148 [PORT_BYT] = { 149 .type = LPSS_BYT_SSP, 150 .port_id = 0, 151 .setup = lpss_spi_setup, 152 .tx_param = &byt_tx_param, 153 .rx_param = &byt_rx_param, 154 }, 155 [PORT_BSW0] = { 156 .type = LPSS_BSW_SSP, 157 .port_id = 0, 158 .setup = lpss_spi_setup, 159 .tx_param = &bsw0_tx_param, 160 .rx_param = &bsw0_rx_param, 161 }, 162 [PORT_BSW1] = { 163 .type = LPSS_BSW_SSP, 164 .port_id = 1, 165 .setup = lpss_spi_setup, 166 .tx_param = &bsw1_tx_param, 167 .rx_param = &bsw1_rx_param, 168 }, 169 [PORT_BSW2] = { 170 .type = LPSS_BSW_SSP, 171 .port_id = 2, 172 .setup = lpss_spi_setup, 173 .tx_param = &bsw2_tx_param, 174 .rx_param = &bsw2_rx_param, 175 }, 176 [PORT_MRFLD] = { 177 .type = PXA27x_SSP, 178 .max_clk_rate = 25000000, 179 .setup = mrfld_spi_setup, 180 }, 181 [PORT_QUARK_X1000] = { 182 .type = QUARK_X1000_SSP, 183 .port_id = -1, 184 .num_chipselect = 1, 185 .max_clk_rate = 50000000, 186 }, 187 [PORT_LPT] = { 188 .type = LPSS_LPT_SSP, 189 .port_id = 0, 190 .setup = lpss_spi_setup, 191 .tx_param = &lpt_tx_param, 192 .rx_param = &lpt_rx_param, 193 }, 194 }; 195 196 static int pxa2xx_spi_pci_probe(struct pci_dev *dev, 197 const struct pci_device_id *ent) 198 { 199 struct platform_device_info pi; 200 int ret; 201 struct platform_device *pdev; 202 struct pxa2xx_spi_controller spi_pdata; 203 struct ssp_device *ssp; 204 struct pxa_spi_info *c; 205 char buf[40]; 206 207 ret = pcim_enable_device(dev); 208 if (ret) 209 return ret; 210 211 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI"); 212 if (ret) 213 return ret; 214 215 c = &spi_info_configs[ent->driver_data]; 216 if (c->setup) { 217 ret = c->setup(dev, c); 218 if (ret) 219 return ret; 220 } 221 222 memset(&spi_pdata, 0, sizeof(spi_pdata)); 223 spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn; 224 spi_pdata.dma_filter = c->dma_filter; 225 spi_pdata.tx_param = c->tx_param; 226 spi_pdata.rx_param = c->rx_param; 227 spi_pdata.enable_dma = c->rx_param && c->tx_param; 228 spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1; 229 230 ssp = &spi_pdata.ssp; 231 ssp->phys_base = pci_resource_start(dev, 0); 232 ssp->mmio_base = pcim_iomap_table(dev)[0]; 233 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn; 234 ssp->type = c->type; 235 236 pci_set_master(dev); 237 238 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES); 239 if (ret < 0) 240 return ret; 241 ssp->irq = pci_irq_vector(dev, 0); 242 243 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id); 244 ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0, 245 c->max_clk_rate); 246 if (IS_ERR(ssp->clk)) 247 return PTR_ERR(ssp->clk); 248 249 memset(&pi, 0, sizeof(pi)); 250 pi.fwnode = dev->dev.fwnode; 251 pi.parent = &dev->dev; 252 pi.name = "pxa2xx-spi"; 253 pi.id = ssp->port_id; 254 pi.data = &spi_pdata; 255 pi.size_data = sizeof(spi_pdata); 256 257 pdev = platform_device_register_full(&pi); 258 if (IS_ERR(pdev)) { 259 clk_unregister(ssp->clk); 260 return PTR_ERR(pdev); 261 } 262 263 pci_set_drvdata(dev, pdev); 264 265 return 0; 266 } 267 268 static void pxa2xx_spi_pci_remove(struct pci_dev *dev) 269 { 270 struct platform_device *pdev = pci_get_drvdata(dev); 271 struct pxa2xx_spi_controller *spi_pdata; 272 273 spi_pdata = dev_get_platdata(&pdev->dev); 274 275 platform_device_unregister(pdev); 276 clk_unregister(spi_pdata->ssp.clk); 277 } 278 279 static const struct pci_device_id pxa2xx_spi_pci_devices[] = { 280 { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 }, 281 { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT }, 282 { PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD }, 283 { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 }, 284 { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 }, 285 { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 }, 286 { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 }, 287 { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT }, 288 { }, 289 }; 290 MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices); 291 292 static struct pci_driver pxa2xx_spi_pci_driver = { 293 .name = "pxa2xx_spi_pci", 294 .id_table = pxa2xx_spi_pci_devices, 295 .probe = pxa2xx_spi_pci_probe, 296 .remove = pxa2xx_spi_pci_remove, 297 }; 298 299 module_pci_driver(pxa2xx_spi_pci_driver); 300 301 MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver"); 302 MODULE_LICENSE("GPL v2"); 303 MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>"); 304