xref: /openbmc/linux/drivers/spi/spi-mpc52xx.c (revision ac7357ac) 
155716d26SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2ca632f55SGrant Likely /*
3ca632f55SGrant Likely  * MPC52xx SPI bus driver.
4ca632f55SGrant Likely  *
5ca632f55SGrant Likely  * Copyright (C) 2008 Secret Lab Technologies Ltd.
6ca632f55SGrant Likely  *
7ca632f55SGrant Likely  * This is the driver for the MPC5200's dedicated SPI controller.
8ca632f55SGrant Likely  *
9ca632f55SGrant Likely  * Note: this driver does not support the MPC5200 PSC in SPI mode.  For
10ca632f55SGrant Likely  * that driver see drivers/spi/mpc52xx_psc_spi.c
11ca632f55SGrant Likely  */
12ca632f55SGrant Likely 
13ca632f55SGrant Likely #include <linux/module.h>
14ca632f55SGrant Likely #include <linux/errno.h>
15ca632f55SGrant Likely #include <linux/of_platform.h>
16ca632f55SGrant Likely #include <linux/interrupt.h>
17ca632f55SGrant Likely #include <linux/delay.h>
18ca632f55SGrant Likely #include <linux/spi/spi.h>
19ca632f55SGrant Likely #include <linux/io.h>
20ca632f55SGrant Likely #include <linux/of_gpio.h>
21ca632f55SGrant Likely #include <linux/slab.h>
22ca632f55SGrant Likely #include <asm/time.h>
23ca632f55SGrant Likely #include <asm/mpc52xx.h>
24ca632f55SGrant Likely 
25ca632f55SGrant Likely MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
26ca632f55SGrant Likely MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
27ca632f55SGrant Likely MODULE_LICENSE("GPL");
28ca632f55SGrant Likely 
29ca632f55SGrant Likely /* Register offsets */
30ca632f55SGrant Likely #define SPI_CTRL1	0x00
31ca632f55SGrant Likely #define SPI_CTRL1_SPIE		(1 << 7)
32ca632f55SGrant Likely #define SPI_CTRL1_SPE		(1 << 6)
33ca632f55SGrant Likely #define SPI_CTRL1_MSTR		(1 << 4)
34ca632f55SGrant Likely #define SPI_CTRL1_CPOL		(1 << 3)
35ca632f55SGrant Likely #define SPI_CTRL1_CPHA		(1 << 2)
36ca632f55SGrant Likely #define SPI_CTRL1_SSOE		(1 << 1)
37ca632f55SGrant Likely #define SPI_CTRL1_LSBFE		(1 << 0)
38ca632f55SGrant Likely 
39ca632f55SGrant Likely #define SPI_CTRL2	0x01
40ca632f55SGrant Likely #define SPI_BRR		0x04
41ca632f55SGrant Likely 
42ca632f55SGrant Likely #define SPI_STATUS	0x05
43ca632f55SGrant Likely #define SPI_STATUS_SPIF		(1 << 7)
44ca632f55SGrant Likely #define SPI_STATUS_WCOL		(1 << 6)
45ca632f55SGrant Likely #define SPI_STATUS_MODF		(1 << 4)
46ca632f55SGrant Likely 
47ca632f55SGrant Likely #define SPI_DATA	0x09
48ca632f55SGrant Likely #define SPI_PORTDATA	0x0d
49ca632f55SGrant Likely #define SPI_DATADIR	0x10
50ca632f55SGrant Likely 
51ca632f55SGrant Likely /* FSM state return values */
52ca632f55SGrant Likely #define FSM_STOP	0	/* Nothing more for the state machine to */
53ca632f55SGrant Likely 				/* do.  If something interesting happens */
54ca632f55SGrant Likely 				/* then an IRQ will be received */
55ca632f55SGrant Likely #define FSM_POLL	1	/* need to poll for completion, an IRQ is */
56ca632f55SGrant Likely 				/* not expected */
57ca632f55SGrant Likely #define FSM_CONTINUE	2	/* Keep iterating the state machine */
58ca632f55SGrant Likely 
59ca632f55SGrant Likely /* Driver internal data */
60ca632f55SGrant Likely struct mpc52xx_spi {
61ca632f55SGrant Likely 	struct spi_master *master;
62ca632f55SGrant Likely 	void __iomem *regs;
63ca632f55SGrant Likely 	int irq0;	/* MODF irq */
64ca632f55SGrant Likely 	int irq1;	/* SPIF irq */
65ca632f55SGrant Likely 	unsigned int ipb_freq;
66ca632f55SGrant Likely 
67ca632f55SGrant Likely 	/* Statistics; not used now, but will be reintroduced for debugfs */
68ca632f55SGrant Likely 	int msg_count;
69ca632f55SGrant Likely 	int wcol_count;
70ca632f55SGrant Likely 	int wcol_ticks;
71ca632f55SGrant Likely 	u32 wcol_tx_timestamp;
72ca632f55SGrant Likely 	int modf_count;
73ca632f55SGrant Likely 	int byte_count;
74ca632f55SGrant Likely 
75ca632f55SGrant Likely 	struct list_head queue;		/* queue of pending messages */
76ca632f55SGrant Likely 	spinlock_t lock;
77ca632f55SGrant Likely 	struct work_struct work;
78ca632f55SGrant Likely 
79ca632f55SGrant Likely 	/* Details of current transfer (length, and buffer pointers) */
80ca632f55SGrant Likely 	struct spi_message *message;	/* current message */
81ca632f55SGrant Likely 	struct spi_transfer *transfer;	/* current transfer */
82ca632f55SGrant Likely 	int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
83ca632f55SGrant Likely 	int len;
84ca632f55SGrant Likely 	int timestamp;
85ca632f55SGrant Likely 	u8 *rx_buf;
86ca632f55SGrant Likely 	const u8 *tx_buf;
87ca632f55SGrant Likely 	int cs_change;
88ca632f55SGrant Likely 	int gpio_cs_count;
89ca632f55SGrant Likely 	unsigned int *gpio_cs;
90ca632f55SGrant Likely };
91ca632f55SGrant Likely 
92ca632f55SGrant Likely /*
93ca632f55SGrant Likely  * CS control function
94ca632f55SGrant Likely  */
95ca632f55SGrant Likely static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
96ca632f55SGrant Likely {
97ca632f55SGrant Likely 	int cs;
98ca632f55SGrant Likely 
99ca632f55SGrant Likely 	if (ms->gpio_cs_count > 0) {
100ca632f55SGrant Likely 		cs = ms->message->spi->chip_select;
101ca632f55SGrant Likely 		gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
102ca632f55SGrant Likely 	} else
103ca632f55SGrant Likely 		out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
104ca632f55SGrant Likely }
105ca632f55SGrant Likely 
106ca632f55SGrant Likely /*
107ca632f55SGrant Likely  * Start a new transfer.  This is called both by the idle state
108ca632f55SGrant Likely  * for the first transfer in a message, and by the wait state when the
109ca632f55SGrant Likely  * previous transfer in a message is complete.
110ca632f55SGrant Likely  */
111ca632f55SGrant Likely static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
112ca632f55SGrant Likely {
113ca632f55SGrant Likely 	ms->rx_buf = ms->transfer->rx_buf;
114ca632f55SGrant Likely 	ms->tx_buf = ms->transfer->tx_buf;
115ca632f55SGrant Likely 	ms->len = ms->transfer->len;
116ca632f55SGrant Likely 
117ca632f55SGrant Likely 	/* Activate the chip select */
118ca632f55SGrant Likely 	if (ms->cs_change)
119ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 1);
120ca632f55SGrant Likely 	ms->cs_change = ms->transfer->cs_change;
121ca632f55SGrant Likely 
122ca632f55SGrant Likely 	/* Write out the first byte */
123e1065611SChristophe Leroy 	ms->wcol_tx_timestamp = mftb();
124ca632f55SGrant Likely 	if (ms->tx_buf)
125ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
126ca632f55SGrant Likely 	else
127ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, 0);
128ca632f55SGrant Likely }
129ca632f55SGrant Likely 
130ca632f55SGrant Likely /* Forward declaration of state handlers */
131ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
132ca632f55SGrant Likely 					 u8 status, u8 data);
133ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
134ca632f55SGrant Likely 				     u8 status, u8 data);
135ca632f55SGrant Likely 
136ca632f55SGrant Likely /*
137ca632f55SGrant Likely  * IDLE state
138ca632f55SGrant Likely  *
139ca632f55SGrant Likely  * No transfers are in progress; if another transfer is pending then retrieve
140ca632f55SGrant Likely  * it and kick it off.  Otherwise, stop processing the state machine
141ca632f55SGrant Likely  */
142ca632f55SGrant Likely static int
143ca632f55SGrant Likely mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
144ca632f55SGrant Likely {
145ca632f55SGrant Likely 	struct spi_device *spi;
146ca632f55SGrant Likely 	int spr, sppr;
147ca632f55SGrant Likely 	u8 ctrl1;
148ca632f55SGrant Likely 
149ca632f55SGrant Likely 	if (status && (irq != NO_IRQ))
150ca632f55SGrant Likely 		dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
151ca632f55SGrant Likely 			status);
152ca632f55SGrant Likely 
153ca632f55SGrant Likely 	/* Check if there is another transfer waiting. */
154ca632f55SGrant Likely 	if (list_empty(&ms->queue))
155ca632f55SGrant Likely 		return FSM_STOP;
156ca632f55SGrant Likely 
157ca632f55SGrant Likely 	/* get the head of the queue */
158ca632f55SGrant Likely 	ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
159ca632f55SGrant Likely 	list_del_init(&ms->message->queue);
160ca632f55SGrant Likely 
161ca632f55SGrant Likely 	/* Setup the controller parameters */
162ca632f55SGrant Likely 	ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
163ca632f55SGrant Likely 	spi = ms->message->spi;
164ca632f55SGrant Likely 	if (spi->mode & SPI_CPHA)
165ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_CPHA;
166ca632f55SGrant Likely 	if (spi->mode & SPI_CPOL)
167ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_CPOL;
168ca632f55SGrant Likely 	if (spi->mode & SPI_LSB_FIRST)
169ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_LSBFE;
170ca632f55SGrant Likely 	out_8(ms->regs + SPI_CTRL1, ctrl1);
171ca632f55SGrant Likely 
172ca632f55SGrant Likely 	/* Setup the controller speed */
173ca632f55SGrant Likely 	/* minimum divider is '2'.  Also, add '1' to force rounding the
174ca632f55SGrant Likely 	 * divider up. */
175ca632f55SGrant Likely 	sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
176ca632f55SGrant Likely 	spr = 0;
177ca632f55SGrant Likely 	if (sppr < 1)
178ca632f55SGrant Likely 		sppr = 1;
179ca632f55SGrant Likely 	while (((sppr - 1) & ~0x7) != 0) {
180ca632f55SGrant Likely 		sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
181ca632f55SGrant Likely 		spr++;
182ca632f55SGrant Likely 	}
183ca632f55SGrant Likely 	sppr--;		/* sppr quantity in register is offset by 1 */
184ca632f55SGrant Likely 	if (spr > 7) {
185ca632f55SGrant Likely 		/* Don't overrun limits of SPI baudrate register */
186ca632f55SGrant Likely 		spr = 7;
187ca632f55SGrant Likely 		sppr = 7;
188ca632f55SGrant Likely 	}
189ca632f55SGrant Likely 	out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
190ca632f55SGrant Likely 
191ca632f55SGrant Likely 	ms->cs_change = 1;
192ca632f55SGrant Likely 	ms->transfer = container_of(ms->message->transfers.next,
193ca632f55SGrant Likely 				    struct spi_transfer, transfer_list);
194ca632f55SGrant Likely 
195ca632f55SGrant Likely 	mpc52xx_spi_start_transfer(ms);
196ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_transfer;
197ca632f55SGrant Likely 
198ca632f55SGrant Likely 	return FSM_CONTINUE;
199ca632f55SGrant Likely }
200ca632f55SGrant Likely 
201ca632f55SGrant Likely /*
202ca632f55SGrant Likely  * TRANSFER state
203ca632f55SGrant Likely  *
204ca632f55SGrant Likely  * In the middle of a transfer.  If the SPI core has completed processing
205ca632f55SGrant Likely  * a byte, then read out the received data and write out the next byte
206ca632f55SGrant Likely  * (unless this transfer is finished; in which case go on to the wait
207ca632f55SGrant Likely  * state)
208ca632f55SGrant Likely  */
209ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
210ca632f55SGrant Likely 					 u8 status, u8 data)
211ca632f55SGrant Likely {
212ca632f55SGrant Likely 	if (!status)
213ca632f55SGrant Likely 		return ms->irq0 ? FSM_STOP : FSM_POLL;
214ca632f55SGrant Likely 
215ca632f55SGrant Likely 	if (status & SPI_STATUS_WCOL) {
216ca632f55SGrant Likely 		/* The SPI controller is stoopid.  At slower speeds, it may
217ca632f55SGrant Likely 		 * raise the SPIF flag before the state machine is actually
218ca632f55SGrant Likely 		 * finished, which causes a collision (internal to the state
219ca632f55SGrant Likely 		 * machine only).  The manual recommends inserting a delay
220ca632f55SGrant Likely 		 * between receiving the interrupt and sending the next byte,
221ca632f55SGrant Likely 		 * but it can also be worked around simply by retrying the
222ca632f55SGrant Likely 		 * transfer which is what we do here. */
223ca632f55SGrant Likely 		ms->wcol_count++;
224e1065611SChristophe Leroy 		ms->wcol_ticks += mftb() - ms->wcol_tx_timestamp;
225e1065611SChristophe Leroy 		ms->wcol_tx_timestamp = mftb();
226ca632f55SGrant Likely 		data = 0;
227ca632f55SGrant Likely 		if (ms->tx_buf)
228ca632f55SGrant Likely 			data = *(ms->tx_buf - 1);
229ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, data); /* try again */
230ca632f55SGrant Likely 		return FSM_CONTINUE;
231ca632f55SGrant Likely 	} else if (status & SPI_STATUS_MODF) {
232ca632f55SGrant Likely 		ms->modf_count++;
233ca632f55SGrant Likely 		dev_err(&ms->master->dev, "mode fault\n");
234ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
235ca632f55SGrant Likely 		ms->message->status = -EIO;
2360a6d3879SAxel Lin 		if (ms->message->complete)
237ca632f55SGrant Likely 			ms->message->complete(ms->message->context);
238ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_idle;
239ca632f55SGrant Likely 		return FSM_CONTINUE;
240ca632f55SGrant Likely 	}
241ca632f55SGrant Likely 
242ca632f55SGrant Likely 	/* Read data out of the spi device */
243ca632f55SGrant Likely 	ms->byte_count++;
244ca632f55SGrant Likely 	if (ms->rx_buf)
245ca632f55SGrant Likely 		*ms->rx_buf++ = data;
246ca632f55SGrant Likely 
247ca632f55SGrant Likely 	/* Is the transfer complete? */
248ca632f55SGrant Likely 	ms->len--;
249ca632f55SGrant Likely 	if (ms->len == 0) {
250e1065611SChristophe Leroy 		ms->timestamp = mftb();
251258ea99fSSergiu Cuciurean 		if (ms->transfer->delay.unit == SPI_DELAY_UNIT_USECS)
252258ea99fSSergiu Cuciurean 			ms->timestamp += ms->transfer->delay.value *
253258ea99fSSergiu Cuciurean 					 tb_ticks_per_usec;
254ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_wait;
255ca632f55SGrant Likely 		return FSM_CONTINUE;
256ca632f55SGrant Likely 	}
257ca632f55SGrant Likely 
258ca632f55SGrant Likely 	/* Write out the next byte */
259e1065611SChristophe Leroy 	ms->wcol_tx_timestamp = mftb();
260ca632f55SGrant Likely 	if (ms->tx_buf)
261ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
262ca632f55SGrant Likely 	else
263ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, 0);
264ca632f55SGrant Likely 
265ca632f55SGrant Likely 	return FSM_CONTINUE;
266ca632f55SGrant Likely }
267ca632f55SGrant Likely 
268ca632f55SGrant Likely /*
269ca632f55SGrant Likely  * WAIT state
270ca632f55SGrant Likely  *
271ca632f55SGrant Likely  * A transfer has completed; need to wait for the delay period to complete
272ca632f55SGrant Likely  * before starting the next transfer
273ca632f55SGrant Likely  */
274ca632f55SGrant Likely static int
275ca632f55SGrant Likely mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
276ca632f55SGrant Likely {
277ca632f55SGrant Likely 	if (status && irq)
278ca632f55SGrant Likely 		dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
279ca632f55SGrant Likely 			status);
280ca632f55SGrant Likely 
281e1065611SChristophe Leroy 	if (((int)mftb()) - ms->timestamp < 0)
282ca632f55SGrant Likely 		return FSM_POLL;
283ca632f55SGrant Likely 
284ca632f55SGrant Likely 	ms->message->actual_length += ms->transfer->len;
285ca632f55SGrant Likely 
286ca632f55SGrant Likely 	/* Check if there is another transfer in this message.  If there
287ca632f55SGrant Likely 	 * aren't then deactivate CS, notify sender, and drop back to idle
288ca632f55SGrant Likely 	 * to start the next message. */
289ca632f55SGrant Likely 	if (ms->transfer->transfer_list.next == &ms->message->transfers) {
290ca632f55SGrant Likely 		ms->msg_count++;
291ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
292ca632f55SGrant Likely 		ms->message->status = 0;
2930a6d3879SAxel Lin 		if (ms->message->complete)
294ca632f55SGrant Likely 			ms->message->complete(ms->message->context);
295ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_idle;
296ca632f55SGrant Likely 		return FSM_CONTINUE;
297ca632f55SGrant Likely 	}
298ca632f55SGrant Likely 
299ca632f55SGrant Likely 	/* There is another transfer; kick it off */
300ca632f55SGrant Likely 
301ca632f55SGrant Likely 	if (ms->cs_change)
302ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
303ca632f55SGrant Likely 
304ca632f55SGrant Likely 	ms->transfer = container_of(ms->transfer->transfer_list.next,
305ca632f55SGrant Likely 				    struct spi_transfer, transfer_list);
306ca632f55SGrant Likely 	mpc52xx_spi_start_transfer(ms);
307ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_transfer;
308ca632f55SGrant Likely 	return FSM_CONTINUE;
309ca632f55SGrant Likely }
310ca632f55SGrant Likely 
311ca632f55SGrant Likely /**
312ca632f55SGrant Likely  * mpc52xx_spi_fsm_process - Finite State Machine iteration function
313ca632f55SGrant Likely  * @irq: irq number that triggered the FSM or 0 for polling
314ca632f55SGrant Likely  * @ms: pointer to mpc52xx_spi driver data
315ca632f55SGrant Likely  */
316ca632f55SGrant Likely static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
317ca632f55SGrant Likely {
318ca632f55SGrant Likely 	int rc = FSM_CONTINUE;
319ca632f55SGrant Likely 	u8 status, data;
320ca632f55SGrant Likely 
321ca632f55SGrant Likely 	while (rc == FSM_CONTINUE) {
322ca632f55SGrant Likely 		/* Interrupt cleared by read of STATUS followed by
323ca632f55SGrant Likely 		 * read of DATA registers */
324ca632f55SGrant Likely 		status = in_8(ms->regs + SPI_STATUS);
325ca632f55SGrant Likely 		data = in_8(ms->regs + SPI_DATA);
326ca632f55SGrant Likely 		rc = ms->state(irq, ms, status, data);
327ca632f55SGrant Likely 	}
328ca632f55SGrant Likely 
329ca632f55SGrant Likely 	if (rc == FSM_POLL)
330ca632f55SGrant Likely 		schedule_work(&ms->work);
331ca632f55SGrant Likely }
332ca632f55SGrant Likely 
333ca632f55SGrant Likely /**
334ca632f55SGrant Likely  * mpc52xx_spi_irq - IRQ handler
335ca632f55SGrant Likely  */
336ca632f55SGrant Likely static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
337ca632f55SGrant Likely {
338ca632f55SGrant Likely 	struct mpc52xx_spi *ms = _ms;
339ca632f55SGrant Likely 	spin_lock(&ms->lock);
340ca632f55SGrant Likely 	mpc52xx_spi_fsm_process(irq, ms);
341ca632f55SGrant Likely 	spin_unlock(&ms->lock);
342ca632f55SGrant Likely 	return IRQ_HANDLED;
343ca632f55SGrant Likely }
344ca632f55SGrant Likely 
345ca632f55SGrant Likely /**
346ca632f55SGrant Likely  * mpc52xx_spi_wq - Workqueue function for polling the state machine
347ca632f55SGrant Likely  */
348ca632f55SGrant Likely static void mpc52xx_spi_wq(struct work_struct *work)
349ca632f55SGrant Likely {
350ca632f55SGrant Likely 	struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
351ca632f55SGrant Likely 	unsigned long flags;
352ca632f55SGrant Likely 
353ca632f55SGrant Likely 	spin_lock_irqsave(&ms->lock, flags);
354ca632f55SGrant Likely 	mpc52xx_spi_fsm_process(0, ms);
355ca632f55SGrant Likely 	spin_unlock_irqrestore(&ms->lock, flags);
356ca632f55SGrant Likely }
357ca632f55SGrant Likely 
358ca632f55SGrant Likely /*
359ca632f55SGrant Likely  * spi_master ops
360ca632f55SGrant Likely  */
361ca632f55SGrant Likely 
362ca632f55SGrant Likely static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
363ca632f55SGrant Likely {
364ca632f55SGrant Likely 	struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
365ca632f55SGrant Likely 	unsigned long flags;
366ca632f55SGrant Likely 
367ca632f55SGrant Likely 	m->actual_length = 0;
368ca632f55SGrant Likely 	m->status = -EINPROGRESS;
369ca632f55SGrant Likely 
370ca632f55SGrant Likely 	spin_lock_irqsave(&ms->lock, flags);
371ca632f55SGrant Likely 	list_add_tail(&m->queue, &ms->queue);
372ca632f55SGrant Likely 	spin_unlock_irqrestore(&ms->lock, flags);
373ca632f55SGrant Likely 	schedule_work(&ms->work);
374ca632f55SGrant Likely 
375ca632f55SGrant Likely 	return 0;
376ca632f55SGrant Likely }
377ca632f55SGrant Likely 
378ca632f55SGrant Likely /*
379ca632f55SGrant Likely  * OF Platform Bus Binding
380ca632f55SGrant Likely  */
381fd4a319bSGrant Likely static int mpc52xx_spi_probe(struct platform_device *op)
382ca632f55SGrant Likely {
383ca632f55SGrant Likely 	struct spi_master *master;
384ca632f55SGrant Likely 	struct mpc52xx_spi *ms;
385ca632f55SGrant Likely 	void __iomem *regs;
386ca632f55SGrant Likely 	u8 ctrl1;
387ca632f55SGrant Likely 	int rc, i = 0;
388ca632f55SGrant Likely 	int gpio_cs;
389ca632f55SGrant Likely 
390ca632f55SGrant Likely 	/* MMIO registers */
391ca632f55SGrant Likely 	dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
392ca632f55SGrant Likely 	regs = of_iomap(op->dev.of_node, 0);
393ca632f55SGrant Likely 	if (!regs)
394ca632f55SGrant Likely 		return -ENODEV;
395ca632f55SGrant Likely 
396ca632f55SGrant Likely 	/* initialize the device */
397ca632f55SGrant Likely 	ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
398ca632f55SGrant Likely 	out_8(regs + SPI_CTRL1, ctrl1);
399ca632f55SGrant Likely 	out_8(regs + SPI_CTRL2, 0x0);
400ca632f55SGrant Likely 	out_8(regs + SPI_DATADIR, 0xe);	/* Set output pins */
401ca632f55SGrant Likely 	out_8(regs + SPI_PORTDATA, 0x8);	/* Deassert /SS signal */
402ca632f55SGrant Likely 
403ca632f55SGrant Likely 	/* Clear the status register and re-read it to check for a MODF
404ca632f55SGrant Likely 	 * failure.  This driver cannot currently handle multiple masters
405ca632f55SGrant Likely 	 * on the SPI bus.  This fault will also occur if the SPI signals
406ca632f55SGrant Likely 	 * are not connected to any pins (port_config setting) */
407ca632f55SGrant Likely 	in_8(regs + SPI_STATUS);
408ca632f55SGrant Likely 	out_8(regs + SPI_CTRL1, ctrl1);
409ca632f55SGrant Likely 
410ca632f55SGrant Likely 	in_8(regs + SPI_DATA);
411ca632f55SGrant Likely 	if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
412ca632f55SGrant Likely 		dev_err(&op->dev, "mode fault; is port_config correct?\n");
413ca632f55SGrant Likely 		rc = -EIO;
414ca632f55SGrant Likely 		goto err_init;
415ca632f55SGrant Likely 	}
416ca632f55SGrant Likely 
417ca632f55SGrant Likely 	dev_dbg(&op->dev, "allocating spi_master struct\n");
418*ac7357acSZhiqi Song 	master = spi_alloc_master(&op->dev, sizeof(*ms));
419ca632f55SGrant Likely 	if (!master) {
420ca632f55SGrant Likely 		rc = -ENOMEM;
421ca632f55SGrant Likely 		goto err_alloc;
422ca632f55SGrant Likely 	}
423ca632f55SGrant Likely 
424ca632f55SGrant Likely 	master->transfer = mpc52xx_spi_transfer;
425ca632f55SGrant Likely 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
4265c5989ccSAxel Lin 	master->bits_per_word_mask = SPI_BPW_MASK(8);
427ca632f55SGrant Likely 	master->dev.of_node = op->dev.of_node;
428ca632f55SGrant Likely 
42924b5a82cSJingoo Han 	platform_set_drvdata(op, master);
430ca632f55SGrant Likely 
431ca632f55SGrant Likely 	ms = spi_master_get_devdata(master);
432ca632f55SGrant Likely 	ms->master = master;
433ca632f55SGrant Likely 	ms->regs = regs;
434ca632f55SGrant Likely 	ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
435ca632f55SGrant Likely 	ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
436ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_idle;
437ca632f55SGrant Likely 	ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
438ca632f55SGrant Likely 	ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
439ca632f55SGrant Likely 	if (ms->gpio_cs_count > 0) {
440ca632f55SGrant Likely 		master->num_chipselect = ms->gpio_cs_count;
4418b6c8955SMarkus Elfring 		ms->gpio_cs = kmalloc_array(ms->gpio_cs_count,
4428b6c8955SMarkus Elfring 					    sizeof(*ms->gpio_cs),
443ca632f55SGrant Likely 					    GFP_KERNEL);
444ca632f55SGrant Likely 		if (!ms->gpio_cs) {
445ca632f55SGrant Likely 			rc = -ENOMEM;
446866c0f25SGuenter Roeck 			goto err_alloc_gpio;
447ca632f55SGrant Likely 		}
448ca632f55SGrant Likely 
449ca632f55SGrant Likely 		for (i = 0; i < ms->gpio_cs_count; i++) {
450ca632f55SGrant Likely 			gpio_cs = of_get_gpio(op->dev.of_node, i);
4510a090d65SArvind Yadav 			if (!gpio_is_valid(gpio_cs)) {
452ca632f55SGrant Likely 				dev_err(&op->dev,
4539c4f0440SMarkus Elfring 					"could not parse the gpio field in oftree\n");
454ca632f55SGrant Likely 				rc = -ENODEV;
455ca632f55SGrant Likely 				goto err_gpio;
456ca632f55SGrant Likely 			}
457ca632f55SGrant Likely 
458ca632f55SGrant Likely 			rc = gpio_request(gpio_cs, dev_name(&op->dev));
459ca632f55SGrant Likely 			if (rc) {
460ca632f55SGrant Likely 				dev_err(&op->dev,
4619c4f0440SMarkus Elfring 					"can't request spi cs gpio #%d on gpio line %d\n",
4629c4f0440SMarkus Elfring 					i, gpio_cs);
463ca632f55SGrant Likely 				goto err_gpio;
464ca632f55SGrant Likely 			}
465ca632f55SGrant Likely 
466ca632f55SGrant Likely 			gpio_direction_output(gpio_cs, 1);
467ca632f55SGrant Likely 			ms->gpio_cs[i] = gpio_cs;
468ca632f55SGrant Likely 		}
469ca632f55SGrant Likely 	}
470ca632f55SGrant Likely 
471ca632f55SGrant Likely 	spin_lock_init(&ms->lock);
472ca632f55SGrant Likely 	INIT_LIST_HEAD(&ms->queue);
473ca632f55SGrant Likely 	INIT_WORK(&ms->work, mpc52xx_spi_wq);
474ca632f55SGrant Likely 
475ca632f55SGrant Likely 	/* Decide if interrupts can be used */
476ca632f55SGrant Likely 	if (ms->irq0 && ms->irq1) {
477ca632f55SGrant Likely 		rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
478ca632f55SGrant Likely 				  "mpc5200-spi-modf", ms);
479ca632f55SGrant Likely 		rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
480ca632f55SGrant Likely 				  "mpc5200-spi-spif", ms);
481ca632f55SGrant Likely 		if (rc) {
482ca632f55SGrant Likely 			free_irq(ms->irq0, ms);
483ca632f55SGrant Likely 			free_irq(ms->irq1, ms);
484ca632f55SGrant Likely 			ms->irq0 = ms->irq1 = 0;
485ca632f55SGrant Likely 		}
486ca632f55SGrant Likely 	} else {
487ca632f55SGrant Likely 		/* operate in polled mode */
488ca632f55SGrant Likely 		ms->irq0 = ms->irq1 = 0;
489ca632f55SGrant Likely 	}
490ca632f55SGrant Likely 
491ca632f55SGrant Likely 	if (!ms->irq0)
492ca632f55SGrant Likely 		dev_info(&op->dev, "using polled mode\n");
493ca632f55SGrant Likely 
494ca632f55SGrant Likely 	dev_dbg(&op->dev, "registering spi_master struct\n");
495ca632f55SGrant Likely 	rc = spi_register_master(master);
496ca632f55SGrant Likely 	if (rc)
497ca632f55SGrant Likely 		goto err_register;
498ca632f55SGrant Likely 
499ca632f55SGrant Likely 	dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
500ca632f55SGrant Likely 
501ca632f55SGrant Likely 	return rc;
502ca632f55SGrant Likely 
503ca632f55SGrant Likely  err_register:
504ca632f55SGrant Likely 	dev_err(&ms->master->dev, "initialization failed\n");
505ca632f55SGrant Likely  err_gpio:
506ca632f55SGrant Likely 	while (i-- > 0)
507ca632f55SGrant Likely 		gpio_free(ms->gpio_cs[i]);
508ca632f55SGrant Likely 
509ca632f55SGrant Likely 	kfree(ms->gpio_cs);
510866c0f25SGuenter Roeck  err_alloc_gpio:
511866c0f25SGuenter Roeck 	spi_master_put(master);
512ca632f55SGrant Likely  err_alloc:
513ca632f55SGrant Likely  err_init:
514ca632f55SGrant Likely 	iounmap(regs);
515ca632f55SGrant Likely 	return rc;
516ca632f55SGrant Likely }
517ca632f55SGrant Likely 
518fd4a319bSGrant Likely static int mpc52xx_spi_remove(struct platform_device *op)
519ca632f55SGrant Likely {
52024b5a82cSJingoo Han 	struct spi_master *master = spi_master_get(platform_get_drvdata(op));
521ca632f55SGrant Likely 	struct mpc52xx_spi *ms = spi_master_get_devdata(master);
522ca632f55SGrant Likely 	int i;
523ca632f55SGrant Likely 
524ca632f55SGrant Likely 	free_irq(ms->irq0, ms);
525ca632f55SGrant Likely 	free_irq(ms->irq1, ms);
526ca632f55SGrant Likely 
527ca632f55SGrant Likely 	for (i = 0; i < ms->gpio_cs_count; i++)
528ca632f55SGrant Likely 		gpio_free(ms->gpio_cs[i]);
529ca632f55SGrant Likely 
530ca632f55SGrant Likely 	kfree(ms->gpio_cs);
531ca632f55SGrant Likely 	spi_unregister_master(master);
532ca632f55SGrant Likely 	iounmap(ms->regs);
533f95e1028SGuenter Roeck 	spi_master_put(master);
534ca632f55SGrant Likely 
535ca632f55SGrant Likely 	return 0;
536ca632f55SGrant Likely }
537ca632f55SGrant Likely 
538fd4a319bSGrant Likely static const struct of_device_id mpc52xx_spi_match[] = {
539ca632f55SGrant Likely 	{ .compatible = "fsl,mpc5200-spi", },
540ca632f55SGrant Likely 	{}
541ca632f55SGrant Likely };
542ca632f55SGrant Likely MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
543ca632f55SGrant Likely 
544ca632f55SGrant Likely static struct platform_driver mpc52xx_spi_of_driver = {
545ca632f55SGrant Likely 	.driver = {
546ca632f55SGrant Likely 		.name = "mpc52xx-spi",
547ca632f55SGrant Likely 		.of_match_table = mpc52xx_spi_match,
548ca632f55SGrant Likely 	},
549ca632f55SGrant Likely 	.probe = mpc52xx_spi_probe,
550fd4a319bSGrant Likely 	.remove = mpc52xx_spi_remove,
551ca632f55SGrant Likely };
552940ab889SGrant Likely module_platform_driver(mpc52xx_spi_of_driver);
553